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140345 lines
5.8 MiB
140345 lines
5.8 MiB
/// @file include-private/xed3-phash-vv2.h
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// This file was automatically generated.
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// Do not edit this file.
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#if !defined(INCLUDE_PRIVATE_XED3_PHASH_VV2_H)
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# define INCLUDE_PRIVATE_XED3_PHASH_VV2_H
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/*BEGIN_LEGAL
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Copyright (c) 2021 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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END_LEGAL */
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#include "xed-internal-header.h"
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#include "xed3-operand-lu.h"
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x0_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x10_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x11_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x12_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x13_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x14_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x15_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x16_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x18_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x19_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x20_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x21_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x22_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x23_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x24_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x25_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x26_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x27_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_245_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_204_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_228_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_97_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_209_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_251_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_121_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_284_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_231_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_233_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_273_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_260_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_226_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_262_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_282_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x29_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x30_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x31_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x32_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x33_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x34_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x35_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x36_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x37_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x38_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_260_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_557_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_517_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_362_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_233_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_565_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_567_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_282_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_540_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_549_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_355_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_538_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_577_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_482_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_520_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_262_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_530_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_440_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_570_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_465_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_475_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_448_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_385_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_450_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_367_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_497_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_562_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_328_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_228_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_550_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_365_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_533_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_468_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_507_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_377_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_273_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_508_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_547_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_443_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_555_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_258_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_350_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_552_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_333_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_558_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_467_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_487_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_343_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_563_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_537_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_287_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_418_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_428_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_548_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_253_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_406_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x40_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x42_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x43_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x44_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x45_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x46_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x47_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x50_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x51_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x52_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x53_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x54_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x55_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x58_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x59_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x5a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x5b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x62_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x63_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x64_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x65_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x66_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x68_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x70_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x71_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x72_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x73_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x75_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x76_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x77_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x78_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x79_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x83_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x88_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x89_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x90_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x91_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x92_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x93_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x96_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x97_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x98_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x99_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa0_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa1_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa3_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xaa_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xab_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xac_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xad_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xae_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xaf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xba_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbe_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xca_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xde_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x0_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xa_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x14_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x15_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x16_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x17_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x18_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x19_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x20_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x21_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x22_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x23_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x25_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x26_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x27_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x38_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x39_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x42_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x43_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x44_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x50_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x51_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x54_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x55_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x56_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x57_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x66_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x67_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x70_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x71_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x72_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x73_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xc2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xce_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xcf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x10_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x11_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x1d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_97_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_17_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x58_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x59_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x6e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_399_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_516_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_563_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_589_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_641_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_550_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_226_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_689_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_598_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_299_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_260_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_221_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_565_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_501_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_526_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_487_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_665_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_690_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_626_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_587_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_633_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_594_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_647_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_624_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_638_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_449_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_294_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_411_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_509_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_262_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_582_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_543_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_479_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_504_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_440_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_367_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_484_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_204_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_328_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_362_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_687_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_316_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_623_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_577_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_648_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_277_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_694_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_584_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_538_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_284_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_609_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_682_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_416_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_533_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_645_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_606_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_384_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_229_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_548_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_540_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_618_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_666_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_531_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_467_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_429_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_377_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_450_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_482_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_443_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_677_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_530_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_321_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_555_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_601_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_491_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_121_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_562_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_537_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_653_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_97_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_663_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_426_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_399_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_516_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_563_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_589_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_641_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_550_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_226_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_689_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_598_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_299_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_260_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_221_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_565_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_501_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_526_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_487_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_665_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_690_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_626_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_587_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_633_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_594_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_647_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_624_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_638_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_449_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_294_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_411_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_509_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_262_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_582_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_543_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_479_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_504_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_440_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_367_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_484_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_204_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_328_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_362_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_687_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_316_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_623_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_577_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_648_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_277_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_694_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_584_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_538_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_284_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_609_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_682_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_416_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_533_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_645_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_606_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_384_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_229_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_548_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_540_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_618_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_666_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_531_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_467_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_429_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_377_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_450_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_482_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_443_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_677_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_530_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_321_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_555_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_601_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_491_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_121_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_562_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_537_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_653_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_97_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_663_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_426_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_367_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_588_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_540_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_547_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_499_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_507_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_713_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_720_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_672_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_695_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_647_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_606_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_565_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_607_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_698_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_650_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_411_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_709_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_625_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_389_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_543_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_569_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_326_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_282_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_656_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_620_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_162_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_556_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_568_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_715_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_523_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_587_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_209_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_616_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_548_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_600_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_564_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_701_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_506_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_311_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_85_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_570_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_491_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_638_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_649_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_538_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_590_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_17_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_554_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_633_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_697_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_350_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_450_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_597_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_692_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_287_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_629_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_684_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_517_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_601_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_664_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_723_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_644_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_254_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_401_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_333_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_675_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_639_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_623_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_428_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_233_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_508_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_539_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_487_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_229_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_730_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_467_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_245_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_714_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_677_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_482_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_693_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_431_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_331_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_641_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_251_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_530_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_689_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_609_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_399_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_204_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_557_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_362_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_262_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_719_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_731_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_704_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_294_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_385_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x13_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x2c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x2d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x42_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x43_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x56_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x57_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x96_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x97_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x98_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x99_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xaa_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xab_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xac_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xad_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xae_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xaf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xba_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbe_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xd6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xd7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_97_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_17_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_121_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_2_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_4_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_45_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x13_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x14_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x15_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x16_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x17_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x28_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x29_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_123_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x54_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x55_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x56_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x57_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x58_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x59_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x60_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x61_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x62_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x63_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x64_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x65_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x66_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x67_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x68_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x69_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6c_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6d_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x70_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x71_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x72_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x73_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x74_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x75_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x76_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_776_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_693_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_649_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_915_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1013_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_818_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1359_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_566_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1066_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1027_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_832_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_930_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_735_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1081_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_983_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_944_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_749_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_847_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1000_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_805_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_903_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_708_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_918_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_722_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1418_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_820_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_625_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_586_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1086_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_835_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_639_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_737_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1003_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1015_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_879_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_932_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_796_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1044_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_849_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_713_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1035_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1479_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_952_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1064_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_869_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_993_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_798_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_466_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_910_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_715_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_579_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_827_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1484_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1401_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_874_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_678_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_791_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_976_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_781_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1030_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_893_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_698_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_947_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_810_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1464_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1049_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1162_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_966_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_739_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1091_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_896_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_759_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1008_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_813_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_925_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_730_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1022_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_886_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_940_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_803_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1052_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_857_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_720_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1042_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_959_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1071_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_876_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_17_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_866_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_671_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_783_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_588_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_700_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_908_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1020_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_825_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1074_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_937_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_742_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1093_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1088_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_756_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1005_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_922_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_727_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_913_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1025_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_830_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1078_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_942_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_747_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_520_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_981_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_786_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_883_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_898_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_703_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_800_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_605_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_854_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_815_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_620_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_717_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_969_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_773_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_871_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_539_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1039_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_788_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_359_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1054_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_957_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_705_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_971_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1069_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_974_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_778_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_891_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_696_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_808_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1047_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_964_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1186_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_991_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_771_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_576_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1010_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_927_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_844_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_834_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_752_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_988_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_793_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_905_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_710_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1061_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1466_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_744_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_549_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1095_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_900_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_764_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_569_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_817_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_920_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1032_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_837_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_961_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_766_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_878_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_547_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_795_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_464_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1043_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1075_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_809_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_711_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_841_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_743_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1058_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_960_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1090_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_992_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_726_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_758_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_975_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_877_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1299_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_507_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_936_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_838_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1065_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_968_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1087_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_853_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_755_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_982_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_885_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_406_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1004_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1036_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_802_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_704_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_931_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_833_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_355_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1050_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_258_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_953_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1082_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_719_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_621_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_848_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_750_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_967_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_870_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_311_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1007_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_909_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1231_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1097_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_304_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_999_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_845_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_611_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_859_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_762_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_794_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_777_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_679_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_972_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_738_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_867_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_769_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1465_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_986_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_889_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1018_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1350_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_557_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_784_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_806_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_935_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_506_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_733_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1428_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_852_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_884_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_672_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1033_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_899_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_801_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_592_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_914_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_695_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_612_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_934_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1046_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_851_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_963_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_768_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_541_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_346_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_892_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_697_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1019_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_824_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_741_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_658_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_956_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_761_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_873_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_668_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_336_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1041_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_958_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_822_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_875_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_978_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_895_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_951_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_912_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1063_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_868_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_829_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_732_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_980_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_785_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_746_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1068_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1219_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_622_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_985_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1083_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_888_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1429_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_902_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1012_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_929_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_734_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_846_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_514_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_836_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1085_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_949_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_754_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1002_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_712_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_517_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_629_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_792_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_709_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_573_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_812_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_924_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_729_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1080_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_553_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1009_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_790_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_707_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1029_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_946_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_863_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1073_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_990_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_897_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_702_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_814_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1331_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1053_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_917_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_763_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_890_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_558_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_807_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_724_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_714_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_631_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_880_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_919_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1017_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1031_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_753_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1449_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_770_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_939_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_590_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1051_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_856_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_273_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1468_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_775_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1024_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_497_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_941_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_93_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_776_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_693_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_649_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_915_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1013_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_818_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1359_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1164_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_566_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1066_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1027_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_832_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_930_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_735_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1081_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_983_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_944_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_749_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_847_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_54_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1000_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_805_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_903_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_708_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_918_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_722_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1418_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_820_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_625_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_586_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1086_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_835_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_639_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_737_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1003_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1015_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_879_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_932_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_796_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1044_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_849_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_713_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1230_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1035_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1479_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_952_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1064_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_869_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_993_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_798_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_466_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_910_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_715_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_579_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_827_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1484_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1401_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_874_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_678_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_791_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_976_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_781_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1030_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_893_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_698_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_947_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_810_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_171_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1464_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1049_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1162_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_966_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_739_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1091_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_896_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_759_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1008_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_813_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_925_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_730_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1022_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_886_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_940_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_803_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1052_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_857_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_720_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1042_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_959_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1208_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1071_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_876_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_17_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_866_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_671_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_783_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_588_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_700_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_908_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1020_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_825_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1074_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_937_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_742_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1425_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1093_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1088_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_756_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1005_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_922_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_727_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_913_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1025_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_830_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1078_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_942_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_747_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_520_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_981_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_786_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_883_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_8_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_898_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_703_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1398_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_800_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_605_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_854_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_815_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_620_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_717_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_969_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_773_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_871_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_539_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1039_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_788_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_359_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1054_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_957_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_705_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_971_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1069_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1376_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_974_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_778_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_891_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_696_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1139_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_808_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1461_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1130_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1047_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_964_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1186_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_991_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_771_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_576_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1010_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_927_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_844_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_834_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_752_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_988_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_793_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_905_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_710_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1061_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_198_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1466_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_744_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_549_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1178_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1095_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_900_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_764_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_569_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_817_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_920_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1032_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_837_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_961_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_766_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_878_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_547_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_795_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_464_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1043_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1075_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_809_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_711_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_841_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_743_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1058_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_960_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1090_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_992_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_726_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_758_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_975_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_877_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_84_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1299_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_507_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_936_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_838_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1065_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_968_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1087_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1216_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_853_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_60_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_755_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_982_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_885_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_406_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1004_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1036_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_802_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_704_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_931_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_833_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_355_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1050_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_258_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_953_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1082_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_719_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_621_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_848_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_750_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_967_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_870_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_311_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1007_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_909_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1231_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1097_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_304_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_999_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_845_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_611_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_859_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_67_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_762_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_99_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_794_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_777_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_679_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_972_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_738_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_867_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_769_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1465_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_986_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_889_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1018_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1350_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_557_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_784_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_806_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_935_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_506_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_733_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1428_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1330_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_852_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_884_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_672_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1033_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_899_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_801_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_592_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1471_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_914_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_695_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_612_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_934_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1046_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_851_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_963_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_768_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_541_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_346_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1337_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_892_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_697_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1019_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_824_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_741_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_658_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_956_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_761_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_873_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1473_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1112_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_668_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_336_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1041_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_958_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_822_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_875_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_978_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_895_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_951_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_912_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1063_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_868_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_829_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_732_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_980_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_785_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_746_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1068_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1219_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_622_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_985_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1083_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_888_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1429_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_902_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1012_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_929_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_734_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_846_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_514_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_836_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1085_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_949_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_754_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1002_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_712_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_517_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_629_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_792_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_709_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_573_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_812_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_924_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_729_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1080_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_553_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1009_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_790_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_707_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1029_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_946_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_863_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1073_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_990_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_897_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_702_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_814_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1331_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1053_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_917_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1290_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1207_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_763_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_153_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_890_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_558_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_807_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_724_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_714_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_631_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_880_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_919_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1017_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1380_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1031_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_753_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1449_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_770_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_939_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_590_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1051_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_856_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_273_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1468_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_775_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1024_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_497_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_941_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1375_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7a_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_841_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1135_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_769_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1453_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1000_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1294_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_927_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_873_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_483_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_506_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_800_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1031_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_641_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_665_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1349_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_959_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_515_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1199_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_809_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_832_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_52_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1126_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_674_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_284_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_968_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_991_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_601_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1285_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1326_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_936_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_546_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1254_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_864_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1095_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_705_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1022_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_760_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1054_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1077_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_687_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1371_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_918_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_528_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1212_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_846_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_791_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_401_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1108_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_266_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_950_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_877_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_43_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1117_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_751_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_361_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1045_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_886_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_909_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1203_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1245_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_855_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_75_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_782_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1013_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_623_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_233_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1331_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_941_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_282_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_966_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_599_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_209_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_893_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1125_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_735_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_758_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_368_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1442_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1052_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1093_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1387_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1411_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1021_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_631_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_241_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1252_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_862_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_472_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_82_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_105_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1179_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_789_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_399_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1420_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1030_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_273_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1347_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_957_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_567_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_798_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_42_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1116_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_726_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_767_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1451_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1061_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1084_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_694_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1378_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_926_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_536_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1220_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1243_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_853_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_463_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1275_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_885_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_495_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_128_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1202_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_812_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_359_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1433_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1043_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_653_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_286_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_970_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1012_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_939_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_159_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_780_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_24_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1098_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_318_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1338_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_948_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_191_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_875_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_33_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1107_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_350_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1424_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1034_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_644_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_685_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1370_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_980_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1003_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_613_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1297_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_844_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_64_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1138_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_771_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_381_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_678_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1362_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_972_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_995_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1289_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_837_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_57_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1131_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_764_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1448_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1099_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_709_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1027_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_637_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1258_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_868_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1185_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_795_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_119_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1193_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_803_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_413_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_436_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_730_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_962_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_572_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_595_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_205_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_889_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_930_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_540_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1248_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_858_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_468_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_78_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1089_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1406_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1016_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_626_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_834_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_444_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_467_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_761_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_993_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_603_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_920_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_961_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_181_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_499_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_340_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1414_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1047_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_657_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1288_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_898_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_508_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_141_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1215_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_825_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_435_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1446_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1056_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1374_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_984_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_635_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_245_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1319_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_929_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_952_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_794_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1088_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1111_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_331_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1405_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_753_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_363_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1070_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1301_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_911_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1228_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_838_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_880_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_490_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1174_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_807_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_417_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_27_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1038_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_258_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_816_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_36_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_59_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1133_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_743_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1365_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_975_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_902_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_512_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1237_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_847_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_871_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1006_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1029_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_639_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1323_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_281_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_988_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_830_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1147_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_757_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_18_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1092_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_336_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1410_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1251_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1274_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_884_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_104_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1426_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1036_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1353_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_963_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_120_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1194_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_804_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_828_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_48_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1122_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1163_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_773_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_383_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1457_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1090_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_310_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1322_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_932_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_542_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1249_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_859_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1257_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_867_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_87_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_110_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1184_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1025_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_604_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_921_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_531_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_763_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_373_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1447_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1057_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1080_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_690_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_820_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1156_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_766_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_9_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1083_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1315_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_925_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1242_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1086_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_306_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1244_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_854_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_464_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_823_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_750_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1434_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_982_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1299_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1149_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_759_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1443_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_3_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_161_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1235_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_845_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_814_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1339_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_949_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_973_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1394_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1004_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_224_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1321_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_931_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_541_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_89_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_406_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_742_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1059_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_900_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1217_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_827_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_437_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_47_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1068_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1385_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1227_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_80_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_732_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_342_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1416_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1026_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_574_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_891_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1313_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_923_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_143_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_850_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_460_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_7_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1081_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_301_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1399_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1009_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_619_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_954_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_977_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_587_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_197_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1271_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_819_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_429_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_39_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1113_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1136_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_746_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_356_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1430_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_917_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_527_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1211_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1075_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1369_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1392_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1002_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_612_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_423_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_740_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_590_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_200_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_908_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_749_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1066_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_96_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1097_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_835_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1129_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1152_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_762_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_994_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1311_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1256_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_866_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_476_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_500_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_658_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_826_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_277_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_985_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_173_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1247_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_857_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_15_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_332_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1071_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_681_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_912_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1229_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_839_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_449_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1175_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_785_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_395_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1333_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_943_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_5_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1079_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1260_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_870_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_480_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_90_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1142_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_752_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_776_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_617_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_934_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1270_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1428_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1355_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_965_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_575_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_997_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1020_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1314_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1124_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_734_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_344_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1219_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_829_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_621_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1305_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_915_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1233_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1074_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1391_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_580_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1201_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_811_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_421_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_739_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_986_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1280_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1304_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_914_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_524_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1145_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_755_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_365_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1439_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1462_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1072_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_334_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1408_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1018_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_651_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_261_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1335_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_945_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_492_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_786_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1103_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_427_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_37_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_744_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_354_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_903_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_848_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_92_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1166_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1007_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1324_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_979_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1296_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_906_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_748_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1065_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_326_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1400_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_254_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1192_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_802_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_505_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_754_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_673_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_591_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1278_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1182_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1196_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1100_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1114_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1064_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_901_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_805_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1401_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_888_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_792_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_806_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_710_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_724_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1137_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_974_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_328_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_151_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_165_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_496_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_511_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1189_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1011_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_70_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1438_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1357_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_924_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_534_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1328_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1232_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_938_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_842_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_548_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_158_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_62_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1150_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_856_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_466_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_76_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1269_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_879_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1284_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_894_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_402_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_416_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_320_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_843_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_747_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1225_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1239_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_106_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_121_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_831_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_668_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1177_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_999_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1014_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_140_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_58_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1441_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1345_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_486_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_308_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_226_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_882_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1390_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1309_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1213_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_787_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_609_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_624_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1214_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1118_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1132_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1051_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_955_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1382_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1300_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_904_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_919_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_741_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_397_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_219_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_234_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1346_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1250_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_956_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_860_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_470_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_94_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1264_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1168_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_874_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_778_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_484_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_13_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1087_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_793_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_697_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_228_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1302_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1432_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1042_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_824_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_728_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_661_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_565_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_992_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_910_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_169_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_183_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_514_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7e_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7f_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd1_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd3_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xda_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xde_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdf_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe0_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe1_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe3_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe7_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xea_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xeb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xec_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xed_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xee_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xef_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf1_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf2_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf3_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf4_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf5_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf6_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf8_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf9_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfa_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfb_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfc_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfd_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfe_vv2(const xed_decoded_inst_t* d);
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static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x0_vv2(const xed_decoded_inst_t* d)
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{
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|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6596},
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|
/*h(4)=1 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6595},
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|
/*h(38)=2 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6598},
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|
/*h(20)=3 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6597},
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|
/*h(6)=4 EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6594},
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|
/*h(36)=5 EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6446},
|
|
/*h(4)=1 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6445},
|
|
/*h(38)=2 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6448},
|
|
/*h(20)=3 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6447},
|
|
/*h(6)=4 EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6444},
|
|
/*h(36)=5 EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6449}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6560},
|
|
/*h(4)=1 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6559},
|
|
/*h(38)=2 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6562},
|
|
/*h(20)=3 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6561},
|
|
/*h(6)=4 EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6558},
|
|
/*h(36)=5 EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6563}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5255},
|
|
/*h(10)=3 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5258},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5263},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5255},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5259},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5263},
|
|
/*h(74)=13 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5254},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5259},
|
|
/*h(42)=17 EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5262}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5243},
|
|
/*h(46)=1 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5250},
|
|
/*h(12)=2 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5247},
|
|
/*h(77)=3 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5243},
|
|
/*h(13)=4 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5247},
|
|
/*h(78)=5 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5242},
|
|
/*h(44)=6 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5251},
|
|
/*h(14)=7 EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5246},
|
|
/*h(45)=8 EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x10_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[210] = {
|
|
/*h(1654)=0 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1654, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1388)=4 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(124)=6 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 6661},
|
|
/*h(1754)=7 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 6541},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=10 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 6660},
|
|
/*h(1108)=11 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 6661},
|
|
/*h(628)=12 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1398)=14 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1398, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1612)=17 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 6665},
|
|
/*h(1132)=18 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 6661},
|
|
/*h(728)=19 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 6542},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=21 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 6539},
|
|
/*h(638)=22 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1636)=24 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(372)=26 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 6663},
|
|
/*h(1622)=27 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1622, 6664},
|
|
/*h(1142)=28 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1142, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1356)=31 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=33 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 6540},
|
|
/*h(1646)=34 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1646, 6664},
|
|
/*h(1242)=35 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 6537},
|
|
/*h(382)=36 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1380)=38 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 6663},
|
|
/*h(596)=39 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 6665},
|
|
/*h(116)=40 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 6661},
|
|
/*h(1366)=41 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1366, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1100)=45 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 6661},
|
|
/*h(620)=46 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 6665},
|
|
/*h(216)=47 EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 6538},
|
|
/*h(1390)=48 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1390, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(126)=50 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 6660},
|
|
/*h(1604)=51 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 6665},
|
|
/*h(1124)=52 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 6661},
|
|
/*h(340)=53 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1110)=55 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1110, 6660},
|
|
/*h(630)=56 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1628)=58 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(364)=60 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 6663},
|
|
/*h(1614)=61 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1614, 6664},
|
|
/*h(1134)=62 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1134, 6660},
|
|
/*h(730)=63 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 6541},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1348)=65 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=67 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 6661},
|
|
/*h(1638)=68 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1638, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(374)=70 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1372)=72 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 6663},
|
|
/*h(588)=73 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 6665},
|
|
/*h(108)=74 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 6661},
|
|
/*h(1358)=75 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1358, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=77 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 6539},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1092)=79 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 6661},
|
|
/*h(612)=80 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1382)=82 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1382, 6662},
|
|
/*h(598)=83 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 6664},
|
|
/*h(118)=84 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=86 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 6661},
|
|
/*h(332)=87 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1102)=89 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1102, 6660},
|
|
/*h(622)=90 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 6664},
|
|
/*h(218)=91 EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 6537},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=94 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 6663},
|
|
/*h(1606)=95 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1606, 6664},
|
|
/*h(1126)=96 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1126, 6660},
|
|
/*h(342)=97 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=101 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6661},
|
|
/*h(1630)=102 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1630, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(366)=104 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(580)=107 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 6665},
|
|
/*h(100)=108 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 6661},
|
|
/*h(1350)=109 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1350, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=114 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=116 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1374, 6662},
|
|
/*h(590)=117 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 6664},
|
|
/*h(110)=118 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(324)=121 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1094)=123 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1094, 6660},
|
|
/*h(614)=124 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=128 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=130 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1118, 6660},
|
|
/*h(334)=131 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 6662},
|
|
/*h(1660)=132 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(68)=135 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 6661},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=138 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=142 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6661},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=145 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 6660},
|
|
/*h(1404)=146 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(582)=151 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 6664},
|
|
/*h(102)=152 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=158 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1148)=160 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 6661},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(326)=165 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 6662},
|
|
/*h(1652)=166 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=172 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1662)=176 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1662, 6664},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(70)=179 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 6660},
|
|
/*h(1396)=180 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=186 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(636)=188 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1406)=190 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1406, 6662},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1620)=193 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 6665},
|
|
/*h(1140)=194 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 6661},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1644)=200 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 6665},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(380)=202 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1150)=204 EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1150, 6660},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1364)=207 EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 6663},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((22*key % 941) % 210);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x11_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[210] = {
|
|
/*h(1654)=0 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1654, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1388)=4 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(124)=6 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 6637},
|
|
/*h(1754)=7 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5470},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=10 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 6636},
|
|
/*h(1108)=11 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 6637},
|
|
/*h(628)=12 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1398)=14 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1398, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1612)=17 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 6641},
|
|
/*h(1132)=18 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 6637},
|
|
/*h(728)=19 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 5471},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=21 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5474},
|
|
/*h(638)=22 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1636)=24 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(372)=26 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 6639},
|
|
/*h(1622)=27 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1622, 6640},
|
|
/*h(1142)=28 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1142, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1356)=31 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=33 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 5475},
|
|
/*h(1646)=34 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1646, 6640},
|
|
/*h(1242)=35 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5472},
|
|
/*h(382)=36 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1380)=38 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 6639},
|
|
/*h(596)=39 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 6641},
|
|
/*h(116)=40 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 6637},
|
|
/*h(1366)=41 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1366, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1100)=45 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 6637},
|
|
/*h(620)=46 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 6641},
|
|
/*h(216)=47 EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 5473},
|
|
/*h(1390)=48 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1390, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(126)=50 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 6636},
|
|
/*h(1604)=51 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 6641},
|
|
/*h(1124)=52 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 6637},
|
|
/*h(340)=53 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1110)=55 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1110, 6636},
|
|
/*h(630)=56 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1628)=58 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(364)=60 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 6639},
|
|
/*h(1614)=61 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1614, 6640},
|
|
/*h(1134)=62 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1134, 6636},
|
|
/*h(730)=63 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5470},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1348)=65 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=67 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 6637},
|
|
/*h(1638)=68 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1638, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(374)=70 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1372)=72 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 6639},
|
|
/*h(588)=73 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 6641},
|
|
/*h(108)=74 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 6637},
|
|
/*h(1358)=75 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1358, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=77 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5474},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1092)=79 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 6637},
|
|
/*h(612)=80 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1382)=82 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1382, 6638},
|
|
/*h(598)=83 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 6640},
|
|
/*h(118)=84 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=86 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 6637},
|
|
/*h(332)=87 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1102)=89 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1102, 6636},
|
|
/*h(622)=90 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 6640},
|
|
/*h(218)=91 EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5472},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=94 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 6639},
|
|
/*h(1606)=95 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1606, 6640},
|
|
/*h(1126)=96 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1126, 6636},
|
|
/*h(342)=97 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=101 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6637},
|
|
/*h(1630)=102 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1630, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(366)=104 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(580)=107 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 6641},
|
|
/*h(100)=108 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 6637},
|
|
/*h(1350)=109 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1350, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=114 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=116 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1374, 6638},
|
|
/*h(590)=117 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 6640},
|
|
/*h(110)=118 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(324)=121 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1094)=123 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1094, 6636},
|
|
/*h(614)=124 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=128 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=130 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1118, 6636},
|
|
/*h(334)=131 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 6638},
|
|
/*h(1660)=132 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(68)=135 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 6637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=138 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=142 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=145 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 6636},
|
|
/*h(1404)=146 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(582)=151 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 6640},
|
|
/*h(102)=152 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=158 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1148)=160 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 6637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(326)=165 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 6638},
|
|
/*h(1652)=166 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=172 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1662)=176 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1662, 6640},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(70)=179 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 6636},
|
|
/*h(1396)=180 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=186 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(636)=188 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1406)=190 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1406, 6638},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1620)=193 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 6641},
|
|
/*h(1140)=194 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 6637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1644)=200 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 6641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(380)=202 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1150)=204 EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1150, 6636},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1364)=207 EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 6639},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((22*key % 941) % 210);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x12_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[210] = {
|
|
/*h(1654)=0 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1654, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1388)=4 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1388, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(124)=6 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 6619},
|
|
/*h(1754)=7 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=10 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 6618},
|
|
/*h(1108)=11 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1108, 6619},
|
|
/*h(628)=12 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1398)=14 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1398, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1612)=17 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1612, 6623},
|
|
/*h(1132)=18 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1132, 6619},
|
|
/*h(728)=19 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 5483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=21 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5486},
|
|
/*h(638)=22 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1636)=24 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1636, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(372)=26 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 6621},
|
|
/*h(1622)=27 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1622, 6622},
|
|
/*h(1142)=28 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1142, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1356)=31 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1356, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=33 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 5487},
|
|
/*h(1646)=34 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1646, 6622},
|
|
/*h(1242)=35 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5484},
|
|
/*h(382)=36 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1380)=38 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1380, 6621},
|
|
/*h(596)=39 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 6623},
|
|
/*h(116)=40 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 6619},
|
|
/*h(1366)=41 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1366, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1100)=45 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1100, 6619},
|
|
/*h(620)=46 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 6623},
|
|
/*h(216)=47 EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 5485},
|
|
/*h(1390)=48 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1390, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(126)=50 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 6618},
|
|
/*h(1604)=51 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1604, 6623},
|
|
/*h(1124)=52 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1124, 6619},
|
|
/*h(340)=53 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1110)=55 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1110, 6618},
|
|
/*h(630)=56 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1628)=58 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1628, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(364)=60 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 6621},
|
|
/*h(1614)=61 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1614, 6622},
|
|
/*h(1134)=62 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1134, 6618},
|
|
/*h(730)=63 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1348)=65 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1348, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=67 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 6619},
|
|
/*h(1638)=68 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1638, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(374)=70 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1372)=72 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1372, 6621},
|
|
/*h(588)=73 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 6623},
|
|
/*h(108)=74 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 6619},
|
|
/*h(1358)=75 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1358, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=77 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5486},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1092)=79 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1092, 6619},
|
|
/*h(612)=80 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1382)=82 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1382, 6620},
|
|
/*h(598)=83 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 6622},
|
|
/*h(118)=84 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=86 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1116, 6619},
|
|
/*h(332)=87 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1102)=89 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1102, 6618},
|
|
/*h(622)=90 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 6622},
|
|
/*h(218)=91 EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=94 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 6621},
|
|
/*h(1606)=95 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1606, 6622},
|
|
/*h(1126)=96 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1126, 6618},
|
|
/*h(342)=97 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=101 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6619},
|
|
/*h(1630)=102 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1630, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(366)=104 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(580)=107 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 6623},
|
|
/*h(100)=108 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 6619},
|
|
/*h(1350)=109 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1350, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=114 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=116 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1374, 6620},
|
|
/*h(590)=117 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 6622},
|
|
/*h(110)=118 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(324)=121 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1094)=123 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1094, 6618},
|
|
/*h(614)=124 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=128 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=130 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1118, 6618},
|
|
/*h(334)=131 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 6620},
|
|
/*h(1660)=132 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1660, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(68)=135 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 6619},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=138 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=142 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6619},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=145 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 6618},
|
|
/*h(1404)=146 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1404, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(582)=151 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 6622},
|
|
/*h(102)=152 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=158 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1148)=160 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1148, 6619},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(326)=165 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 6620},
|
|
/*h(1652)=166 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1652, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=172 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1662)=176 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1662, 6622},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(70)=179 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 6618},
|
|
/*h(1396)=180 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1396, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=186 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(636)=188 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1406)=190 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1406, 6620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1620)=193 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1620, 6623},
|
|
/*h(1140)=194 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1140, 6619},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1644)=200 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1644, 6623},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(380)=202 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1150)=204 EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1150, 6618},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1364)=207 EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1364, 6621},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((22*key % 941) % 210);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x13_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[58] = {
|
|
/*h(472)=0 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 5481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=2 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4208},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=4 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 4214},
|
|
/*h(603)=5 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 4209},
|
|
/*h(474)=6 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 5479},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=10 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4213},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=12 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 4212},
|
|
/*h(347)=13 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 4209},
|
|
/*h(218)=14 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5478},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=18 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4211},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=21 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 4209},
|
|
/*h(1624)=22 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 4210},
|
|
/*h(1883)=23 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1883, 4209},
|
|
/*h(1754)=24 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5476},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=28 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 4208},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=30 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 4214},
|
|
/*h(1627)=31 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1627, 4209},
|
|
/*h(1498)=32 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=36 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 4213},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=38 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 4212},
|
|
/*h(1371)=39 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1371, 4209},
|
|
/*h(1242)=40 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5478},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=44 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 4211},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1115)=47 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1115, 4209},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=50 EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 5477},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=54 EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 4210},
|
|
/*h(859)=55 EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 4209},
|
|
/*h(730)=56 EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5476},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 97) % 58);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x14_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[594] = {
|
|
/*h(598)=0 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 5602},
|
|
/*h(120)=1 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {120, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(360)=3 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {360, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=5 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {600, 5597},
|
|
/*h(121)=6 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {121, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(361)=8 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {361, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=10 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {601, 5597},
|
|
/*h(122)=11 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {122, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(362)=13 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {362, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=15 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {602, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(124)=21 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {124, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(364)=23 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {364, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=25 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {604, 5603},
|
|
/*h(125)=26 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {125, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(365)=28 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {365, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=30 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {605, 5603},
|
|
/*h(126)=31 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(366)=33 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=35 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(368)=43 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {368, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(608)=45 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {608, 5597},
|
|
/*h(728)=46 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 5495},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(369)=48 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {369, 5601},
|
|
/*h(1088)=49 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1088, 5599},
|
|
/*h(609)=50 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {609, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(370)=53 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {370, 5600},
|
|
/*h(1089)=54 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1089, 5599},
|
|
/*h(610)=55 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {610, 5596},
|
|
/*h(730)=56 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5494},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1090)=59 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1090, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(372)=63 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {372, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(612)=65 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {612, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(373)=68 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {373, 5607},
|
|
/*h(1092)=69 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1092, 5605},
|
|
/*h(613)=70 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {613, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(374)=73 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 5606},
|
|
/*h(1093)=74 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1093, 5605},
|
|
/*h(614)=75 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1094)=79 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1094, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(376)=83 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {376, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(616)=85 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {616, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(377)=88 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {377, 5601},
|
|
/*h(1096)=89 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1096, 5599},
|
|
/*h(617)=90 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {617, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(378)=93 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {378, 5600},
|
|
/*h(1097)=94 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1097, 5599},
|
|
/*h(618)=95 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {618, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1098)=99 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1098, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(380)=103 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {380, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(620)=105 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {620, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(381)=108 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {381, 5607},
|
|
/*h(1100)=109 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1100, 5605},
|
|
/*h(621)=110 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {621, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(382)=113 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 5606},
|
|
/*h(1101)=114 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1101, 5605},
|
|
/*h(622)=115 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1102)=119 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1102, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(624)=125 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {624, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1104)=129 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1104, 5599},
|
|
/*h(625)=130 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {625, 5597},
|
|
/*h(1344)=131 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1344, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1105)=134 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1105, 5599},
|
|
/*h(626)=135 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {626, 5596},
|
|
/*h(1345)=136 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1345, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1106)=139 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1106, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1346)=141 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1346, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(628)=145 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {628, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1108)=149 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1108, 5605},
|
|
/*h(629)=150 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {629, 5603},
|
|
/*h(1348)=151 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1348, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1109)=154 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1109, 5605},
|
|
/*h(630)=155 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 5602},
|
|
/*h(1349)=156 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1349, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1110)=159 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1110, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1350)=161 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1350, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(632)=165 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {632, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=169 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1112, 5599},
|
|
/*h(633)=170 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {633, 5597},
|
|
/*h(1352)=171 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1352, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1113)=174 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1113, 5599},
|
|
/*h(634)=175 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {634, 5596},
|
|
/*h(1353)=176 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1353, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=179 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1114, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1354)=181 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1354, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(636)=185 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {636, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=189 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1116, 5605},
|
|
/*h(637)=190 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {637, 5603},
|
|
/*h(1356)=191 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1356, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1117)=194 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1117, 5605},
|
|
/*h(638)=195 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 5602},
|
|
/*h(1357)=196 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1357, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=199 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1118, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1358)=201 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1358, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1120)=209 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1120, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1360)=211 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1360, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1600)=213 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1600, 5597},
|
|
/*h(1121)=214 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1121, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1361)=216 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1361, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1601)=218 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1601, 5597},
|
|
/*h(1122)=219 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1122, 5598},
|
|
/*h(1242)=220 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5496},
|
|
/*h(1362)=221 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1362, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1602)=223 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1602, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1124)=229 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1124, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1364)=231 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1364, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1604)=233 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1604, 5603},
|
|
/*h(1125)=234 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1125, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1365)=236 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1365, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1605)=238 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1605, 5603},
|
|
/*h(1126)=239 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1126, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1366)=241 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1366, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1606)=243 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1606, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1128)=249 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1128, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=251 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1368, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1608)=253 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1608, 5597},
|
|
/*h(1129)=254 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1129, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1369)=256 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1369, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1609)=258 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1609, 5597},
|
|
/*h(1130)=259 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1130, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=261 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1370, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1610)=263 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1610, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1132)=269 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1132, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1372)=271 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1372, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1612)=273 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1612, 5603},
|
|
/*h(1133)=274 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1133, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1373)=276 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1373, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1613)=278 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1613, 5603},
|
|
/*h(1134)=279 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1134, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=281 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1374, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1614)=283 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1614, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1136)=289 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1136, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1376)=291 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1376, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1616)=293 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1616, 5597},
|
|
/*h(1137)=294 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1137, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1377)=296 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1377, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1617)=298 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1617, 5597},
|
|
/*h(1138)=299 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1138, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1378)=301 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1378, 5600},
|
|
/*h(1498)=302 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5498},
|
|
/*h(1618)=303 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1618, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1140)=309 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1140, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1380)=311 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1380, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1620)=313 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1620, 5603},
|
|
/*h(1141)=314 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1141, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1381)=316 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1381, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1621)=318 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1621, 5603},
|
|
/*h(1142)=319 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1142, 5604},
|
|
/*h(64)=320 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5599},
|
|
/*h(1382)=321 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1382, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1622)=323 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1622, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=325 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1144)=329 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1144, 5599},
|
|
/*h(66)=330 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {66, 5598},
|
|
/*h(1384)=331 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1384, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=333 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1624, 5597},
|
|
/*h(1145)=334 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1145, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1385)=336 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1385, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1625)=338 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1625, 5597},
|
|
/*h(1146)=339 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1146, 5598},
|
|
/*h(68)=340 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {68, 5605},
|
|
/*h(1386)=341 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1386, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=343 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1626, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(69)=345 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {69, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1148)=349 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1148, 5605},
|
|
/*h(70)=350 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 5604},
|
|
/*h(1388)=351 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1388, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1628)=353 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1628, 5603},
|
|
/*h(1149)=354 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1149, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1389)=356 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1389, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1629)=358 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1629, 5603},
|
|
/*h(1150)=359 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1150, 5604},
|
|
/*h(72)=360 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5599},
|
|
/*h(1390)=361 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1390, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1630)=363 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1630, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=365 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=370 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {74, 5598},
|
|
/*h(1392)=371 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1392, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1632)=373 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1632, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1393)=376 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1393, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1633)=378 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1633, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=380 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5605},
|
|
/*h(1394)=381 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1394, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1634)=383 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1634, 5596},
|
|
/*h(1754)=384 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5494},
|
|
/*h(77)=385 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=390 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 5604},
|
|
/*h(1396)=391 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1396, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1636)=393 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1636, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1397)=396 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1397, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1637)=398 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1637, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(80)=400 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {80, 5599},
|
|
/*h(1398)=401 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1398, 5606},
|
|
/*h(320)=402 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {320, 5601},
|
|
/*h(1638)=403 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1638, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(81)=405 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {81, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(321)=407 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {321, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(82)=410 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {82, 5598},
|
|
/*h(1400)=411 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1400, 5601},
|
|
/*h(322)=412 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {322, 5600},
|
|
/*h(1640)=413 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1640, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1401)=416 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1401, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1641)=418 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1641, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=420 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {84, 5605},
|
|
/*h(1402)=421 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1402, 5600},
|
|
/*h(324)=422 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {324, 5607},
|
|
/*h(1642)=423 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1642, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(85)=425 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {85, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(325)=427 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {325, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=430 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 5604},
|
|
/*h(1404)=431 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1404, 5607},
|
|
/*h(326)=432 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 5606},
|
|
/*h(1644)=433 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1644, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1405)=436 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1405, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1645)=438 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1645, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=440 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 5599},
|
|
/*h(1406)=441 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1406, 5606},
|
|
/*h(328)=442 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {328, 5601},
|
|
/*h(1646)=443 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1646, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=445 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(329)=447 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {329, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=450 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {90, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(330)=452 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {330, 5600},
|
|
/*h(1648)=453 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1648, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1649)=458 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1649, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=460 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {92, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(332)=462 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {332, 5607},
|
|
/*h(1650)=463 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1650, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=465 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {93, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(333)=467 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {333, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=470 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(334)=472 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 5606},
|
|
/*h(1652)=473 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1652, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1653)=478 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1653, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(96)=480 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {96, 5599},
|
|
/*h(216)=481 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 5497},
|
|
/*h(336)=482 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {336, 5601},
|
|
/*h(1654)=483 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1654, 5602},
|
|
/*h(576)=484 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {576, 5597},
|
|
/*h(97)=485 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {97, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(337)=487 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {337, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(577)=489 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {577, 5597},
|
|
/*h(98)=490 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {98, 5598},
|
|
/*h(218)=491 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5496},
|
|
/*h(338)=492 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {338, 5600},
|
|
/*h(1656)=493 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1656, 5597},
|
|
/*h(578)=494 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {578, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1657)=498 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1657, 5597},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(100)=500 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {100, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(340)=502 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {340, 5607},
|
|
/*h(1658)=503 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1658, 5596},
|
|
/*h(580)=504 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {580, 5603},
|
|
/*h(101)=505 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {101, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(341)=507 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {341, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(581)=509 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {581, 5603},
|
|
/*h(102)=510 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(342)=512 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 5606},
|
|
/*h(1660)=513 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1660, 5603},
|
|
/*h(582)=514 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1661)=518 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1661, 5603},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(104)=520 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {104, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=522 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {344, 5601},
|
|
/*h(1662)=523 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1662, 5602},
|
|
/*h(584)=524 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {584, 5597},
|
|
/*h(105)=525 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {105, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=527 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {345, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(585)=529 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {585, 5597},
|
|
/*h(106)=530 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {106, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=532 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {346, 5600},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(586)=534 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {586, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(108)=540 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {108, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=542 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {348, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(588)=544 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {588, 5603},
|
|
/*h(109)=545 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {109, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=547 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {349, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(589)=549 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {589, 5603},
|
|
/*h(110)=550 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=552 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 5606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(590)=554 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 5602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(112)=560 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {112, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(352)=562 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {352, 5601},
|
|
/*h(472)=563 EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 5499},
|
|
/*h(592)=564 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {592, 5597},
|
|
/*h(113)=565 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {113, 5599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(353)=567 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {353, 5601},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(593)=569 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {593, 5597},
|
|
/*h(114)=570 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {114, 5598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(354)=572 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {354, 5600},
|
|
/*h(474)=573 EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5498},
|
|
/*h(594)=574 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {594, 5596},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=580 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {116, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=582 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {356, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(596)=584 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {596, 5603},
|
|
/*h(117)=585 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {117, 5605},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(357)=587 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {357, 5607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(597)=589 EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {597, 5603},
|
|
/*h(118)=590 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 5604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=592 EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 5606},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 599) % 594);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x15_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[594] = {
|
|
/*h(598)=0 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 5578},
|
|
/*h(120)=1 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {120, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(360)=3 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {360, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=5 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {600, 5573},
|
|
/*h(121)=6 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {121, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(361)=8 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {361, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=10 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {601, 5573},
|
|
/*h(122)=11 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {122, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(362)=13 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {362, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=15 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {602, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(124)=21 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {124, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(364)=23 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {364, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=25 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {604, 5579},
|
|
/*h(125)=26 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {125, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(365)=28 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {365, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=30 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {605, 5579},
|
|
/*h(126)=31 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(366)=33 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=35 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(368)=43 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {368, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(608)=45 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {608, 5573},
|
|
/*h(728)=46 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 5489},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(369)=48 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {369, 5577},
|
|
/*h(1088)=49 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1088, 5575},
|
|
/*h(609)=50 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {609, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(370)=53 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {370, 5576},
|
|
/*h(1089)=54 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1089, 5575},
|
|
/*h(610)=55 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {610, 5572},
|
|
/*h(730)=56 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5488},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1090)=59 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1090, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(372)=63 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {372, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(612)=65 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {612, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(373)=68 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {373, 5583},
|
|
/*h(1092)=69 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1092, 5581},
|
|
/*h(613)=70 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {613, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(374)=73 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 5582},
|
|
/*h(1093)=74 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1093, 5581},
|
|
/*h(614)=75 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1094)=79 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1094, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(376)=83 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {376, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(616)=85 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {616, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(377)=88 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {377, 5577},
|
|
/*h(1096)=89 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1096, 5575},
|
|
/*h(617)=90 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {617, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(378)=93 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {378, 5576},
|
|
/*h(1097)=94 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1097, 5575},
|
|
/*h(618)=95 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {618, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1098)=99 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1098, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(380)=103 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {380, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(620)=105 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {620, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(381)=108 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {381, 5583},
|
|
/*h(1100)=109 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1100, 5581},
|
|
/*h(621)=110 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {621, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(382)=113 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 5582},
|
|
/*h(1101)=114 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1101, 5581},
|
|
/*h(622)=115 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1102)=119 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1102, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(624)=125 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {624, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1104)=129 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1104, 5575},
|
|
/*h(625)=130 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {625, 5573},
|
|
/*h(1344)=131 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1344, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1105)=134 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1105, 5575},
|
|
/*h(626)=135 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {626, 5572},
|
|
/*h(1345)=136 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1345, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1106)=139 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1106, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1346)=141 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1346, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(628)=145 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {628, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1108)=149 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1108, 5581},
|
|
/*h(629)=150 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {629, 5579},
|
|
/*h(1348)=151 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1348, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1109)=154 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1109, 5581},
|
|
/*h(630)=155 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 5578},
|
|
/*h(1349)=156 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1349, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1110)=159 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1110, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1350)=161 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1350, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(632)=165 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {632, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=169 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1112, 5575},
|
|
/*h(633)=170 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {633, 5573},
|
|
/*h(1352)=171 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1352, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1113)=174 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1113, 5575},
|
|
/*h(634)=175 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {634, 5572},
|
|
/*h(1353)=176 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1353, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=179 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1114, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1354)=181 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1354, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(636)=185 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {636, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=189 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1116, 5581},
|
|
/*h(637)=190 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {637, 5579},
|
|
/*h(1356)=191 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1356, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1117)=194 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1117, 5581},
|
|
/*h(638)=195 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 5578},
|
|
/*h(1357)=196 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1357, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=199 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1118, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1358)=201 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1358, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1120)=209 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1120, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1360)=211 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1360, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1600)=213 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1600, 5573},
|
|
/*h(1121)=214 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1121, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1361)=216 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1361, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1601)=218 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1601, 5573},
|
|
/*h(1122)=219 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1122, 5574},
|
|
/*h(1242)=220 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5490},
|
|
/*h(1362)=221 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1362, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1602)=223 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1602, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1124)=229 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1124, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1364)=231 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1364, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1604)=233 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1604, 5579},
|
|
/*h(1125)=234 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1125, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1365)=236 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1365, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1605)=238 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1605, 5579},
|
|
/*h(1126)=239 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1126, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1366)=241 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1366, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1606)=243 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1606, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1128)=249 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1128, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=251 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1368, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1608)=253 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1608, 5573},
|
|
/*h(1129)=254 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1129, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1369)=256 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1369, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1609)=258 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1609, 5573},
|
|
/*h(1130)=259 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1130, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=261 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1370, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1610)=263 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1610, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1132)=269 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1132, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1372)=271 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1372, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1612)=273 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1612, 5579},
|
|
/*h(1133)=274 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1133, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1373)=276 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1373, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1613)=278 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1613, 5579},
|
|
/*h(1134)=279 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1134, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=281 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1374, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1614)=283 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1614, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1136)=289 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1136, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1376)=291 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1376, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1616)=293 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1616, 5573},
|
|
/*h(1137)=294 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1137, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1377)=296 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1377, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1617)=298 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1617, 5573},
|
|
/*h(1138)=299 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1138, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1378)=301 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1378, 5576},
|
|
/*h(1498)=302 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5492},
|
|
/*h(1618)=303 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1618, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1140)=309 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1140, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1380)=311 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1380, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1620)=313 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1620, 5579},
|
|
/*h(1141)=314 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1141, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1381)=316 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1381, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1621)=318 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1621, 5579},
|
|
/*h(1142)=319 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1142, 5580},
|
|
/*h(64)=320 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5575},
|
|
/*h(1382)=321 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1382, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1622)=323 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1622, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=325 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1144)=329 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1144, 5575},
|
|
/*h(66)=330 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {66, 5574},
|
|
/*h(1384)=331 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1384, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=333 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1624, 5573},
|
|
/*h(1145)=334 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1145, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1385)=336 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1385, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1625)=338 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1625, 5573},
|
|
/*h(1146)=339 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {1146, 5574},
|
|
/*h(68)=340 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {68, 5581},
|
|
/*h(1386)=341 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1386, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=343 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1626, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(69)=345 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {69, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1148)=349 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1148, 5581},
|
|
/*h(70)=350 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 5580},
|
|
/*h(1388)=351 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1388, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1628)=353 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1628, 5579},
|
|
/*h(1149)=354 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1149, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1389)=356 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1389, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1629)=358 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1629, 5579},
|
|
/*h(1150)=359 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {1150, 5580},
|
|
/*h(72)=360 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5575},
|
|
/*h(1390)=361 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1390, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1630)=363 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1630, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=365 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=370 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {74, 5574},
|
|
/*h(1392)=371 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1392, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1632)=373 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1632, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1393)=376 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1393, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1633)=378 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1633, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=380 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5581},
|
|
/*h(1394)=381 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1394, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1634)=383 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1634, 5572},
|
|
/*h(1754)=384 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5488},
|
|
/*h(77)=385 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=390 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 5580},
|
|
/*h(1396)=391 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1396, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1636)=393 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1636, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1397)=396 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1397, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1637)=398 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1637, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(80)=400 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {80, 5575},
|
|
/*h(1398)=401 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1398, 5582},
|
|
/*h(320)=402 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {320, 5577},
|
|
/*h(1638)=403 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1638, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(81)=405 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {81, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(321)=407 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {321, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(82)=410 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {82, 5574},
|
|
/*h(1400)=411 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1400, 5577},
|
|
/*h(322)=412 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {322, 5576},
|
|
/*h(1640)=413 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1640, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1401)=416 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1401, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1641)=418 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1641, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=420 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {84, 5581},
|
|
/*h(1402)=421 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {1402, 5576},
|
|
/*h(324)=422 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {324, 5583},
|
|
/*h(1642)=423 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1642, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(85)=425 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {85, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(325)=427 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {325, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=430 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 5580},
|
|
/*h(1404)=431 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1404, 5583},
|
|
/*h(326)=432 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 5582},
|
|
/*h(1644)=433 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1644, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1405)=436 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1405, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1645)=438 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1645, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=440 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 5575},
|
|
/*h(1406)=441 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {1406, 5582},
|
|
/*h(328)=442 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {328, 5577},
|
|
/*h(1646)=443 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1646, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=445 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(329)=447 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {329, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=450 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {90, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(330)=452 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {330, 5576},
|
|
/*h(1648)=453 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1648, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1649)=458 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1649, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=460 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {92, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(332)=462 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {332, 5583},
|
|
/*h(1650)=463 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1650, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=465 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {93, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(333)=467 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {333, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=470 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(334)=472 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 5582},
|
|
/*h(1652)=473 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1652, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1653)=478 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1653, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(96)=480 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {96, 5575},
|
|
/*h(216)=481 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 5491},
|
|
/*h(336)=482 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {336, 5577},
|
|
/*h(1654)=483 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1654, 5578},
|
|
/*h(576)=484 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {576, 5573},
|
|
/*h(97)=485 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {97, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(337)=487 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {337, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(577)=489 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {577, 5573},
|
|
/*h(98)=490 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {98, 5574},
|
|
/*h(218)=491 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5490},
|
|
/*h(338)=492 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {338, 5576},
|
|
/*h(1656)=493 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1656, 5573},
|
|
/*h(578)=494 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {578, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1657)=498 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1657, 5573},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(100)=500 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {100, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(340)=502 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {340, 5583},
|
|
/*h(1658)=503 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1658, 5572},
|
|
/*h(580)=504 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {580, 5579},
|
|
/*h(101)=505 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {101, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(341)=507 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {341, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(581)=509 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {581, 5579},
|
|
/*h(102)=510 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(342)=512 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 5582},
|
|
/*h(1660)=513 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1660, 5579},
|
|
/*h(582)=514 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1661)=518 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1661, 5579},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(104)=520 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {104, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=522 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {344, 5577},
|
|
/*h(1662)=523 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1662, 5578},
|
|
/*h(584)=524 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {584, 5573},
|
|
/*h(105)=525 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {105, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=527 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {345, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(585)=529 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {585, 5573},
|
|
/*h(106)=530 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {106, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=532 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {346, 5576},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(586)=534 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {586, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(108)=540 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {108, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=542 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {348, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(588)=544 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {588, 5579},
|
|
/*h(109)=545 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {109, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=547 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {349, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(589)=549 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {589, 5579},
|
|
/*h(110)=550 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=552 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 5582},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(590)=554 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 5578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(112)=560 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {112, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(352)=562 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {352, 5577},
|
|
/*h(472)=563 EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 5493},
|
|
/*h(592)=564 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {592, 5573},
|
|
/*h(113)=565 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {113, 5575},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(353)=567 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {353, 5577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(593)=569 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {593, 5573},
|
|
/*h(114)=570 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {114, 5574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(354)=572 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {354, 5576},
|
|
/*h(474)=573 EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5492},
|
|
/*h(594)=574 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {594, 5572},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=580 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {116, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=582 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {356, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(596)=584 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {596, 5579},
|
|
/*h(117)=585 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {117, 5581},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(357)=587 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {357, 5583},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(597)=589 EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {597, 5579},
|
|
/*h(118)=590 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 5580},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=592 EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 5582},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 599) % 594);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x16_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5270},
|
|
/*h(73)=1 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5273},
|
|
/*h(77)=2 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5267},
|
|
/*h(41)=3 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5275},
|
|
/*h(45)=4 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5271},
|
|
/*h(72)=5 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5273},
|
|
/*h(76)=6 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5267},
|
|
/*h(40)=7 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5275},
|
|
/*h(44)=8 EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5271},
|
|
/*h(74)=9 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5272},
|
|
/*h(78)=10 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5266},
|
|
/*h(42)=11 EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5274}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 43) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x18_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4130},
|
|
/*h(600)=1 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {600, 4129},
|
|
/*h(346)=2 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4134},
|
|
/*h(344)=3 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {344, 4133},
|
|
/*h(90)=4 EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4132},
|
|
/*h(88)=5 EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {88, 4131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x19_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*h(600)=0 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE2()*/ {600, 6057},
|
|
/*h(350)=1 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4128},
|
|
/*h(348)=2 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE1()*/ {348, 4127},
|
|
/*h(346)=3 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6054},
|
|
/*h(344)=4 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE2()*/ {344, 6055},
|
|
/*h(606)=5 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4126},
|
|
/*h(604)=6 EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE1()*/ {604, 4125},
|
|
/*h(602)=7 EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6056}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 11) % 8);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(348)=0 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 6059},
|
|
/*h(604)=1 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 6060},
|
|
/*h(344)=2 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 4120},
|
|
/*h(600)=3 EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 4119}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(604)=0 EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4121},
|
|
/*h(600)=1 EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 6058}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=2 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {44, 6237},
|
|
/*h(172)=3 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {172, 6239},
|
|
/*h(300)=4 EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {300, 6241},
|
|
/*h(46)=5 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {46, 6236},
|
|
/*h(174)=6 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {174, 6238},
|
|
/*h(302)=7 EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {302, 6240},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 12ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=2 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6243},
|
|
/*h(172)=3 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {172, 6245},
|
|
/*h(300)=4 EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {300, 6247},
|
|
/*h(46)=5 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {46, 6242},
|
|
/*h(174)=6 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {174, 6244},
|
|
/*h(302)=7 EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {302, 6246},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 12ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(89)=0 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 5074},
|
|
/*h(602)=1 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5071},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=3 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 5076},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=6 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 5074},
|
|
/*h(601)=7 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 5072},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 5076},
|
|
/*h(90)=11 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5073},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=14 EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 5072},
|
|
/*h(346)=15 EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5075},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x1f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(94)=0 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5079},
|
|
/*h(350)=1 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5081},
|
|
/*h(606)=2 EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5077},
|
|
/*h(92)=3 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 5080},
|
|
/*h(348)=4 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 5082},
|
|
/*h(604)=5 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 5078},
|
|
/*h(93)=6 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 5080},
|
|
/*h(349)=7 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 5082},
|
|
/*h(605)=8 EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 5078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 13) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x20_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 6527},
|
|
/*h(1498)=1 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 6527},
|
|
/*h(728)=2 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 6530},
|
|
/*h(218)=3 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 6525},
|
|
/*h(1242)=4 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 6525},
|
|
/*h(472)=5 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 6528},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 6526},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 6529},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1624, 6536},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1368, 6534},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1112, 6532},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 6535},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 6533},
|
|
/*h(600)=30 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {600, 6536},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 6531},
|
|
/*h(344)=33 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {344, 6534},
|
|
/*h(1628)=34 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1628, 6536},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {88, 6532},
|
|
/*h(1372)=37 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1372, 6534},
|
|
/*h(602)=38 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 6535},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1116, 6532},
|
|
/*h(346)=41 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 6533},
|
|
/*h(1630)=42 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 6535},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 6531},
|
|
/*h(1374)=45 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 6533},
|
|
/*h(604)=46 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {604, 6536},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 6531},
|
|
/*h(348)=49 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {348, 6534},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {92, 6532},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 6535},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 6533},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 6531},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 6529},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x21_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5414},
|
|
/*h(1498)=1 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5414},
|
|
/*h(728)=2 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 5411},
|
|
/*h(218)=3 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5412},
|
|
/*h(1242)=4 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5412},
|
|
/*h(472)=5 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 5415},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 5413},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5410},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1624, 5441},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1368, 5445},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1112, 5443},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5440},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5444},
|
|
/*h(600)=30 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {600, 5441},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5442},
|
|
/*h(344)=33 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {344, 5445},
|
|
/*h(1628)=34 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1628, 5441},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {88, 5443},
|
|
/*h(1372)=37 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1372, 5445},
|
|
/*h(602)=38 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5440},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1116, 5443},
|
|
/*h(346)=41 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5444},
|
|
/*h(1630)=42 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5440},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5442},
|
|
/*h(1374)=45 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5444},
|
|
/*h(604)=46 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {604, 5441},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5442},
|
|
/*h(348)=49 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {348, 5445},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {92, 5443},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5440},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5444},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5442},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5410},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x22_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5426},
|
|
/*h(1498)=1 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5426},
|
|
/*h(728)=2 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 5423},
|
|
/*h(218)=3 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5424},
|
|
/*h(1242)=4 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5424},
|
|
/*h(472)=5 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 5427},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 5425},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5422},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1624, 5447},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1368, 5451},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1112, 5449},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5446},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5450},
|
|
/*h(600)=30 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {600, 5447},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5448},
|
|
/*h(344)=33 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {344, 5451},
|
|
/*h(1628)=34 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1628, 5447},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {88, 5449},
|
|
/*h(1372)=37 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1372, 5451},
|
|
/*h(602)=38 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5446},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1116, 5449},
|
|
/*h(346)=41 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5450},
|
|
/*h(1630)=42 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5446},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5448},
|
|
/*h(1374)=45 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5450},
|
|
/*h(604)=46 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {604, 5447},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5448},
|
|
/*h(348)=49 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {348, 5451},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {92, 5449},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5446},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5450},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5448},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5422},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x23_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5420},
|
|
/*h(1498)=1 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5420},
|
|
/*h(728)=2 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 5417},
|
|
/*h(218)=3 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5418},
|
|
/*h(1242)=4 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5418},
|
|
/*h(472)=5 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 5421},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 5419},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5416},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 5459},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 5463},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 5461},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5458},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5462},
|
|
/*h(600)=30 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 5459},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5460},
|
|
/*h(344)=33 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 5463},
|
|
/*h(1628)=34 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1628, 5459},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 5461},
|
|
/*h(1372)=37 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1372, 5463},
|
|
/*h(602)=38 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5458},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1116, 5461},
|
|
/*h(346)=41 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5462},
|
|
/*h(1630)=42 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5458},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5460},
|
|
/*h(1374)=45 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5462},
|
|
/*h(604)=46 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {604, 5459},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5460},
|
|
/*h(348)=49 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {348, 5463},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {92, 5461},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5458},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5462},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5460},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5416},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x24_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5438},
|
|
/*h(1498)=1 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5438},
|
|
/*h(728)=2 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 5435},
|
|
/*h(218)=3 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5436},
|
|
/*h(1242)=4 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5436},
|
|
/*h(472)=5 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 5439},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 5437},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5434},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1624, 5465},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1368, 5469},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1112, 5467},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5464},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5468},
|
|
/*h(600)=30 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {600, 5465},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5466},
|
|
/*h(344)=33 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {344, 5469},
|
|
/*h(1628)=34 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1628, 5465},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {88, 5467},
|
|
/*h(1372)=37 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1372, 5469},
|
|
/*h(602)=38 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5464},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1116, 5467},
|
|
/*h(346)=41 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5468},
|
|
/*h(1630)=42 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5464},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5466},
|
|
/*h(1374)=45 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5468},
|
|
/*h(604)=46 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {604, 5465},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5466},
|
|
/*h(348)=49 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {348, 5469},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {92, 5467},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5464},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5468},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5466},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5434},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x25_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[31] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=2 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {600, 5453},
|
|
/*h(218)=3 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5430},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=5 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1624, 5453},
|
|
/*h(1242)=6 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5430},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=8 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5452},
|
|
/*h(344)=9 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {344, 5457},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=11 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 5452},
|
|
/*h(1368)=12 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1368, 5457},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=14 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 5429},
|
|
/*h(346)=15 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5456},
|
|
/*h(88)=16 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {88, 5455},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=18 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 5456},
|
|
/*h(1112)=19 EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1112, 5455},
|
|
/*h(730)=20 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5428},
|
|
/*h(472)=21 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 5433},
|
|
/*h(90)=22 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5454},
|
|
/*h(1754)=23 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5428},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=25 EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 5454},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=27 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5432},
|
|
/*h(216)=28 EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 5431},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=30 EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5432}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 31);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x26_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[24] = {
|
|
/*h(74)=0 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {74, 6718},
|
|
/*h(78)=1 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {78, 6724},
|
|
/*h(8)=2 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6715},
|
|
/*h(12)=3 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6721},
|
|
/*h(90)=4 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {90, 6730},
|
|
/*h(94)=5 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {94, 6736},
|
|
/*h(24)=6 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {24, 6727},
|
|
/*h(28)=7 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {28, 6733},
|
|
/*h(10)=8 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {10, 6714},
|
|
/*h(14)=9 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {14, 6720},
|
|
/*h(40)=10 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6717},
|
|
/*h(44)=11 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6723},
|
|
/*h(26)=12 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {26, 6726},
|
|
/*h(30)=13 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {30, 6732},
|
|
/*h(56)=14 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {56, 6729},
|
|
/*h(60)=15 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {60, 6735},
|
|
/*h(42)=16 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {42, 6716},
|
|
/*h(46)=17 EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {46, 6722},
|
|
/*h(72)=18 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6719},
|
|
/*h(76)=19 EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6725},
|
|
/*h(58)=20 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {58, 6728},
|
|
/*h(62)=21 EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {62, 6734},
|
|
/*h(88)=22 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {88, 6731},
|
|
/*h(92)=23 EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6737}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((15*key % 59) % 24);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x27_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[54] = {
|
|
/*h(89)=0 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 5771},
|
|
/*h(13)=1 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5767},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=3 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {26, 5772},
|
|
/*h(60)=4 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {60, 5781},
|
|
/*h(94)=5 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {94, 5776},
|
|
/*h(73)=6 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5759},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=9 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {10, 5760},
|
|
/*h(44)=10 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5769},
|
|
/*h(78)=11 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {78, 5764},
|
|
/*h(57)=12 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {57, 5775},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(28)=16 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {28, 5779},
|
|
/*h(62)=17 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {62, 5780},
|
|
/*h(41)=18 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5763},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=20 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 5771},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=22 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5767},
|
|
/*h(46)=23 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {46, 5768},
|
|
/*h(25)=24 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {25, 5773},
|
|
/*h(93)=25 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {93, 5777},
|
|
/*h(72)=26 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5759},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(30)=29 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {30, 5778},
|
|
/*h(9)=30 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5761},
|
|
/*h(77)=31 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5765},
|
|
/*h(56)=32 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {56, 5775},
|
|
/*h(90)=33 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {90, 5770},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=35 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {14, 5766},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(61)=37 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {61, 5781},
|
|
/*h(40)=38 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5763},
|
|
/*h(74)=39 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {74, 5758},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=43 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5769},
|
|
/*h(24)=44 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {24, 5773},
|
|
/*h(58)=45 EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {58, 5774},
|
|
/*h(92)=46 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {92, 5777},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(29)=49 EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {29, 5779},
|
|
/*h(8)=50 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5761},
|
|
/*h(42)=51 EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {42, 5762},
|
|
/*h(76)=52 EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5765},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 54ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1164)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1164, 5530},
|
|
/*h(2761)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2761, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3212)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3212;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1228)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1228;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3276)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3276;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1196)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1196, 5530},
|
|
/*h(2793)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2793, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3244)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3244;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1260)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1260, 5530},
|
|
/*h(650)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {650, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3308)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3308;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1180)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1180, 5530},
|
|
/*h(2777)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2777, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3228)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3228;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_245_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1244)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1244;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1462)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 MASK=0*/ {1462, 6512},
|
|
/*h(3292)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3292, 5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 7) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1212)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1212, 5530},
|
|
/*h(2809)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2809, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3260)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3260;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(666)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {666, 5535},
|
|
/*h(1276)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1276, 5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3324)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3324, 5530},
|
|
/*h(2714)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2714, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1166)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1166, 5530},
|
|
/*h(2763)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2763, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1240)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1240, 5531},
|
|
/*h(3214)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3214, 5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1230)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1230, 5530},
|
|
/*h(2217)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2217, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3278)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3278;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1198)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1198, 5530},
|
|
/*h(2185)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2185, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3246)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3246, 5530},
|
|
/*h(1272)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1272, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(652)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {652, 5534},
|
|
/*h(2249)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2249, 5533},
|
|
/*h(1262)=2 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1262, 5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2700)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2700, 5534},
|
|
/*h(3310)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3310, 5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1182)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1182, 5530},
|
|
/*h(2779)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2779, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(3230)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3230, 5530},
|
|
/*h(1256)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1256, 5531},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1246)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1246, 5530},
|
|
/*h(2233)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2233, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3294)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3294;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1214)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1214, 5530},
|
|
/*h(2201)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2201, 5533},
|
|
/*h(2811)=2 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2811, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3262)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3262;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1278)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1278, 5530},
|
|
/*h(2265)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2265, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3326)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3326, 5530},
|
|
/*h(2716)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2716, 5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1160)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1160;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3208)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1224)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1224;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3272)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3272;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_204_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1192)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1192;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3240)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3240;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3304)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3304;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1176)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1176;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3224)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3224;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3288)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3288;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1208)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3256)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3256;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3320)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3320;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1162)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1162;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3210)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3210, 5531},
|
|
/*h(249)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {249, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1226)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1226;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3274)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1194)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1194;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3242)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1258)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1258;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3306)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3306, 5531},
|
|
/*h(2696)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2696, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1178)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1178;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_228_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3226)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3226;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1242)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_97_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3290)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3290;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1210)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3258)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3258;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1274)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1274, 5531},
|
|
/*h(664)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {664, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3322)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3322;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(174)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {174, 5532},
|
|
/*h(1161)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1161, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2222)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2222, 5532},
|
|
/*h(3209)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3209, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1225)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1225;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2286)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2286, 5532},
|
|
/*h(3273)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3273, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(206)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {206, 5532},
|
|
/*h(1193)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1193, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2254)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2254, 5532},
|
|
/*h(3241)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3241, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1257)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1257;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3305)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3305;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(190)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {190, 5532},
|
|
/*h(1177)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1177, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3225)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3225;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(254)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {254, 5532},
|
|
/*h(1241)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1241, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_209_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2302)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2302, 5532},
|
|
/*h(3289)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3289, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(222)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {222, 5532},
|
|
/*h(1209)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1209, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2270)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2270, 5532},
|
|
/*h(3257)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3257, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1273)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1273;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3321)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3321;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2760)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2760, 5535},
|
|
/*h(1163)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1163, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3211)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3211, 5531},
|
|
/*h(250)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {250, 5533},
|
|
/*h(1470)=2 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 MASK=0*/ {1470, 6521}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1227)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3275)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3275;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2792)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2792, 5535},
|
|
/*h(1195)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1195, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3243)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1259)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1259, 5531},
|
|
/*h(649)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {649, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2697)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2697, 5535},
|
|
/*h(3307)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3307, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2776)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2776, 5535},
|
|
/*h(1179)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1179, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3227)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1243)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3291)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3291;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2808)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2808, 5535},
|
|
/*h(1211)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1211, 5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3259)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3259;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1275)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5531}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1275;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3323)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3323, 5531},
|
|
/*h(2713)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2713, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(750)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {750, 5534},
|
|
/*h(140)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {140, 5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2188)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2188;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(204)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 204;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2252)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2252;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(172)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 172;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2220)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2220;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_251_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(236)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 236;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2284)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2284;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_121_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(156)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {156, 5532},
|
|
/*h(766)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {766, 5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2814)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2814, 5534},
|
|
/*h(2204)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2204, 5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_284_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(220)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 220;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2268)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2268;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(188)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 188;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2236)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2236;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(252)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 252;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2300)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2300;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(142)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2190)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2190, 5532},
|
|
/*h(216)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {216, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(238)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 238;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(158)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 158;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2206)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2206, 5532},
|
|
/*h(232)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {232, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2238)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5532}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2238;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(746)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {746, 5535},
|
|
/*h(136)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {136, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_231_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2184)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2184, 5533},
|
|
/*h(2794)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2794, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(200)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2248)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(168)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 168;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2216)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2216;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2280)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2280, 5533},
|
|
/*h(683)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {683, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {762, 5535},
|
|
/*h(152)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {152, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2810)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2810, 5535},
|
|
/*h(2200)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2200, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2264)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2264, 5533},
|
|
/*h(667)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {667, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(184)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 184;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2232)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2232;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(248)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2296)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2296, 5533},
|
|
/*h(699)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {699, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(138)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 138;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2796)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2796, 5534},
|
|
/*h(2186)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2186, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(202)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 202;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2250)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(170)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 170;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2218)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2218;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(234)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 234;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2282)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(764)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {764, 5534},
|
|
/*h(154)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {154, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2202)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2202;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(218)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 218;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2266)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2266;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(186)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 186;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2234)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2234;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2298)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2298;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(747)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {747, 5535},
|
|
/*h(137)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {137, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(201)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 201;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(169)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 169;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(233)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 233;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(684)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {684, 5534},
|
|
/*h(2281)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2281, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(153)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {153, 5533},
|
|
/*h(763)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {763, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(217)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 217;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(185)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 185;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(700)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {700, 5534},
|
|
/*h(2297)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2297, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(139)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 139;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2187)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2187;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(203)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 203;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(654)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {654, 5534},
|
|
/*h(2251)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2251, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(171)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 171;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2219)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(235)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(686)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {686, 5534},
|
|
/*h(2283)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2283, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_233_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(155)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 155;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2203)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2203;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(219)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(670)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {670, 5534},
|
|
/*h(2267)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2267, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(187)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 187;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2235)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(251)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 251;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(702)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {702, 5534},
|
|
/*h(2299)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2299, 5533}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(716)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 716;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2764)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2764;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2732)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2732;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(748)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 748;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(668)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 668;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(732)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 732;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2780)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2780;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2748)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2748;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2812)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2812;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2702)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(718)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2766)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(760)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {760, 5535},
|
|
/*h(2734)=1 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2734, 5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2798)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2718)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2718, 5534},
|
|
/*h(744)=1 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {744, 5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(734)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2782)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2782;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2750)=0 EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5534}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(648)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 648;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(680)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 680;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2728)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2728;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2712)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_273_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(728)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 728;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(696)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 696;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_260_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2744)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2744;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2698)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2698;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2762)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(682)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2730)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(730)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2778)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(698)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 698;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2746)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(713)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 713;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(681)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 681;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2729)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2729;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(745)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 745;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(665)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 665;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(729)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 729;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_226_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(697)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 697;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2745)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2745;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(761)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 761;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(651)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 651;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2699)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2699;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_262_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(715)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 715;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2731)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2731;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2795)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_282_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2715)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2715;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(731)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 731;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2747)=0 EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5535}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2747;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(438)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 MASK=0*/ {6510}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 438;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 MASK=0*/ {6511}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(446)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {6519}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 446;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(958)=0 EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 MASK=0*/ {6520}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x28_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[294] = {
|
|
/*h(233)=0 */ {233, xed3_phash_find_mapevex_map2_opcode0x28_vv2_0_l1},
|
|
/*h(699)=1 */ {699, xed3_phash_find_mapevex_map2_opcode0x28_vv2_1_l1},
|
|
/*h(2762)=2 */ {2762, xed3_phash_find_mapevex_map2_opcode0x28_vv2_2_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3228)=4 */ {3228, xed3_phash_find_mapevex_map2_opcode0x28_vv2_4_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2796)=6 */ {2796, xed3_phash_find_mapevex_map2_opcode0x28_vv2_6_l1},
|
|
/*h(3262)=7 */ {3262, xed3_phash_find_mapevex_map2_opcode0x28_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2220)=10 */ {2220, xed3_phash_find_mapevex_map2_opcode0x28_vv2_10_l1},
|
|
/*h(712)=11 */ {712, xed3_phash_find_mapevex_map2_opcode0x28_vv2_11_l1},
|
|
/*h(1178)=12 */ {1178, xed3_phash_find_mapevex_map2_opcode0x28_vv2_12_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2254)=14 */ {2254, xed3_phash_find_mapevex_map2_opcode0x28_vv2_14_l1},
|
|
/*h(746)=15 */ {746, xed3_phash_find_mapevex_map2_opcode0x28_vv2_15_l1},
|
|
/*h(2809)=16 */ {2809, xed3_phash_find_mapevex_map2_opcode0x28_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3275)=18 */ {3275, xed3_phash_find_mapevex_map2_opcode0x28_vv2_18_l1},
|
|
/*h(170)=19 */ {170, xed3_phash_find_mapevex_map2_opcode0x28_vv2_19_l1},
|
|
/*h(2233)=20 */ {2233, xed3_phash_find_mapevex_map2_opcode0x28_vv2_20_l1},
|
|
/*h(2699)=21 */ {2699, xed3_phash_find_mapevex_map2_opcode0x28_vv2_21_l1},
|
|
/*h(958)=22 */ {958, xed3_phash_find_mapevex_map2_opcode0x28_vv2_22_l1},
|
|
/*h(204)=23 */ {204, xed3_phash_find_mapevex_map2_opcode0x28_vv2_23_l1},
|
|
/*h(670)=24 */ {670, xed3_phash_find_mapevex_map2_opcode0x28_vv2_24_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1225)=26 */ {1225, xed3_phash_find_mapevex_map2_opcode0x28_vv2_26_l1},
|
|
/*h(238)=27 */ {238, xed3_phash_find_mapevex_map2_opcode0x28_vv2_27_l1},
|
|
/*h(3288)=28 */ {3288, xed3_phash_find_mapevex_map2_opcode0x28_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(649)=30 */ {649, xed3_phash_find_mapevex_map2_opcode0x28_vv2_30_l1},
|
|
/*h(2712)=31 */ {2712, xed3_phash_find_mapevex_map2_opcode0x28_vv2_31_l1},
|
|
/*h(3322)=32 */ {3322, xed3_phash_find_mapevex_map2_opcode0x28_vv2_32_l1},
|
|
/*h(217)=33 */ {217, xed3_phash_find_mapevex_map2_opcode0x28_vv2_33_l1},
|
|
/*h(683)=34 */ {683, xed3_phash_find_mapevex_map2_opcode0x28_vv2_34_l1},
|
|
/*h(2746)=35 */ {2746, xed3_phash_find_mapevex_map2_opcode0x28_vv2_35_l1},
|
|
/*h(3212)=36 */ {3212, xed3_phash_find_mapevex_map2_opcode0x28_vv2_36_l1},
|
|
/*h(251)=37 */ {251, xed3_phash_find_mapevex_map2_opcode0x28_vv2_37_l1},
|
|
/*h(950)=38 */ {950, xed3_phash_find_mapevex_map2_opcode0x28_vv2_38_l1},
|
|
/*h(2780)=39 */ {2780, xed3_phash_find_mapevex_map2_opcode0x28_vv2_39_l1},
|
|
/*h(1272)=40 */ {1272, xed3_phash_find_mapevex_map2_opcode0x28_vv2_40_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2814)=43 */ {2814, xed3_phash_find_mapevex_map2_opcode0x28_vv2_43_l1},
|
|
/*h(696)=44 */ {696, xed3_phash_find_mapevex_map2_opcode0x28_vv2_44_l1},
|
|
/*h(1162)=45 */ {1162, xed3_phash_find_mapevex_map2_opcode0x28_vv2_45_l1},
|
|
/*h(3225)=46 */ {3225, xed3_phash_find_mapevex_map2_opcode0x28_vv2_46_l1},
|
|
/*h(2238)=47 */ {2238, xed3_phash_find_mapevex_map2_opcode0x28_vv2_47_l1},
|
|
/*h(730)=48 */ {730, xed3_phash_find_mapevex_map2_opcode0x28_vv2_48_l1},
|
|
/*h(2793)=49 */ {2793, xed3_phash_find_mapevex_map2_opcode0x28_vv2_49_l1},
|
|
/*h(3259)=50 */ {3259, xed3_phash_find_mapevex_map2_opcode0x28_vv2_50_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(764)=52 */ {764, xed3_phash_find_mapevex_map2_opcode0x28_vv2_52_l1},
|
|
/*h(2217)=53 */ {2217, xed3_phash_find_mapevex_map2_opcode0x28_vv2_53_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(188)=55 */ {188, xed3_phash_find_mapevex_map2_opcode0x28_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(654)=57 */ {654, xed3_phash_find_mapevex_map2_opcode0x28_vv2_57_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(222)=59 */ {222, xed3_phash_find_mapevex_map2_opcode0x28_vv2_59_l1},
|
|
/*h(3272)=60 */ {3272, xed3_phash_find_mapevex_map2_opcode0x28_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1243)=63 */ {1243, xed3_phash_find_mapevex_map2_opcode0x28_vv2_63_l1},
|
|
/*h(2696)=64 */ {2696, xed3_phash_find_mapevex_map2_opcode0x28_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(201)=66 */ {201, xed3_phash_find_mapevex_map2_opcode0x28_vv2_66_l1},
|
|
/*h(667)=67 */ {667, xed3_phash_find_mapevex_map2_opcode0x28_vv2_67_l1},
|
|
/*h(2730)=68 */ {2730, xed3_phash_find_mapevex_map2_opcode0x28_vv2_68_l1},
|
|
/*h(235)=69 */ {235, xed3_phash_find_mapevex_map2_opcode0x28_vv2_69_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2298)=71 */ {2298, xed3_phash_find_mapevex_map2_opcode0x28_vv2_71_l1},
|
|
/*h(2764)=72 */ {2764, xed3_phash_find_mapevex_map2_opcode0x28_vv2_72_l1},
|
|
/*h(1256)=73 */ {1256, xed3_phash_find_mapevex_map2_opcode0x28_vv2_73_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2188)=75 */ {2188, xed3_phash_find_mapevex_map2_opcode0x28_vv2_75_l1},
|
|
/*h(2798)=76 */ {2798, xed3_phash_find_mapevex_map2_opcode0x28_vv2_76_l1},
|
|
/*h(680)=77 */ {680, xed3_phash_find_mapevex_map2_opcode0x28_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2222)=79 */ {2222, xed3_phash_find_mapevex_map2_opcode0x28_vv2_79_l1},
|
|
/*h(248)=80 */ {248, xed3_phash_find_mapevex_map2_opcode0x28_vv2_80_l1},
|
|
/*h(714)=81 */ {714, xed3_phash_find_mapevex_map2_opcode0x28_vv2_81_l1},
|
|
/*h(2777)=82 */ {2777, xed3_phash_find_mapevex_map2_opcode0x28_vv2_82_l1},
|
|
/*h(3243)=83 */ {3243, xed3_phash_find_mapevex_map2_opcode0x28_vv2_83_l1},
|
|
/*h(138)=84 */ {138, xed3_phash_find_mapevex_map2_opcode0x28_vv2_84_l1},
|
|
/*h(748)=85 */ {748, xed3_phash_find_mapevex_map2_opcode0x28_vv2_85_l1},
|
|
/*h(2811)=86 */ {2811, xed3_phash_find_mapevex_map2_opcode0x28_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(172)=88 */ {172, xed3_phash_find_mapevex_map2_opcode0x28_vv2_88_l1},
|
|
/*h(2235)=89 */ {2235, xed3_phash_find_mapevex_map2_opcode0x28_vv2_89_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(206)=92 */ {206, xed3_phash_find_mapevex_map2_opcode0x28_vv2_92_l1},
|
|
/*h(3256)=93 */ {3256, xed3_phash_find_mapevex_map2_opcode0x28_vv2_93_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(761)=95 */ {761, xed3_phash_find_mapevex_map2_opcode0x28_vv2_95_l1},
|
|
/*h(1227)=96 */ {1227, xed3_phash_find_mapevex_map2_opcode0x28_vv2_96_l1},
|
|
/*h(3290)=97 */ {3290, xed3_phash_find_mapevex_map2_opcode0x28_vv2_97_l1},
|
|
/*h(185)=98 */ {185, xed3_phash_find_mapevex_map2_opcode0x28_vv2_98_l1},
|
|
/*h(651)=99 */ {651, xed3_phash_find_mapevex_map2_opcode0x28_vv2_99_l1},
|
|
/*h(2248)=100 */ {2248, xed3_phash_find_mapevex_map2_opcode0x28_vv2_100_l1},
|
|
/*h(2714)=101 */ {2714, xed3_phash_find_mapevex_map2_opcode0x28_vv2_101_l1},
|
|
/*h(219)=102 */ {219, xed3_phash_find_mapevex_map2_opcode0x28_vv2_102_l1},
|
|
/*h(2282)=103 */ {2282, xed3_phash_find_mapevex_map2_opcode0x28_vv2_103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2748)=105 */ {2748, xed3_phash_find_mapevex_map2_opcode0x28_vv2_105_l1},
|
|
/*h(1240)=106 */ {1240, xed3_phash_find_mapevex_map2_opcode0x28_vv2_106_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2782)=108 */ {2782, xed3_phash_find_mapevex_map2_opcode0x28_vv2_108_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(664)=110 */ {664, xed3_phash_find_mapevex_map2_opcode0x28_vv2_110_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(232)=112 */ {232, xed3_phash_find_mapevex_map2_opcode0x28_vv2_112_l1},
|
|
/*h(698)=113 */ {698, xed3_phash_find_mapevex_map2_opcode0x28_vv2_113_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2761)=115 */ {2761, xed3_phash_find_mapevex_map2_opcode0x28_vv2_115_l1},
|
|
/*h(3227)=116 */ {3227, xed3_phash_find_mapevex_map2_opcode0x28_vv2_116_l1},
|
|
/*h(732)=117 */ {732, xed3_phash_find_mapevex_map2_opcode0x28_vv2_117_l1},
|
|
/*h(2185)=118 */ {2185, xed3_phash_find_mapevex_map2_opcode0x28_vv2_118_l1},
|
|
/*h(2795)=119 */ {2795, xed3_phash_find_mapevex_map2_opcode0x28_vv2_119_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(766)=121 */ {766, xed3_phash_find_mapevex_map2_opcode0x28_vv2_121_l1},
|
|
/*h(2219)=122 */ {2219, xed3_phash_find_mapevex_map2_opcode0x28_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(190)=125 */ {190, xed3_phash_find_mapevex_map2_opcode0x28_vv2_125_l1},
|
|
/*h(3240)=126 */ {3240, xed3_phash_find_mapevex_map2_opcode0x28_vv2_126_l1},
|
|
/*h(745)=127 */ {745, xed3_phash_find_mapevex_map2_opcode0x28_vv2_127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2808)=129 */ {2808, xed3_phash_find_mapevex_map2_opcode0x28_vv2_129_l1},
|
|
/*h(3274)=130 */ {3274, xed3_phash_find_mapevex_map2_opcode0x28_vv2_130_l1},
|
|
/*h(169)=131 */ {169, xed3_phash_find_mapevex_map2_opcode0x28_vv2_131_l1},
|
|
/*h(2232)=132 */ {2232, xed3_phash_find_mapevex_map2_opcode0x28_vv2_132_l1},
|
|
/*h(2698)=133 */ {2698, xed3_phash_find_mapevex_map2_opcode0x28_vv2_133_l1},
|
|
/*h(3308)=134 */ {3308, xed3_phash_find_mapevex_map2_opcode0x28_vv2_134_l1},
|
|
/*h(203)=135 */ {203, xed3_phash_find_mapevex_map2_opcode0x28_vv2_135_l1},
|
|
/*h(2266)=136 */ {2266, xed3_phash_find_mapevex_map2_opcode0x28_vv2_136_l1},
|
|
/*h(2732)=137 */ {2732, xed3_phash_find_mapevex_map2_opcode0x28_vv2_137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1224)=139 */ {1224, xed3_phash_find_mapevex_map2_opcode0x28_vv2_139_l1},
|
|
/*h(2300)=140 */ {2300, xed3_phash_find_mapevex_map2_opcode0x28_vv2_140_l1},
|
|
/*h(2766)=141 */ {2766, xed3_phash_find_mapevex_map2_opcode0x28_vv2_141_l1},
|
|
/*h(648)=142 */ {648, xed3_phash_find_mapevex_map2_opcode0x28_vv2_142_l1},
|
|
/*h(1258)=143 */ {1258, xed3_phash_find_mapevex_map2_opcode0x28_vv2_143_l1},
|
|
/*h(3321)=144 */ {3321, xed3_phash_find_mapevex_map2_opcode0x28_vv2_144_l1},
|
|
/*h(216)=145 */ {216, xed3_phash_find_mapevex_map2_opcode0x28_vv2_145_l1},
|
|
/*h(682)=146 */ {682, xed3_phash_find_mapevex_map2_opcode0x28_vv2_146_l1},
|
|
/*h(2745)=147 */ {2745, xed3_phash_find_mapevex_map2_opcode0x28_vv2_147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1470)=149 */ {1470, xed3_phash_find_mapevex_map2_opcode0x28_vv2_149_l1},
|
|
/*h(716)=150 */ {716, xed3_phash_find_mapevex_map2_opcode0x28_vv2_150_l1},
|
|
/*h(2779)=151 */ {2779, xed3_phash_find_mapevex_map2_opcode0x28_vv2_151_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(750)=154 */ {750, xed3_phash_find_mapevex_map2_opcode0x28_vv2_154_l1},
|
|
/*h(2203)=155 */ {2203, xed3_phash_find_mapevex_map2_opcode0x28_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(174)=158 */ {174, xed3_phash_find_mapevex_map2_opcode0x28_vv2_158_l1},
|
|
/*h(3224)=159 */ {3224, xed3_phash_find_mapevex_map2_opcode0x28_vv2_159_l1},
|
|
/*h(729)=160 */ {729, xed3_phash_find_mapevex_map2_opcode0x28_vv2_160_l1},
|
|
/*h(2792)=161 */ {2792, xed3_phash_find_mapevex_map2_opcode0x28_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3258)=163 */ {3258, xed3_phash_find_mapevex_map2_opcode0x28_vv2_163_l1},
|
|
/*h(763)=164 */ {763, xed3_phash_find_mapevex_map2_opcode0x28_vv2_164_l1},
|
|
/*h(2216)=165 */ {2216, xed3_phash_find_mapevex_map2_opcode0x28_vv2_165_l1},
|
|
/*h(1462)=166 */ {1462, xed3_phash_find_mapevex_map2_opcode0x28_vv2_166_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(187)=168 */ {187, xed3_phash_find_mapevex_map2_opcode0x28_vv2_168_l1},
|
|
/*h(2250)=169 */ {2250, xed3_phash_find_mapevex_map2_opcode0x28_vv2_169_l1},
|
|
/*h(2716)=170 */ {2716, xed3_phash_find_mapevex_map2_opcode0x28_vv2_170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1208)=172 */ {1208, xed3_phash_find_mapevex_map2_opcode0x28_vv2_172_l1},
|
|
/*h(2284)=173 */ {2284, xed3_phash_find_mapevex_map2_opcode0x28_vv2_173_l1},
|
|
/*h(2750)=174 */ {2750, xed3_phash_find_mapevex_map2_opcode0x28_vv2_174_l1},
|
|
/*h(1242)=175 */ {1242, xed3_phash_find_mapevex_map2_opcode0x28_vv2_175_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3305)=177 */ {3305, xed3_phash_find_mapevex_map2_opcode0x28_vv2_177_l1},
|
|
/*h(200)=178 */ {200, xed3_phash_find_mapevex_map2_opcode0x28_vv2_178_l1},
|
|
/*h(666)=179 */ {666, xed3_phash_find_mapevex_map2_opcode0x28_vv2_179_l1},
|
|
/*h(2729)=180 */ {2729, xed3_phash_find_mapevex_map2_opcode0x28_vv2_180_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(234)=182 */ {234, xed3_phash_find_mapevex_map2_opcode0x28_vv2_182_l1},
|
|
/*h(700)=183 */ {700, xed3_phash_find_mapevex_map2_opcode0x28_vv2_183_l1},
|
|
/*h(2763)=184 */ {2763, xed3_phash_find_mapevex_map2_opcode0x28_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(734)=187 */ {734, xed3_phash_find_mapevex_map2_opcode0x28_vv2_187_l1},
|
|
/*h(2187)=188 */ {2187, xed3_phash_find_mapevex_map2_opcode0x28_vv2_188_l1},
|
|
/*h(446)=189 */ {446, xed3_phash_find_mapevex_map2_opcode0x28_vv2_189_l1},
|
|
/*h(158)=190 */ {158, xed3_phash_find_mapevex_map2_opcode0x28_vv2_190_l1},
|
|
/*h(3208)=191 */ {3208, xed3_phash_find_mapevex_map2_opcode0x28_vv2_191_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(713)=193 */ {713, xed3_phash_find_mapevex_map2_opcode0x28_vv2_193_l1},
|
|
/*h(2776)=194 */ {2776, xed3_phash_find_mapevex_map2_opcode0x28_vv2_194_l1},
|
|
/*h(3242)=195 */ {3242, xed3_phash_find_mapevex_map2_opcode0x28_vv2_195_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(747)=197 */ {747, xed3_phash_find_mapevex_map2_opcode0x28_vv2_197_l1},
|
|
/*h(2810)=198 */ {2810, xed3_phash_find_mapevex_map2_opcode0x28_vv2_198_l1},
|
|
/*h(3276)=199 */ {3276, xed3_phash_find_mapevex_map2_opcode0x28_vv2_199_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(171)=201 */ {171, xed3_phash_find_mapevex_map2_opcode0x28_vv2_201_l1},
|
|
/*h(2234)=202 */ {2234, xed3_phash_find_mapevex_map2_opcode0x28_vv2_202_l1},
|
|
/*h(2700)=203 */ {2700, xed3_phash_find_mapevex_map2_opcode0x28_vv2_203_l1},
|
|
/*h(1192)=204 */ {1192, xed3_phash_find_mapevex_map2_opcode0x28_vv2_204_l1},
|
|
/*h(438)=205 */ {438, xed3_phash_find_mapevex_map2_opcode0x28_vv2_205_l1},
|
|
/*h(2268)=206 */ {2268, xed3_phash_find_mapevex_map2_opcode0x28_vv2_206_l1},
|
|
/*h(760)=207 */ {760, xed3_phash_find_mapevex_map2_opcode0x28_vv2_207_l1},
|
|
/*h(1226)=208 */ {1226, xed3_phash_find_mapevex_map2_opcode0x28_vv2_208_l1},
|
|
/*h(2302)=209 */ {2302, xed3_phash_find_mapevex_map2_opcode0x28_vv2_209_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(184)=211 */ {184, xed3_phash_find_mapevex_map2_opcode0x28_vv2_211_l1},
|
|
/*h(650)=212 */ {650, xed3_phash_find_mapevex_map2_opcode0x28_vv2_212_l1},
|
|
/*h(2713)=213 */ {2713, xed3_phash_find_mapevex_map2_opcode0x28_vv2_213_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(218)=215 */ {218, xed3_phash_find_mapevex_map2_opcode0x28_vv2_215_l1},
|
|
/*h(684)=216 */ {684, xed3_phash_find_mapevex_map2_opcode0x28_vv2_216_l1},
|
|
/*h(2747)=217 */ {2747, xed3_phash_find_mapevex_map2_opcode0x28_vv2_217_l1},
|
|
/*h(252)=218 */ {252, xed3_phash_find_mapevex_map2_opcode0x28_vv2_218_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(718)=220 */ {718, xed3_phash_find_mapevex_map2_opcode0x28_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1273)=222 */ {1273, xed3_phash_find_mapevex_map2_opcode0x28_vv2_222_l1},
|
|
/*h(142)=223 */ {142, xed3_phash_find_mapevex_map2_opcode0x28_vv2_223_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(697)=226 */ {697, xed3_phash_find_mapevex_map2_opcode0x28_vv2_226_l1},
|
|
/*h(2760)=227 */ {2760, xed3_phash_find_mapevex_map2_opcode0x28_vv2_227_l1},
|
|
/*h(3226)=228 */ {3226, xed3_phash_find_mapevex_map2_opcode0x28_vv2_228_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(731)=230 */ {731, xed3_phash_find_mapevex_map2_opcode0x28_vv2_230_l1},
|
|
/*h(2794)=231 */ {2794, xed3_phash_find_mapevex_map2_opcode0x28_vv2_231_l1},
|
|
/*h(3260)=232 */ {3260, xed3_phash_find_mapevex_map2_opcode0x28_vv2_232_l1},
|
|
/*h(155)=233 */ {155, xed3_phash_find_mapevex_map2_opcode0x28_vv2_233_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2218)=235 */ {2218, xed3_phash_find_mapevex_map2_opcode0x28_vv2_235_l1},
|
|
/*h(3294)=236 */ {3294, xed3_phash_find_mapevex_map2_opcode0x28_vv2_236_l1},
|
|
/*h(1176)=237 */ {1176, xed3_phash_find_mapevex_map2_opcode0x28_vv2_237_l1},
|
|
/*h(2252)=238 */ {2252, xed3_phash_find_mapevex_map2_opcode0x28_vv2_238_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(744)=240 */ {744, xed3_phash_find_mapevex_map2_opcode0x28_vv2_240_l1},
|
|
/*h(1210)=241 */ {1210, xed3_phash_find_mapevex_map2_opcode0x28_vv2_241_l1},
|
|
/*h(2286)=242 */ {2286, xed3_phash_find_mapevex_map2_opcode0x28_vv2_242_l1},
|
|
/*h(168)=243 */ {168, xed3_phash_find_mapevex_map2_opcode0x28_vv2_243_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1244)=245 */ {1244, xed3_phash_find_mapevex_map2_opcode0x28_vv2_245_l1},
|
|
/*h(2697)=246 */ {2697, xed3_phash_find_mapevex_map2_opcode0x28_vv2_246_l1},
|
|
/*h(202)=247 */ {202, xed3_phash_find_mapevex_map2_opcode0x28_vv2_247_l1},
|
|
/*h(668)=248 */ {668, xed3_phash_find_mapevex_map2_opcode0x28_vv2_248_l1},
|
|
/*h(2265)=249 */ {2265, xed3_phash_find_mapevex_map2_opcode0x28_vv2_249_l1},
|
|
/*h(2731)=250 */ {2731, xed3_phash_find_mapevex_map2_opcode0x28_vv2_250_l1},
|
|
/*h(236)=251 */ {236, xed3_phash_find_mapevex_map2_opcode0x28_vv2_251_l1},
|
|
/*h(702)=252 */ {702, xed3_phash_find_mapevex_map2_opcode0x28_vv2_252_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1257)=255 */ {1257, xed3_phash_find_mapevex_map2_opcode0x28_vv2_255_l1},
|
|
/*h(3320)=256 */ {3320, xed3_phash_find_mapevex_map2_opcode0x28_vv2_256_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(681)=259 */ {681, xed3_phash_find_mapevex_map2_opcode0x28_vv2_259_l1},
|
|
/*h(2744)=260 */ {2744, xed3_phash_find_mapevex_map2_opcode0x28_vv2_260_l1},
|
|
/*h(249)=261 */ {249, xed3_phash_find_mapevex_map2_opcode0x28_vv2_261_l1},
|
|
/*h(715)=262 */ {715, xed3_phash_find_mapevex_map2_opcode0x28_vv2_262_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2778)=264 */ {2778, xed3_phash_find_mapevex_map2_opcode0x28_vv2_264_l1},
|
|
/*h(3244)=265 */ {3244, xed3_phash_find_mapevex_map2_opcode0x28_vv2_265_l1},
|
|
/*h(139)=266 */ {139, xed3_phash_find_mapevex_map2_opcode0x28_vv2_266_l1},
|
|
/*h(2202)=267 */ {2202, xed3_phash_find_mapevex_map2_opcode0x28_vv2_267_l1},
|
|
/*h(2812)=268 */ {2812, xed3_phash_find_mapevex_map2_opcode0x28_vv2_268_l1},
|
|
/*h(3278)=269 */ {3278, xed3_phash_find_mapevex_map2_opcode0x28_vv2_269_l1},
|
|
/*h(1160)=270 */ {1160, xed3_phash_find_mapevex_map2_opcode0x28_vv2_270_l1},
|
|
/*h(2236)=271 */ {2236, xed3_phash_find_mapevex_map2_opcode0x28_vv2_271_l1},
|
|
/*h(2702)=272 */ {2702, xed3_phash_find_mapevex_map2_opcode0x28_vv2_272_l1},
|
|
/*h(728)=273 */ {728, xed3_phash_find_mapevex_map2_opcode0x28_vv2_273_l1},
|
|
/*h(1194)=274 */ {1194, xed3_phash_find_mapevex_map2_opcode0x28_vv2_274_l1},
|
|
/*h(2270)=275 */ {2270, xed3_phash_find_mapevex_map2_opcode0x28_vv2_275_l1},
|
|
/*h(762)=276 */ {762, xed3_phash_find_mapevex_map2_opcode0x28_vv2_276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1228)=278 */ {1228, xed3_phash_find_mapevex_map2_opcode0x28_vv2_278_l1},
|
|
/*h(3291)=279 */ {3291, xed3_phash_find_mapevex_map2_opcode0x28_vv2_279_l1},
|
|
/*h(186)=280 */ {186, xed3_phash_find_mapevex_map2_opcode0x28_vv2_280_l1},
|
|
/*h(652)=281 */ {652, xed3_phash_find_mapevex_map2_opcode0x28_vv2_281_l1},
|
|
/*h(2715)=282 */ {2715, xed3_phash_find_mapevex_map2_opcode0x28_vv2_282_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(220)=284 */ {220, xed3_phash_find_mapevex_map2_opcode0x28_vv2_284_l1},
|
|
/*h(686)=285 */ {686, xed3_phash_find_mapevex_map2_opcode0x28_vv2_285_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(254)=288 */ {254, xed3_phash_find_mapevex_map2_opcode0x28_vv2_288_l1},
|
|
/*h(3304)=289 */ {3304, xed3_phash_find_mapevex_map2_opcode0x28_vv2_289_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(665)=291 */ {665, xed3_phash_find_mapevex_map2_opcode0x28_vv2_291_l1},
|
|
/*h(1275)=292 */ {1275, xed3_phash_find_mapevex_map2_opcode0x28_vv2_292_l1},
|
|
/*h(2728)=293 */ {2728, xed3_phash_find_mapevex_map2_opcode0x28_vv2_293_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 294ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x29_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[300] = {
|
|
/*h(1198)=0 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1198, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1166)=2 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1166, 5164},
|
|
/*h(1273)=3 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1273, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1241)=6 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1241, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1209)=8 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1209, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1177)=11 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1177, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(760)=15 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {760, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=18 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {728, 5169},
|
|
/*h(236)=19 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {236, 5166},
|
|
/*h(696)=20 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {696, 5169},
|
|
/*h(204)=21 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {204, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(664)=23 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {664, 5169},
|
|
/*h(172)=24 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {172, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(140)=26 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {140, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1274)=31 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1274, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1242)=34 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1242, 5165},
|
|
/*h(750)=35 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {750, 5168},
|
|
/*h(1210)=36 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1210, 5165},
|
|
/*h(718)=37 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {718, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1178)=39 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1178, 5165},
|
|
/*h(686)=40 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {686, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(654)=42 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {654, 5168},
|
|
/*h(761)=43 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {761, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(729)=46 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {729, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(697)=48 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {697, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(665)=51 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {665, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(248)=55 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {248, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=58 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {216, 5167},
|
|
/*h(1275)=59 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1275, 5165},
|
|
/*h(184)=60 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {184, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1243)=62 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1243, 5165},
|
|
/*h(152)=63 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {152, 5167},
|
|
/*h(1211)=64 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1211, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1179)=67 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1179, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(762)=71 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {762, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=74 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {730, 5169},
|
|
/*h(238)=75 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {238, 5166},
|
|
/*h(698)=76 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {698, 5169},
|
|
/*h(206)=77 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {206, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(666)=79 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {666, 5169},
|
|
/*h(174)=80 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {174, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(142)=82 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {142, 5166},
|
|
/*h(249)=83 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {249, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(217)=86 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {217, 5167},
|
|
/*h(1276)=87 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1276, 5164},
|
|
/*h(185)=88 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {185, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1244)=90 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1244, 5164},
|
|
/*h(153)=91 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {153, 5167},
|
|
/*h(1212)=92 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1212, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1180)=95 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1180, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(763)=99 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {763, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(731)=102 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {731, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(699)=104 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {699, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(667)=107 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {667, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(250)=111 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {250, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(218)=114 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {218, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(186)=116 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {186, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(154)=119 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {154, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1256)=126 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1256, 5165},
|
|
/*h(764)=127 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {764, 5168},
|
|
/*h(1470)=128 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 MASK=0*/ {1470, 6545},
|
|
/*h(1224)=129 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1224, 5165},
|
|
/*h(732)=130 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {732, 5168},
|
|
/*h(1192)=131 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1192, 5165},
|
|
/*h(700)=132 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {700, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1160)=134 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1160, 5165},
|
|
/*h(668)=135 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {668, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(251)=139 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {251, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(219)=142 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {219, 5167},
|
|
/*h(1278)=143 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1278, 5164},
|
|
/*h(187)=144 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {187, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1246)=146 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1246, 5164},
|
|
/*h(155)=147 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {155, 5167},
|
|
/*h(1214)=148 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1214, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1182)=151 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1182, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1257)=154 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1257, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1225)=157 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1225, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1193)=159 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1193, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1161)=162 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1161, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(744)=166 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {744, 5169},
|
|
/*h(252)=167 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {252, 5166},
|
|
/*h(958)=168 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 MASK=0*/ {958, 6544},
|
|
/*h(712)=169 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {712, 5169},
|
|
/*h(220)=170 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {220, 5166},
|
|
/*h(680)=171 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {680, 5169},
|
|
/*h(188)=172 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {188, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(648)=174 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {648, 5169},
|
|
/*h(156)=175 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {156, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1258)=182 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1258, 5165},
|
|
/*h(766)=183 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {766, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1226)=185 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1226, 5165},
|
|
/*h(734)=186 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {734, 5168},
|
|
/*h(1194)=187 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1194, 5165},
|
|
/*h(702)=188 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {702, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1162)=190 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1162, 5165},
|
|
/*h(670)=191 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {670, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(745)=194 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {745, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(713)=197 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {713, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(681)=199 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {681, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(649)=202 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {649, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1462)=204 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 MASK=0*/ {1462, 6506},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(232)=206 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {232, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(446)=208 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {446, 6543},
|
|
/*h(200)=209 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {200, 5167},
|
|
/*h(1259)=210 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1259, 5165},
|
|
/*h(168)=211 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {168, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1227)=213 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1227, 5165},
|
|
/*h(136)=214 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {136, 5167},
|
|
/*h(1195)=215 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1195, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1163)=218 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1163, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(746)=222 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {746, 5169},
|
|
/*h(254)=223 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {254, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(714)=225 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {714, 5169},
|
|
/*h(222)=226 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {222, 5166},
|
|
/*h(682)=227 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {682, 5169},
|
|
/*h(190)=228 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {190, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(650)=230 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {650, 5169},
|
|
/*h(158)=231 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {158, 5166},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(233)=234 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {233, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(201)=237 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {201, 5167},
|
|
/*h(1260)=238 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1260, 5164},
|
|
/*h(169)=239 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {169, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1228)=241 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1228, 5164},
|
|
/*h(137)=242 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {137, 5167},
|
|
/*h(1196)=243 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1196, 5164},
|
|
/*h(950)=244 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 MASK=0*/ {950, 6505},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1164)=246 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1164, 5164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(747)=250 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {747, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(715)=253 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {715, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(683)=255 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {683, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(651)=258 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {651, 5169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(234)=262 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {234, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(202)=265 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {202, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(170)=267 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {170, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(138)=270 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {138, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1272)=275 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1272, 5165},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1240)=277 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1240, 5165},
|
|
/*h(748)=278 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {748, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1208)=280 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1208, 5165},
|
|
/*h(716)=281 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {716, 5168},
|
|
/*h(1176)=282 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {1176, 5165},
|
|
/*h(684)=283 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {684, 5168},
|
|
/*h(438)=284 EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 MASK=0*/ {438, 6504},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(652)=286 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {652, 5168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(235)=290 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {235, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(203)=293 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {203, 5167},
|
|
/*h(1262)=294 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1262, 5164},
|
|
/*h(171)=295 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {171, 5167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1230)=297 EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {1230, 5164},
|
|
/*h(139)=298 EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {139, 5167},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((28*key % 599) % 300);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(690)=0 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {690, 4992},
|
|
/*h(178)=1 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {178, 4991},
|
|
/*h(1470)=2 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 MASK=0*/ {1470, 6000},
|
|
/*h(958)=3 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 MASK=0*/ {958, 6002},
|
|
/*h(446)=4 EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {446, 6001},
|
|
/*h(1202)=5 EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {1202, 4990}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 6265},
|
|
/*h(10)=3 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6260},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 6263},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 6265},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 6261},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 6263},
|
|
/*h(74)=13 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6264},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 6261},
|
|
/*h(42)=17 EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6262}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5883},
|
|
/*h(14)=1 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5873},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5882},
|
|
/*h(15)=4 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 5871},
|
|
/*h(111)=5 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 5871},
|
|
/*h(43)=6 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 5878},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5876},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5879},
|
|
/*h(45)=12 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5876},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5879},
|
|
/*h(46)=15 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5875},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5877},
|
|
/*h(47)=18 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 5871},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 5878},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5872},
|
|
/*h(8)=24 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5881},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5872},
|
|
/*h(9)=27 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5881},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5870},
|
|
/*h(10)=30 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5880},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 5871},
|
|
/*h(11)=33 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 5878},
|
|
/*h(107)=34 EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 5878},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5874},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5883},
|
|
/*h(13)=39 EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5874},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x2d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 5887},
|
|
/*h(15)=2 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 5885},
|
|
/*h(12)=3 EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5886},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 5884},
|
|
/*h(11)=6 EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 5888},
|
|
/*h(8)=7 EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5889}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x30_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 6548},
|
|
/*h(1498)=1 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 6548},
|
|
/*h(728)=2 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {728, 6551},
|
|
/*h(218)=3 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 6546},
|
|
/*h(1242)=4 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 6546},
|
|
/*h(472)=5 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {472, 6549},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_HALFMEM()*/ {216, 6547},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 6550},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1624, 6557},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1368, 6555},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1112, 6553},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 6556},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 6554},
|
|
/*h(600)=30 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {600, 6557},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 6552},
|
|
/*h(344)=33 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {344, 6555},
|
|
/*h(1628)=34 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1628, 6557},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {88, 6553},
|
|
/*h(1372)=37 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1372, 6555},
|
|
/*h(602)=38 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 6556},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {1116, 6553},
|
|
/*h(346)=41 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 6554},
|
|
/*h(1630)=42 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 6556},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 6552},
|
|
/*h(1374)=45 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 6554},
|
|
/*h(604)=46 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {604, 6557},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 6552},
|
|
/*h(348)=49 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {348, 6555},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_HALFMEM()*/ {92, 6553},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 6556},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 6554},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 6552},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 6550},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x31_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5384},
|
|
/*h(1498)=1 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5384},
|
|
/*h(728)=2 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {728, 5381},
|
|
/*h(218)=3 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5382},
|
|
/*h(1242)=4 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5382},
|
|
/*h(472)=5 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {472, 5385},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {216, 5383},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5380},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1624, 5501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1368, 5505},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1112, 5503},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5504},
|
|
/*h(600)=30 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {600, 5501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5502},
|
|
/*h(344)=33 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {344, 5505},
|
|
/*h(1628)=34 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1628, 5501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {88, 5503},
|
|
/*h(1372)=37 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1372, 5505},
|
|
/*h(602)=38 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {1116, 5503},
|
|
/*h(346)=41 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5504},
|
|
/*h(1630)=42 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5502},
|
|
/*h(1374)=45 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5504},
|
|
/*h(604)=46 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {604, 5501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5502},
|
|
/*h(348)=49 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {348, 5505},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_QUARTERMEM()*/ {92, 5503},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5504},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5380},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x32_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5396},
|
|
/*h(1498)=1 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5396},
|
|
/*h(728)=2 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {728, 5393},
|
|
/*h(218)=3 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5394},
|
|
/*h(1242)=4 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5394},
|
|
/*h(472)=5 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {472, 5397},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {216, 5395},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5392},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1624, 5507},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1368, 5511},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1112, 5509},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5506},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5510},
|
|
/*h(600)=30 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {600, 5507},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5508},
|
|
/*h(344)=33 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {344, 5511},
|
|
/*h(1628)=34 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1628, 5507},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {88, 5509},
|
|
/*h(1372)=37 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1372, 5511},
|
|
/*h(602)=38 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5506},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {1116, 5509},
|
|
/*h(346)=41 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5510},
|
|
/*h(1630)=42 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5506},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5508},
|
|
/*h(1374)=45 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5510},
|
|
/*h(604)=46 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {604, 5507},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5508},
|
|
/*h(348)=49 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {348, 5511},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_8_BITS() NELEM_EIGHTHMEM()*/ {92, 5509},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5506},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5510},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5508},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5392},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x33_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5390},
|
|
/*h(1498)=1 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5390},
|
|
/*h(728)=2 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {728, 5387},
|
|
/*h(218)=3 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5388},
|
|
/*h(1242)=4 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5388},
|
|
/*h(472)=5 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {472, 5391},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_HALFMEM()*/ {216, 5389},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5386},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1624, 5519},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1368, 5523},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1112, 5521},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5518},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5522},
|
|
/*h(600)=30 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 5519},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5520},
|
|
/*h(344)=33 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 5523},
|
|
/*h(1628)=34 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1628, 5519},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 5521},
|
|
/*h(1372)=37 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1372, 5523},
|
|
/*h(602)=38 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5518},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {1116, 5521},
|
|
/*h(346)=41 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5522},
|
|
/*h(1630)=42 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5518},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5520},
|
|
/*h(1374)=45 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5522},
|
|
/*h(604)=46 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {604, 5519},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5520},
|
|
/*h(348)=49 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {348, 5523},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_HALFMEM()*/ {92, 5521},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5518},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5522},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5520},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5386},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x34_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[66] = {
|
|
/*h(474)=0 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5408},
|
|
/*h(1498)=1 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5408},
|
|
/*h(728)=2 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {728, 5405},
|
|
/*h(218)=3 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5406},
|
|
/*h(1242)=4 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5406},
|
|
/*h(472)=5 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {472, 5409},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {216, 5407},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=10 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5404},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=18 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1624, 5525},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1368)=21 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1368, 5529},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1112)=24 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1112, 5527},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=26 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1626, 5524},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=29 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1370, 5528},
|
|
/*h(600)=30 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {600, 5525},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=32 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1114, 5526},
|
|
/*h(344)=33 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {344, 5529},
|
|
/*h(1628)=34 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1628, 5525},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=36 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {88, 5527},
|
|
/*h(1372)=37 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1372, 5529},
|
|
/*h(602)=38 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {602, 5524},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1116)=40 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {1116, 5527},
|
|
/*h(346)=41 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {346, 5528},
|
|
/*h(1630)=42 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {1630, 5524},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=44 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {90, 5526},
|
|
/*h(1374)=45 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {1374, 5528},
|
|
/*h(604)=46 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {604, 5525},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=48 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {1118, 5526},
|
|
/*h(348)=49 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {348, 5529},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=52 EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESIZE_16_BITS() NELEM_QUARTERMEM()*/ {92, 5527},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=54 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR*/ {606, 5524},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=57 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR*/ {350, 5528},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=60 EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR*/ {94, 5526},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=64 EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5404},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 79) % 66);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x35_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[31] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=2 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {600, 5513},
|
|
/*h(218)=3 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 5400},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1624)=5 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1624, 5513},
|
|
/*h(1242)=6 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 5400},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=8 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5512},
|
|
/*h(344)=9 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {344, 5517},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=11 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 5512},
|
|
/*h(1368)=12 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1368, 5517},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=14 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {728, 5399},
|
|
/*h(346)=15 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5516},
|
|
/*h(88)=16 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {88, 5515},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=18 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 5516},
|
|
/*h(1112)=19 EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALFMEM()*/ {1112, 5515},
|
|
/*h(730)=20 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 5398},
|
|
/*h(472)=21 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {472, 5403},
|
|
/*h(90)=22 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5514},
|
|
/*h(1754)=23 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 5398},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=25 EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 5514},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=27 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 5402},
|
|
/*h(216)=28 EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_HALFMEM()*/ {216, 5401},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=30 EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 5402}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 31);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x36_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5282},
|
|
/*h(73)=1 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5213},
|
|
/*h(77)=2 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5279},
|
|
/*h(41)=3 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5215},
|
|
/*h(45)=4 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5283},
|
|
/*h(72)=5 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5213},
|
|
/*h(76)=6 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5279},
|
|
/*h(40)=7 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5215},
|
|
/*h(44)=8 EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5283},
|
|
/*h(74)=9 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5212},
|
|
/*h(78)=10 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5278},
|
|
/*h(42)=11 EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5214}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 43) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x37_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5177},
|
|
/*h(46)=1 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0*/ {46, 5180},
|
|
/*h(12)=2 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5179},
|
|
/*h(77)=3 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5177},
|
|
/*h(13)=4 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5179},
|
|
/*h(78)=5 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0*/ {78, 5176},
|
|
/*h(44)=6 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5181},
|
|
/*h(14)=7 EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0*/ {14, 5178},
|
|
/*h(45)=8 EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5181}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x38_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[599] = {
|
|
/*h(1198)=0 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1198, 6484},
|
|
/*h(200)=1 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {200, 6481},
|
|
/*h(2796)=2 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2796, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2198)=5 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2198, 6480},
|
|
/*h(1200)=6 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1200, 6485},
|
|
/*h(202)=7 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {202, 6481},
|
|
/*h(2798)=8 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2798, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2200)=11 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2200, 6481},
|
|
/*h(1202)=12 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1202, 6485},
|
|
/*h(204)=13 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {204, 6480},
|
|
/*h(2800)=14 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2800, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3200)=16 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3200, 6485},
|
|
/*h(2202)=17 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2202, 6481},
|
|
/*h(1204)=18 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1204, 6484},
|
|
/*h(206)=19 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {206, 6480},
|
|
/*h(2802)=20 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2802, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3202)=22 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3202, 6485},
|
|
/*h(2204)=23 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2204, 6480},
|
|
/*h(1206)=24 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1206, 6484},
|
|
/*h(208)=25 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {208, 6481},
|
|
/*h(2804)=26 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2804, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3204)=28 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3204, 6484},
|
|
/*h(2206)=29 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2206, 6480},
|
|
/*h(1208)=30 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1208, 6485},
|
|
/*h(210)=31 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {210, 6481},
|
|
/*h(2806)=32 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2806, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3206)=34 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3206, 6484},
|
|
/*h(2208)=35 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2208, 6481},
|
|
/*h(1210)=36 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1210, 6485},
|
|
/*h(212)=37 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {212, 6480},
|
|
/*h(2808)=38 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2808, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3208)=40 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3208, 6485},
|
|
/*h(2210)=41 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2210, 6481},
|
|
/*h(1212)=42 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1212, 6484},
|
|
/*h(214)=43 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {214, 6480},
|
|
/*h(2810)=44 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2810, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3210)=46 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3210, 6485},
|
|
/*h(2212)=47 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2212, 6480},
|
|
/*h(1214)=48 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1214, 6484},
|
|
/*h(216)=49 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {216, 6481},
|
|
/*h(2812)=50 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2812, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3212)=52 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3212, 6484},
|
|
/*h(2214)=53 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2214, 6480},
|
|
/*h(1216)=54 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1216, 6485},
|
|
/*h(218)=55 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {218, 6481},
|
|
/*h(2814)=56 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2814, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3214)=58 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3214, 6484},
|
|
/*h(2216)=59 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2216, 6481},
|
|
/*h(1218)=60 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1218, 6485},
|
|
/*h(220)=61 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {220, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3216)=64 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3216, 6485},
|
|
/*h(2218)=65 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2218, 6481},
|
|
/*h(1220)=66 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1220, 6484},
|
|
/*h(222)=67 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {222, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3218)=70 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3218, 6485},
|
|
/*h(2220)=71 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2220, 6480},
|
|
/*h(1222)=72 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1222, 6484},
|
|
/*h(224)=73 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {224, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3220)=76 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3220, 6484},
|
|
/*h(2222)=77 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2222, 6480},
|
|
/*h(1224)=78 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1224, 6485},
|
|
/*h(226)=79 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {226, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3222)=82 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3222, 6484},
|
|
/*h(2224)=83 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2224, 6481},
|
|
/*h(1226)=84 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1226, 6485},
|
|
/*h(228)=85 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {228, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3224)=88 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3224, 6485},
|
|
/*h(2226)=89 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2226, 6481},
|
|
/*h(1228)=90 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1228, 6484},
|
|
/*h(230)=91 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {230, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3226)=94 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3226, 6485},
|
|
/*h(2228)=95 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2228, 6480},
|
|
/*h(1230)=96 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1230, 6484},
|
|
/*h(232)=97 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {232, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3228)=100 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3228, 6484},
|
|
/*h(2230)=101 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2230, 6480},
|
|
/*h(1232)=102 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1232, 6485},
|
|
/*h(234)=103 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {234, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3230)=106 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3230, 6484},
|
|
/*h(2232)=107 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2232, 6481},
|
|
/*h(1234)=108 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1234, 6485},
|
|
/*h(236)=109 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {236, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3232)=112 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3232, 6485},
|
|
/*h(2234)=113 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2234, 6481},
|
|
/*h(1236)=114 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1236, 6484},
|
|
/*h(238)=115 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {238, 6480},
|
|
/*h(438)=116 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 MASK=0*/ {438, 6513},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3234)=118 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3234, 6485},
|
|
/*h(2236)=119 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2236, 6480},
|
|
/*h(1238)=120 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1238, 6484},
|
|
/*h(240)=121 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {240, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(640)=123 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {640, 6483},
|
|
/*h(3236)=124 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3236, 6484},
|
|
/*h(2238)=125 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2238, 6480},
|
|
/*h(1240)=126 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1240, 6485},
|
|
/*h(242)=127 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {242, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(642)=129 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {642, 6483},
|
|
/*h(3238)=130 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3238, 6484},
|
|
/*h(2240)=131 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2240, 6481},
|
|
/*h(1242)=132 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1242, 6485},
|
|
/*h(244)=133 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {244, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(644)=135 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {644, 6482},
|
|
/*h(3240)=136 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3240, 6485},
|
|
/*h(2242)=137 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2242, 6481},
|
|
/*h(1244)=138 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1244, 6484},
|
|
/*h(246)=139 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {246, 6480},
|
|
/*h(446)=140 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {446, 6516},
|
|
/*h(646)=141 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {646, 6482},
|
|
/*h(3242)=142 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3242, 6485},
|
|
/*h(2244)=143 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2244, 6480},
|
|
/*h(1246)=144 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1246, 6484},
|
|
/*h(248)=145 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {248, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(648)=147 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {648, 6483},
|
|
/*h(3244)=148 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3244, 6484},
|
|
/*h(2246)=149 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2246, 6480},
|
|
/*h(1248)=150 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1248, 6485},
|
|
/*h(250)=151 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {250, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(650)=153 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {650, 6483},
|
|
/*h(3246)=154 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3246, 6484},
|
|
/*h(2248)=155 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2248, 6481},
|
|
/*h(1250)=156 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1250, 6485},
|
|
/*h(252)=157 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {252, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(652)=159 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {652, 6482},
|
|
/*h(3248)=160 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3248, 6485},
|
|
/*h(2250)=161 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2250, 6481},
|
|
/*h(1252)=162 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1252, 6484},
|
|
/*h(254)=163 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {254, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(654)=165 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {654, 6482},
|
|
/*h(3250)=166 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3250, 6485},
|
|
/*h(2252)=167 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2252, 6480},
|
|
/*h(1254)=168 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1254, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(656)=171 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {656, 6483},
|
|
/*h(3252)=172 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3252, 6484},
|
|
/*h(2254)=173 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2254, 6480},
|
|
/*h(1256)=174 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1256, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(658)=177 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {658, 6483},
|
|
/*h(3254)=178 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3254, 6484},
|
|
/*h(2256)=179 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2256, 6481},
|
|
/*h(1258)=180 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1258, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(660)=183 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {660, 6482},
|
|
/*h(3256)=184 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3256, 6485},
|
|
/*h(2258)=185 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2258, 6481},
|
|
/*h(1260)=186 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1260, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(662)=189 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {662, 6482},
|
|
/*h(3258)=190 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3258, 6485},
|
|
/*h(2260)=191 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2260, 6480},
|
|
/*h(1262)=192 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1262, 6484},
|
|
/*h(1462)=193 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 MASK=0*/ {1462, 6515},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(664)=195 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 6483},
|
|
/*h(3260)=196 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3260, 6484},
|
|
/*h(2262)=197 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2262, 6480},
|
|
/*h(1264)=198 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1264, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(666)=201 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {666, 6483},
|
|
/*h(3262)=202 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3262, 6484},
|
|
/*h(2264)=203 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2264, 6481},
|
|
/*h(1266)=204 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1266, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(668)=207 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {668, 6482},
|
|
/*h(3264)=208 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3264, 6485},
|
|
/*h(2266)=209 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2266, 6481},
|
|
/*h(1268)=210 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1268, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(670)=213 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {670, 6482},
|
|
/*h(3266)=214 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3266, 6485},
|
|
/*h(2268)=215 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2268, 6480},
|
|
/*h(1270)=216 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1270, 6484},
|
|
/*h(1470)=217 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 MASK=0*/ {1470, 6518},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(672)=219 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {672, 6483},
|
|
/*h(3268)=220 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3268, 6484},
|
|
/*h(2270)=221 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2270, 6480},
|
|
/*h(1272)=222 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1272, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(674)=225 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {674, 6483},
|
|
/*h(3270)=226 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3270, 6484},
|
|
/*h(2272)=227 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2272, 6481},
|
|
/*h(1274)=228 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1274, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(676)=231 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {676, 6482},
|
|
/*h(3272)=232 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3272, 6485},
|
|
/*h(2274)=233 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2274, 6481},
|
|
/*h(1276)=234 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1276, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(678)=237 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {678, 6482},
|
|
/*h(3274)=238 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3274, 6485},
|
|
/*h(2276)=239 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2276, 6480},
|
|
/*h(1278)=240 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1278, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(680)=243 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {680, 6483},
|
|
/*h(3276)=244 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3276, 6484},
|
|
/*h(2278)=245 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2278, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(682)=249 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {682, 6483},
|
|
/*h(3278)=250 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3278, 6484},
|
|
/*h(2280)=251 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2280, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(684)=255 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {684, 6482},
|
|
/*h(3280)=256 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3280, 6485},
|
|
/*h(2282)=257 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2282, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(686)=261 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {686, 6482},
|
|
/*h(3282)=262 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3282, 6485},
|
|
/*h(2284)=263 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2284, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(688)=267 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {688, 6483},
|
|
/*h(3284)=268 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3284, 6484},
|
|
/*h(2286)=269 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2286, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(690)=273 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {690, 6483},
|
|
/*h(3286)=274 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3286, 6484},
|
|
/*h(2288)=275 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2288, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2688)=277 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2688, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(692)=279 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {692, 6482},
|
|
/*h(3288)=280 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3288, 6485},
|
|
/*h(2290)=281 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2290, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2690)=283 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2690, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(694)=285 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {694, 6482},
|
|
/*h(3290)=286 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3290, 6485},
|
|
/*h(2292)=287 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2292, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2692)=289 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2692, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(696)=291 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {696, 6483},
|
|
/*h(3292)=292 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3292, 6484},
|
|
/*h(2294)=293 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2294, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2694)=295 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2694, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(698)=297 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {698, 6483},
|
|
/*h(3294)=298 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3294, 6484},
|
|
/*h(2296)=299 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2296, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2696)=301 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2696, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(700)=303 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {700, 6482},
|
|
/*h(3296)=304 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3296, 6485},
|
|
/*h(2298)=305 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2298, 6481},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2698)=307 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2698, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(702)=309 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {702, 6482},
|
|
/*h(3298)=310 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3298, 6485},
|
|
/*h(2300)=311 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2300, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2700)=313 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2700, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(704)=315 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {704, 6483},
|
|
/*h(3300)=316 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3300, 6484},
|
|
/*h(2302)=317 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2302, 6480},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2702)=319 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2702, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(706)=321 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {706, 6483},
|
|
/*h(3302)=322 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3302, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2704)=325 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2704, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(708)=327 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {708, 6482},
|
|
/*h(3304)=328 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3304, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2706)=331 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2706, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(710)=333 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {710, 6482},
|
|
/*h(3306)=334 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3306, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2708)=337 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2708, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(712)=339 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {712, 6483},
|
|
/*h(3308)=340 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3308, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2710)=343 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2710, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(714)=345 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {714, 6483},
|
|
/*h(3310)=346 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3310, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2712)=349 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2712, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(716)=351 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {716, 6482},
|
|
/*h(3312)=352 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3312, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2714)=355 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2714, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(718)=357 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {718, 6482},
|
|
/*h(3314)=358 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3314, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2716)=361 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2716, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(720)=363 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {720, 6483},
|
|
/*h(3316)=364 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3316, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2718)=367 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2718, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(722)=369 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {722, 6483},
|
|
/*h(3318)=370 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3318, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2720)=373 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2720, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(724)=375 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {724, 6482},
|
|
/*h(3320)=376 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3320, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2722)=379 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2722, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(726)=381 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {726, 6482},
|
|
/*h(3322)=382 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {3322, 6485},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(128)=384 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {128, 6481},
|
|
/*h(2724)=385 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2724, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=387 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {728, 6483},
|
|
/*h(3324)=388 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3324, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(130)=390 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {130, 6481},
|
|
/*h(2726)=391 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2726, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=393 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {730, 6483},
|
|
/*h(3326)=394 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3326, 6484},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(132)=396 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {132, 6480},
|
|
/*h(2728)=397 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2728, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(732)=399 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {732, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(134)=402 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {134, 6480},
|
|
/*h(2730)=403 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2730, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(734)=405 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {734, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(136)=408 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {136, 6481},
|
|
/*h(2732)=409 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2732, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(736)=411 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {736, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(138)=414 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {138, 6481},
|
|
/*h(2734)=415 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2734, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(738)=417 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {738, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(140)=420 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {140, 6480},
|
|
/*h(2736)=421 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2736, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(740)=423 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {740, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(142)=426 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {142, 6480},
|
|
/*h(2738)=427 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2738, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(742)=429 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {742, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(144)=432 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {144, 6481},
|
|
/*h(2740)=433 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2740, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(744)=435 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {744, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(146)=438 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {146, 6481},
|
|
/*h(2742)=439 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2742, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(746)=441 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {746, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(148)=444 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {148, 6480},
|
|
/*h(2744)=445 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2744, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(748)=447 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {748, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(150)=450 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {150, 6480},
|
|
/*h(2746)=451 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2746, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(750)=453 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {750, 6482},
|
|
/*h(950)=454 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 MASK=0*/ {950, 6514},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(152)=456 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 6481},
|
|
/*h(2748)=457 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2748, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(752)=459 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {752, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1152)=461 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1152, 6485},
|
|
/*h(154)=462 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {154, 6481},
|
|
/*h(2750)=463 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2750, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(754)=465 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {754, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1154)=467 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1154, 6485},
|
|
/*h(156)=468 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {156, 6480},
|
|
/*h(2752)=469 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2752, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(756)=471 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {756, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1156)=473 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1156, 6484},
|
|
/*h(158)=474 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {158, 6480},
|
|
/*h(2754)=475 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2754, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(758)=477 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {758, 6482},
|
|
/*h(958)=478 EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 MASK=0*/ {958, 6517},
|
|
/*h(1158)=479 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1158, 6484},
|
|
/*h(160)=480 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {160, 6481},
|
|
/*h(2756)=481 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2756, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(760)=483 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {760, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1160)=485 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1160, 6485},
|
|
/*h(162)=486 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {162, 6481},
|
|
/*h(2758)=487 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2758, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(762)=489 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {762, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1162)=491 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1162, 6485},
|
|
/*h(164)=492 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {164, 6480},
|
|
/*h(2760)=493 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2760, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(764)=495 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {764, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1164)=497 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1164, 6484},
|
|
/*h(166)=498 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {166, 6480},
|
|
/*h(2762)=499 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2762, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(766)=501 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {766, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1166)=503 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1166, 6484},
|
|
/*h(168)=504 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {168, 6481},
|
|
/*h(2764)=505 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2764, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1168)=509 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1168, 6485},
|
|
/*h(170)=510 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {170, 6481},
|
|
/*h(2766)=511 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2766, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1170)=515 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1170, 6485},
|
|
/*h(172)=516 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {172, 6480},
|
|
/*h(2768)=517 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2768, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1172)=521 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1172, 6484},
|
|
/*h(174)=522 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {174, 6480},
|
|
/*h(2770)=523 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2770, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1174)=527 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1174, 6484},
|
|
/*h(176)=528 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {176, 6481},
|
|
/*h(2772)=529 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2772, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1176)=533 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1176, 6485},
|
|
/*h(178)=534 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {178, 6481},
|
|
/*h(2774)=535 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2774, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2176)=538 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2176, 6481},
|
|
/*h(1178)=539 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1178, 6485},
|
|
/*h(180)=540 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {180, 6480},
|
|
/*h(2776)=541 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2776, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2178)=544 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2178, 6481},
|
|
/*h(1180)=545 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1180, 6484},
|
|
/*h(182)=546 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {182, 6480},
|
|
/*h(2778)=547 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2778, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2180)=550 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2180, 6480},
|
|
/*h(1182)=551 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1182, 6484},
|
|
/*h(184)=552 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {184, 6481},
|
|
/*h(2780)=553 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2780, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2182)=556 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2182, 6480},
|
|
/*h(1184)=557 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1184, 6485},
|
|
/*h(186)=558 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {186, 6481},
|
|
/*h(2782)=559 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2782, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2184)=562 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2184, 6481},
|
|
/*h(1186)=563 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1186, 6485},
|
|
/*h(188)=564 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {188, 6480},
|
|
/*h(2784)=565 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2784, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2186)=568 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2186, 6481},
|
|
/*h(1188)=569 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1188, 6484},
|
|
/*h(190)=570 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {190, 6480},
|
|
/*h(2786)=571 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2786, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2188)=574 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2188, 6480},
|
|
/*h(1190)=575 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1190, 6484},
|
|
/*h(192)=576 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {192, 6481},
|
|
/*h(2788)=577 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2788, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2190)=580 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2190, 6480},
|
|
/*h(1192)=581 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1192, 6485},
|
|
/*h(194)=582 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {194, 6481},
|
|
/*h(2790)=583 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2790, 6482},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2192)=586 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2192, 6481},
|
|
/*h(1194)=587 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {1194, 6485},
|
|
/*h(196)=588 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {196, 6480},
|
|
/*h(2792)=589 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2792, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2194)=592 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2194, 6481},
|
|
/*h(1196)=593 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1196, 6484},
|
|
/*h(198)=594 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {198, 6480},
|
|
/*h(2794)=595 EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {2794, 6483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2196)=598 EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2196, 6480}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 599);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_260_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1156)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1156, 5356},
|
|
/*h(2753)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2753, 5361},
|
|
/*h(169)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {169, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1230)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1230, 5362},
|
|
/*h(2217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2217, 5365},
|
|
/*h(3204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3204, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1220;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(684)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {684, 5366},
|
|
/*h(3268)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3268, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2785)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2785, 5361},
|
|
/*h(201)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {201, 5365},
|
|
/*h(1188)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1188, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_557_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3236, 5356},
|
|
/*h(652)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {652, 5366},
|
|
/*h(2249)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2249, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1252;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3300)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3300, 5356},
|
|
/*h(716)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {716, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(185)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {185, 5365},
|
|
/*h(1172)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1172, 5356},
|
|
/*h(2769)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2769, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3220, 5356},
|
|
/*h(1246)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1246, 5362},
|
|
/*h(2233)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2233, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_517_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3210, 5363},
|
|
/*h(1236)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1236, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_362_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3284)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3284;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2801)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2801, 5361},
|
|
/*h(217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {217, 5365},
|
|
/*h(1204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1204, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2265, 5365},
|
|
/*h(668)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {668, 5366},
|
|
/*h(3252)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3252, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1268)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1268;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_233_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(732)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {732, 5366},
|
|
/*h(3316)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3316, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2755)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2755, 5361},
|
|
/*h(171)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {171, 5365},
|
|
/*h(1158)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1158, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3206, 5356},
|
|
/*h(2219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2219, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1222, 5356},
|
|
/*h(235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {235, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_565_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3270)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3270, 5356},
|
|
/*h(686)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {686, 5366},
|
|
/*h(2283)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2283, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1190)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1190, 5356},
|
|
/*h(2177)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2177, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3238;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1254)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1254, 5356},
|
|
/*h(644)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {644, 5360},
|
|
/*h(2241)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2241, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2692)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2692, 5360},
|
|
/*h(3302)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3302, 5356},
|
|
/*h(718)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {718, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1174)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3222;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2225, 5359},
|
|
/*h(251)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {251, 5365},
|
|
/*h(1238)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1238, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3286)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3286, 5356},
|
|
/*h(702)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {702, 5366},
|
|
/*h(2299)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2299, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1206, 5356},
|
|
/*h(2803)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2803, 5361},
|
|
/*h(219)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {219, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(670)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {670, 5366},
|
|
/*h(2267)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2267, 5365},
|
|
/*h(3254)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3254, 5356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(660)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {660, 5360},
|
|
/*h(1270)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {1270, 5356},
|
|
/*h(3244)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3244, 5362},
|
|
/*h(2257)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2257, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2708)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2708, 5360},
|
|
/*h(3318)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {3318, 5356},
|
|
/*h(734)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {734, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_567_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1152)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1152;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1216;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3264)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3264, 5357},
|
|
/*h(680)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {680, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1184;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_282_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(648)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {648, 5367},
|
|
/*h(3232)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3232, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1248, 5357},
|
|
/*h(2235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2235, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3296)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3296, 5357},
|
|
/*h(712)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {712, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1168)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1168;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3216;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1232;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(696)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {696, 5367},
|
|
/*h(3280)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3280, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1200, 5357},
|
|
/*h(2187)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2187, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3248, 5357},
|
|
/*h(664)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {664, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2251)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2251, 5365},
|
|
/*h(1264)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1264, 5357},
|
|
/*h(654)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {654, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((11*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_540_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2702)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2702, 5366},
|
|
/*h(3312)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3312, 5357},
|
|
/*h(728)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {728, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1154)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1154;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_549_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3202;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1218;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3266)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3266, 5357},
|
|
/*h(682)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {682, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1186;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3234)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3234, 5357},
|
|
/*h(650)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {650, 5367},
|
|
/*h(1260)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1260, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1250, 5357},
|
|
/*h(3224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3224, 5363},
|
|
/*h(640)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {640, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3298)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3298, 5357},
|
|
/*h(714)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {714, 5367},
|
|
/*h(2688)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2688, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1170)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1170;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3218, 5357},
|
|
/*h(1244)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1244, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3208, 5363},
|
|
/*h(1234)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1234, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3282)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3282, 5357},
|
|
/*h(698)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {698, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1202;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_355_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3250, 5357},
|
|
/*h(1276)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1276, 5362},
|
|
/*h(666)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {666, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(656)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {656, 5361},
|
|
/*h(1266)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1266, 5357},
|
|
/*h(3240)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3240, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3314)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3314, 5357},
|
|
/*h(730)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {730, 5367},
|
|
/*h(2704)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2704, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2750)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2750, 5366},
|
|
/*h(166)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {166, 5358},
|
|
/*h(1153)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1153, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(240)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {240, 5359},
|
|
/*h(1227)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1227, 5363},
|
|
/*h(2214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2214, 5358},
|
|
/*h(3201)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3201, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2204)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2204, 5364},
|
|
/*h(2814)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2814, 5366},
|
|
/*h(1217)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1217, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3265, 5357},
|
|
/*h(681)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {681, 5367},
|
|
/*h(2278)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2278, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(198)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {198, 5358},
|
|
/*h(1185)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1185, 5357},
|
|
/*h(2782)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2782, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(649)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {649, 5367},
|
|
/*h(1259)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1259, 5363},
|
|
/*h(3233)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3233, 5357},
|
|
/*h(2246)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2246, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_538_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1249)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1249;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3297)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3297;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2766)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2766, 5366},
|
|
/*h(182)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {182, 5358},
|
|
/*h(1169)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1169, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1243)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1243, 5363},
|
|
/*h(3217)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3217, 5357},
|
|
/*h(2230)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2230, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2220, 5364},
|
|
/*h(1233)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1233, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3281)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3281, 5357},
|
|
/*h(697)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {697, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(1201)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1201, 5357},
|
|
/*h(2798)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2798, 5366},
|
|
/*h(214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {214, 5358},
|
|
/*h(2188)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2188, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_577_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(665)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {665, 5367},
|
|
/*h(2262)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2262, 5358},
|
|
/*h(3249)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3249, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1265)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1265;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(729)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {729, 5367},
|
|
/*h(3313)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3313, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_482_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1155)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1155, 5357},
|
|
/*h(168)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {168, 5365},
|
|
/*h(2752)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2752, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2216)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2216, 5365},
|
|
/*h(3203)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3203, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {232, 5365},
|
|
/*h(1219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1219, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3267)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3267, 5357},
|
|
/*h(2280)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2280, 5365},
|
|
/*h(683)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {683, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1187)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1187;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(651)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {651, 5367},
|
|
/*h(3235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3235, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2238, 5364},
|
|
/*h(1251)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1251, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_520_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3299)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3299, 5357},
|
|
/*h(715)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {715, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2768)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2768, 5361},
|
|
/*h(1171)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1171, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_262_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2232)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2232, 5365},
|
|
/*h(3219)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3219, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2222)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2222, 5364},
|
|
/*h(1235)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1235, 5357},
|
|
/*h(248)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {248, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2296)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2296, 5365},
|
|
/*h(3283)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3283, 5357},
|
|
/*h(699)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {699, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2800)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2800, 5361},
|
|
/*h(216)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {216, 5365},
|
|
/*h(1203)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1203, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3251)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3251;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(2254)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2254, 5364},
|
|
/*h(3241)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3241, 5363},
|
|
/*h(657)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {657, 5361},
|
|
/*h(1267)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1267, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((12*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(731)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {731, 5367},
|
|
/*h(2705)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2705, 5361},
|
|
/*h(3315)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {3315, 5357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(132)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {132, 5358},
|
|
/*h(2716)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2716, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2180)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2180;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2780)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2780, 5366},
|
|
/*h(196)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {196, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2244)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2244, 5358},
|
|
/*h(1257)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1257, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2748)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2748, 5366},
|
|
/*h(164)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {164, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(238)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {238, 5364},
|
|
/*h(2212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2212, 5358},
|
|
/*h(1225)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1225, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_530_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2202)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2202, 5365},
|
|
/*h(2812)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2812, 5366},
|
|
/*h(228)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {228, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2276)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2276;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2732)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2732, 5366},
|
|
/*h(148)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {148, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2196)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2196;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2796)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2796, 5366},
|
|
/*h(212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {212, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_440_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2260)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2260, 5358},
|
|
/*h(1273)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1273, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(180)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {180, 5358},
|
|
/*h(2764)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2764, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_570_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1241)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1241, 5363},
|
|
/*h(2228)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2228, 5358},
|
|
/*h(254)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {254, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_465_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2218)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2218, 5365},
|
|
/*h(244)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {244, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2292)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2292;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_475_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(744)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {744, 5367},
|
|
/*h(2718)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2718, 5366},
|
|
/*h(134)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {134, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(1195)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1195, 5363},
|
|
/*h(208)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {208, 5359},
|
|
/*h(2792)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2792, 5367},
|
|
/*h(2182)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2182, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((10*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(230)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 230;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(150)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {150, 5358},
|
|
/*h(760)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {760, 5367},
|
|
/*h(2734)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {2734, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(2808)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2808, 5367},
|
|
/*h(224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {224, 5359},
|
|
/*h(1211)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1211, 5363},
|
|
/*h(2198)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2198, 5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(246)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 246;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_448_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2294)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {5358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2294;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(738)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {738, 5361},
|
|
/*h(3322)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3322, 5363},
|
|
/*h(128)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {128, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2786)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2786, 5361},
|
|
/*h(202)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {202, 5365},
|
|
/*h(2176)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2176, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_385_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2776)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2776, 5367},
|
|
/*h(192)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {192, 5359},
|
|
/*h(1179)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1179, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3227)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3227, 5363},
|
|
/*h(643)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {643, 5361},
|
|
/*h(2240)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2240, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2744)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2744, 5367},
|
|
/*h(160)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {160, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2208, 5359},
|
|
/*h(234)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {234, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(675)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {675, 5361},
|
|
/*h(2272)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2272, 5359},
|
|
/*h(3259)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3259, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2728)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2728, 5367},
|
|
/*h(144)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {144, 5359},
|
|
/*h(754)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {754, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2802)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2802, 5361},
|
|
/*h(218)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {218, 5365},
|
|
/*h(2192)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2192, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2256)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2256, 5359},
|
|
/*h(3243)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3243, 5363},
|
|
/*h(659)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {659, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_450_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2760)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2760, 5367},
|
|
/*h(176)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {176, 5359},
|
|
/*h(1163)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1163, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {250, 5365},
|
|
/*h(2224)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2224, 5359},
|
|
/*h(3211)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3211, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3275, 5363},
|
|
/*h(691)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {691, 5361},
|
|
/*h(2288)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2288, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(3324)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3324, 5362},
|
|
/*h(740)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {740, 5360},
|
|
/*h(2714)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2714, 5367},
|
|
/*h(130)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {130, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2178)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2178, 5359},
|
|
/*h(2788)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2788, 5360},
|
|
/*h(204)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {204, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2778)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2778, 5367},
|
|
/*h(194)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {194, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_367_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(162)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {162, 5359},
|
|
/*h(2746)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2746, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_497_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2810)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2810, 5367},
|
|
/*h(226)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {226, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2730)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2730, 5367},
|
|
/*h(146)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {146, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_562_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2804)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2804, 5360},
|
|
/*h(2194)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2194, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {210, 5359},
|
|
/*h(2794)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2794, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2258;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2762)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2762, 5367},
|
|
/*h(178)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {178, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2226)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2226;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_328_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2290)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2290;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(129)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {129, 5359},
|
|
/*h(2713)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2713, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2777)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2777, 5367},
|
|
/*h(1180)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1180, 5362},
|
|
/*h(193)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {193, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(161)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 161;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2209)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2209;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {225, 5359},
|
|
/*h(1212)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1212, 5362},
|
|
/*h(2809)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2809, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3260)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3260, 5362},
|
|
/*h(676)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {676, 5360},
|
|
/*h(2273)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2273, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2729)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2729, 5367},
|
|
/*h(145)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {145, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2193)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2193;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1196)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1196, 5362},
|
|
/*h(2793)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2793, 5367},
|
|
/*h(209)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {209, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_228_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(177)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {177, 5359},
|
|
/*h(2761)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2761, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_550_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1228)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1228, 5362},
|
|
/*h(241)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {241, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3276)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3276, 5362},
|
|
/*h(692)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {692, 5360},
|
|
/*h(2289)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2289, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2715)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2715, 5367},
|
|
/*h(131)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {131, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1192)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1192, 5363},
|
|
/*h(2179)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2179, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(195)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {195, 5359},
|
|
/*h(1182)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1182, 5362},
|
|
/*h(2779)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2779, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(646)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {646, 5360},
|
|
/*h(1256)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1256, 5363},
|
|
/*h(2243)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2243, 5359},
|
|
/*h(3230)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3230, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((12*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2747)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2747, 5367},
|
|
/*h(163)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {163, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1224)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1224, 5363},
|
|
/*h(2211)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2211, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(227)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {227, 5359},
|
|
/*h(2201)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2201, 5365},
|
|
/*h(2811)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2811, 5367},
|
|
/*h(1214)=3 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1214, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2275, 5359},
|
|
/*h(678)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {678, 5360},
|
|
/*h(3262)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3262, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(147)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {147, 5359},
|
|
/*h(2731)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2731, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1208)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1208, 5363},
|
|
/*h(2195)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2195, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(2185)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2185, 5365},
|
|
/*h(2795)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2795, 5367},
|
|
/*h(1198)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1198, 5362},
|
|
/*h(211)=3 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {211, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3246)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3246, 5362},
|
|
/*h(662)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {662, 5360},
|
|
/*h(2259)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2259, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_365_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1166)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {1166, 5362},
|
|
/*h(2763)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2763, 5367},
|
|
/*h(179)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {179, 5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1240)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1240, 5363},
|
|
/*h(2227)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2227, 5359},
|
|
/*h(3214)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3214, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(243)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_533_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2291)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2291;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(708)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {708, 5360},
|
|
/*h(3292)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3292, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2756)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2756, 5360},
|
|
/*h(172)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {172, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(750)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {750, 5366},
|
|
/*h(2724)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2724, 5360},
|
|
/*h(140)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {140, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3308)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3308, 5362},
|
|
/*h(724)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {724, 5360},
|
|
/*h(2698)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2698, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2772)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2772, 5360},
|
|
/*h(188)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {188, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(766)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {766, 5366},
|
|
/*h(2740)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2740, 5360},
|
|
/*h(156)=2 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {156, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(756)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 756;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(720)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {720, 5361},
|
|
/*h(2694)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2694, 5360},
|
|
/*h(3304)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3304, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_468_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(710)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 710;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2758)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2758, 5360},
|
|
/*h(1161)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1161, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2726)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2726, 5360},
|
|
/*h(142)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {142, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3326)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3326, 5362},
|
|
/*h(742)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {742, 5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2790)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2790, 5360},
|
|
/*h(206)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {206, 5364},
|
|
/*h(1193)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1193, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_507_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3320)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3320, 5363},
|
|
/*h(2710)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2710, 5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(726)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {726, 5360},
|
|
/*h(3310)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3310, 5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2774)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2774, 5360},
|
|
/*h(190)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {190, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3278)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {3278, 5362},
|
|
/*h(694)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {694, 5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_377_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2742)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2742, 5360},
|
|
/*h(158)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {158, 5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_273_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(758)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {5360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2806)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {2806, 5360},
|
|
/*h(222)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {222, 5364},
|
|
/*h(1209)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {1209, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3288)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3288, 5363},
|
|
/*h(704)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {704, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(672)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {672, 5361},
|
|
/*h(3256)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3256, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2720)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2720, 5361},
|
|
/*h(136)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {136, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_508_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(736)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 736;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2784)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2784, 5361},
|
|
/*h(200)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {200, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3272)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3272, 5363},
|
|
/*h(688)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {688, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_547_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2736)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2736, 5361},
|
|
/*h(152)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {152, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_443_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(752)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(642)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {642, 5361},
|
|
/*h(3226)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3226, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2690)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3290)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3290, 5363},
|
|
/*h(706)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {706, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2754)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2754, 5361},
|
|
/*h(170)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {170, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3258, 5363},
|
|
/*h(674)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {674, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2722)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3242, 5363},
|
|
/*h(658)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {658, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2706)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3306)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3306, 5363},
|
|
/*h(722)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {722, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_555_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {186, 5365},
|
|
/*h(2770)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2770, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_258_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(690)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(154)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {154, 5365},
|
|
/*h(764)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {764, 5366},
|
|
/*h(2738)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2738, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3225)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3225, 5363},
|
|
/*h(641)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {641, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2689)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2689;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(705)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {705, 5361},
|
|
/*h(2302)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2302, 5364},
|
|
/*h(3289)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3289, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2270)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2270, 5364},
|
|
/*h(673)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {673, 5361},
|
|
/*h(3257)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3257, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(137)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {137, 5365},
|
|
/*h(747)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {747, 5367},
|
|
/*h(2721)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2721, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3321)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3321, 5363},
|
|
/*h(737)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {737, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_350_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3305)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3305, 5363},
|
|
/*h(721)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {721, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2286)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {2286, 5364},
|
|
/*h(3273)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3273, 5363},
|
|
/*h(689)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {689, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2737)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2737, 5361},
|
|
/*h(153)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {153, 5365},
|
|
/*h(763)=2 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {763, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(753)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 753;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2691)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2691;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_552_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3291)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3291, 5363},
|
|
/*h(707)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {707, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2723)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2723, 5361},
|
|
/*h(139)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {139, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3323)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3323, 5363},
|
|
/*h(739)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {739, 5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2787)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2787, 5361},
|
|
/*h(203)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {203, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2707)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2707;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(723)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 723;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_333_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2771)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2771, 5361},
|
|
/*h(187)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {187, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2739)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {2739, 5361},
|
|
/*h(155)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {155, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(755)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {5361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1164)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1164;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3212)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3212;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3228)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3228;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_558_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1262)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1262;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_467_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3294)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3294;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1278)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {5362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1278;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1160)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1160;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1176)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1176;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1272)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1272;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1162)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1162;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1226)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1226;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1194)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1194;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1258)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1258;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1178)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1178;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1242)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1210)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1274)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3209)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3209;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1177)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1177;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_487_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2697)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2697, 5367},
|
|
/*h(3307)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {3307, 5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1275)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1275;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2252;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 236;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_343_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2284)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2284;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_563_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(220)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 220;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2268)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2268;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_537_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2236)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2236;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(252)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 252;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2300)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2300;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_287_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2190)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(174)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2206)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {5364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2206;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2184;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2248)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2200)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2264)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2264, 5365},
|
|
/*h(667)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {667, 5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_418_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(184)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 184;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(138)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {138, 5365},
|
|
/*h(748)=1 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {748, 5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2186)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2186;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2250)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2282)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2266)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2266;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2234)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2234;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2298)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2298;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(233)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 233;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_428_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2281)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2281;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(249)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 249;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(700)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {700, 5366},
|
|
/*h(2297)=1 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {2297, 5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2203)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5365}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2203;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2700)=0 EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {5366}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2700;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2696)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2696;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2712)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(746)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_548_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(762)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(713)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 713;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_253_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(745)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 745;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2745)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2745;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(761)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 761;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2699)=0 EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {5367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2699;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_406_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(438)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 MASK=0*/ {6507}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 438;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 MASK=0*/ {6508}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1462)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 MASK=0*/ {6509}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(446)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {6522}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 446;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(958)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 MASK=0*/ {6523}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2_296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1470)=0 EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 MASK=0*/ {6524}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x39_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[582] = {
|
|
/*h(1220)=0 */ {1220, xed3_phash_find_mapevex_map2_opcode0x39_vv2_0_l1},
|
|
/*h(233)=1 */ {233, xed3_phash_find_mapevex_map2_opcode0x39_vv2_1_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(699)=3 */ {699, xed3_phash_find_mapevex_map2_opcode0x39_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2762)=5 */ {2762, xed3_phash_find_mapevex_map2_opcode0x39_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3228)=7 */ {3228, xed3_phash_find_mapevex_map2_opcode0x39_vv2_7_l1},
|
|
/*h(644)=8 */ {644, xed3_phash_find_mapevex_map2_opcode0x39_vv2_8_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2707)=10 */ {2707, xed3_phash_find_mapevex_map2_opcode0x39_vv2_10_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2186)=12 */ {2186, xed3_phash_find_mapevex_map2_opcode0x39_vv2_12_l1},
|
|
/*h(2796)=13 */ {2796, xed3_phash_find_mapevex_map2_opcode0x39_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3262)=15 */ {3262, xed3_phash_find_mapevex_map2_opcode0x39_vv2_15_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2220)=20 */ {2220, xed3_phash_find_mapevex_map2_opcode0x39_vv2_20_l1},
|
|
/*h(246)=21 */ {246, xed3_phash_find_mapevex_map2_opcode0x39_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(712)=23 */ {712, xed3_phash_find_mapevex_map2_opcode0x39_vv2_23_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1178)=25 */ {1178, xed3_phash_find_mapevex_map2_opcode0x39_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2254)=28 */ {2254, xed3_phash_find_mapevex_map2_opcode0x39_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(136)=30 */ {136, xed3_phash_find_mapevex_map2_opcode0x39_vv2_30_l1},
|
|
/*h(746)=31 */ {746, xed3_phash_find_mapevex_map2_opcode0x39_vv2_31_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2809)=33 */ {2809, xed3_phash_find_mapevex_map2_opcode0x39_vv2_33_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3275)=35 */ {3275, xed3_phash_find_mapevex_map2_opcode0x39_vv2_35_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(170)=38 */ {170, xed3_phash_find_mapevex_map2_opcode0x39_vv2_38_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2233)=40 */ {2233, xed3_phash_find_mapevex_map2_opcode0x39_vv2_40_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2699)=42 */ {2699, xed3_phash_find_mapevex_map2_opcode0x39_vv2_42_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(958)=44 */ {958, xed3_phash_find_mapevex_map2_opcode0x39_vv2_44_l1},
|
|
/*h(204)=45 */ {204, xed3_phash_find_mapevex_map2_opcode0x39_vv2_45_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(670)=48 */ {670, xed3_phash_find_mapevex_map2_opcode0x39_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(238)=53 */ {238, xed3_phash_find_mapevex_map2_opcode0x39_vv2_53_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3288)=55 */ {3288, xed3_phash_find_mapevex_map2_opcode0x39_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1170)=58 */ {1170, xed3_phash_find_mapevex_map2_opcode0x39_vv2_58_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(649)=60 */ {649, xed3_phash_find_mapevex_map2_opcode0x39_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2712)=62 */ {2712, xed3_phash_find_mapevex_map2_opcode0x39_vv2_62_l1},
|
|
/*h(3322)=63 */ {3322, xed3_phash_find_mapevex_map2_opcode0x39_vv2_63_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(217)=65 */ {217, xed3_phash_find_mapevex_map2_opcode0x39_vv2_65_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(683)=68 */ {683, xed3_phash_find_mapevex_map2_opcode0x39_vv2_68_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2746)=70 */ {2746, xed3_phash_find_mapevex_map2_opcode0x39_vv2_70_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3212)=72 */ {3212, xed3_phash_find_mapevex_map2_opcode0x39_vv2_72_l1},
|
|
/*h(251)=73 */ {251, xed3_phash_find_mapevex_map2_opcode0x39_vv2_73_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2691)=75 */ {2691, xed3_phash_find_mapevex_map2_opcode0x39_vv2_75_l1},
|
|
/*h(950)=76 */ {950, xed3_phash_find_mapevex_map2_opcode0x39_vv2_76_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2780)=78 */ {2780, xed3_phash_find_mapevex_map2_opcode0x39_vv2_78_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3246)=80 */ {3246, xed3_phash_find_mapevex_map2_opcode0x39_vv2_80_l1},
|
|
/*h(1272)=81 */ {1272, xed3_phash_find_mapevex_map2_opcode0x39_vv2_81_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2814)=85 */ {2814, xed3_phash_find_mapevex_map2_opcode0x39_vv2_85_l1},
|
|
/*h(230)=86 */ {230, xed3_phash_find_mapevex_map2_opcode0x39_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(696)=88 */ {696, xed3_phash_find_mapevex_map2_opcode0x39_vv2_88_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1162)=90 */ {1162, xed3_phash_find_mapevex_map2_opcode0x39_vv2_90_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3225)=92 */ {3225, xed3_phash_find_mapevex_map2_opcode0x39_vv2_92_l1},
|
|
/*h(2238)=93 */ {2238, xed3_phash_find_mapevex_map2_opcode0x39_vv2_93_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(730)=95 */ {730, xed3_phash_find_mapevex_map2_opcode0x39_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2793)=98 */ {2793, xed3_phash_find_mapevex_map2_opcode0x39_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3259)=100 */ {3259, xed3_phash_find_mapevex_map2_opcode0x39_vv2_100_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(764)=103 */ {764, xed3_phash_find_mapevex_map2_opcode0x39_vv2_103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2217)=105 */ {2217, xed3_phash_find_mapevex_map2_opcode0x39_vv2_105_l1},
|
|
/*h(243)=106 */ {243, xed3_phash_find_mapevex_map2_opcode0x39_vv2_106_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(188)=110 */ {188, xed3_phash_find_mapevex_map2_opcode0x39_vv2_110_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3238)=112 */ {3238, xed3_phash_find_mapevex_map2_opcode0x39_vv2_112_l1},
|
|
/*h(654)=113 */ {654, xed3_phash_find_mapevex_map2_opcode0x39_vv2_113_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2196)=117 */ {2196, xed3_phash_find_mapevex_map2_opcode0x39_vv2_117_l1},
|
|
/*h(222)=118 */ {222, xed3_phash_find_mapevex_map2_opcode0x39_vv2_118_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3272)=120 */ {3272, xed3_phash_find_mapevex_map2_opcode0x39_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1154)=122 */ {1154, xed3_phash_find_mapevex_map2_opcode0x39_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1243)=125 */ {1243, xed3_phash_find_mapevex_map2_opcode0x39_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2696)=127 */ {2696, xed3_phash_find_mapevex_map2_opcode0x39_vv2_127_l1},
|
|
/*h(3306)=128 */ {3306, xed3_phash_find_mapevex_map2_opcode0x39_vv2_128_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(201)=130 */ {201, xed3_phash_find_mapevex_map2_opcode0x39_vv2_130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3251)=132 */ {3251, xed3_phash_find_mapevex_map2_opcode0x39_vv2_132_l1},
|
|
/*h(667)=133 */ {667, xed3_phash_find_mapevex_map2_opcode0x39_vv2_133_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2730)=135 */ {2730, xed3_phash_find_mapevex_map2_opcode0x39_vv2_135_l1},
|
|
/*h(756)=136 */ {756, xed3_phash_find_mapevex_map2_opcode0x39_vv2_136_l1},
|
|
/*h(2209)=137 */ {2209, xed3_phash_find_mapevex_map2_opcode0x39_vv2_137_l1},
|
|
/*h(235)=138 */ {235, xed3_phash_find_mapevex_map2_opcode0x39_vv2_138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2298)=140 */ {2298, xed3_phash_find_mapevex_map2_opcode0x39_vv2_140_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2764)=143 */ {2764, xed3_phash_find_mapevex_map2_opcode0x39_vv2_143_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1256)=145 */ {1256, xed3_phash_find_mapevex_map2_opcode0x39_vv2_145_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2798)=150 */ {2798, xed3_phash_find_mapevex_map2_opcode0x39_vv2_150_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(680)=153 */ {680, xed3_phash_find_mapevex_map2_opcode0x39_vv2_153_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3209)=157 */ {3209, xed3_phash_find_mapevex_map2_opcode0x39_vv2_157_l1},
|
|
/*h(248)=158 */ {248, xed3_phash_find_mapevex_map2_opcode0x39_vv2_158_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(714)=160 */ {714, xed3_phash_find_mapevex_map2_opcode0x39_vv2_160_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2777)=163 */ {2777, xed3_phash_find_mapevex_map2_opcode0x39_vv2_163_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3243)=165 */ {3243, xed3_phash_find_mapevex_map2_opcode0x39_vv2_165_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2722)=167 */ {2722, xed3_phash_find_mapevex_map2_opcode0x39_vv2_167_l1},
|
|
/*h(748)=168 */ {748, xed3_phash_find_mapevex_map2_opcode0x39_vv2_168_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2811)=170 */ {2811, xed3_phash_find_mapevex_map2_opcode0x39_vv2_170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2290)=173 */ {2290, xed3_phash_find_mapevex_map2_opcode0x39_vv2_173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(172)=175 */ {172, xed3_phash_find_mapevex_map2_opcode0x39_vv2_175_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3222)=177 */ {3222, xed3_phash_find_mapevex_map2_opcode0x39_vv2_177_l1},
|
|
/*h(2235)=178 */ {2235, xed3_phash_find_mapevex_map2_opcode0x39_vv2_178_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2180)=182 */ {2180, xed3_phash_find_mapevex_map2_opcode0x39_vv2_182_l1},
|
|
/*h(206)=183 */ {206, xed3_phash_find_mapevex_map2_opcode0x39_vv2_183_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3256)=185 */ {3256, xed3_phash_find_mapevex_map2_opcode0x39_vv2_185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(761)=188 */ {761, xed3_phash_find_mapevex_map2_opcode0x39_vv2_188_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1227)=190 */ {1227, xed3_phash_find_mapevex_map2_opcode0x39_vv2_190_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3290)=193 */ {3290, xed3_phash_find_mapevex_map2_opcode0x39_vv2_193_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(185)=195 */ {185, xed3_phash_find_mapevex_map2_opcode0x39_vv2_195_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(651)=197 */ {651, xed3_phash_find_mapevex_map2_opcode0x39_vv2_197_l1},
|
|
/*h(2248)=198 */ {2248, xed3_phash_find_mapevex_map2_opcode0x39_vv2_198_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2714)=200 */ {2714, xed3_phash_find_mapevex_map2_opcode0x39_vv2_200_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2193)=202 */ {2193, xed3_phash_find_mapevex_map2_opcode0x39_vv2_202_l1},
|
|
/*h(219)=203 */ {219, xed3_phash_find_mapevex_map2_opcode0x39_vv2_203_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2282)=205 */ {2282, xed3_phash_find_mapevex_map2_opcode0x39_vv2_205_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2748)=208 */ {2748, xed3_phash_find_mapevex_map2_opcode0x39_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1240)=210 */ {1240, xed3_phash_find_mapevex_map2_opcode0x39_vv2_210_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2782)=215 */ {2782, xed3_phash_find_mapevex_map2_opcode0x39_vv2_215_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(664)=217 */ {664, xed3_phash_find_mapevex_map2_opcode0x39_vv2_217_l1},
|
|
/*h(1274)=218 */ {1274, xed3_phash_find_mapevex_map2_opcode0x39_vv2_218_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(753)=220 */ {753, xed3_phash_find_mapevex_map2_opcode0x39_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2206)=222 */ {2206, xed3_phash_find_mapevex_map2_opcode0x39_vv2_222_l1},
|
|
/*h(232)=223 */ {232, xed3_phash_find_mapevex_map2_opcode0x39_vv2_223_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(698)=225 */ {698, xed3_phash_find_mapevex_map2_opcode0x39_vv2_225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1164)=227 */ {1164, xed3_phash_find_mapevex_map2_opcode0x39_vv2_227_l1},
|
|
/*h(2761)=228 */ {2761, xed3_phash_find_mapevex_map2_opcode0x39_vv2_228_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3227)=230 */ {3227, xed3_phash_find_mapevex_map2_opcode0x39_vv2_230_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2706)=232 */ {2706, xed3_phash_find_mapevex_map2_opcode0x39_vv2_232_l1},
|
|
/*h(732)=233 */ {732, xed3_phash_find_mapevex_map2_opcode0x39_vv2_233_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2795)=235 */ {2795, xed3_phash_find_mapevex_map2_opcode0x39_vv2_235_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2274)=238 */ {2274, xed3_phash_find_mapevex_map2_opcode0x39_vv2_238_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(766)=240 */ {766, xed3_phash_find_mapevex_map2_opcode0x39_vv2_240_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2219)=242 */ {2219, xed3_phash_find_mapevex_map2_opcode0x39_vv2_242_l1},
|
|
/*h(1232)=243 */ {1232, xed3_phash_find_mapevex_map2_opcode0x39_vv2_243_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1177)=247 */ {1177, xed3_phash_find_mapevex_map2_opcode0x39_vv2_247_l1},
|
|
/*h(190)=248 */ {190, xed3_phash_find_mapevex_map2_opcode0x39_vv2_248_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3240)=250 */ {3240, xed3_phash_find_mapevex_map2_opcode0x39_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(745)=253 */ {745, xed3_phash_find_mapevex_map2_opcode0x39_vv2_253_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2808)=255 */ {2808, xed3_phash_find_mapevex_map2_opcode0x39_vv2_255_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3274)=257 */ {3274, xed3_phash_find_mapevex_map2_opcode0x39_vv2_257_l1},
|
|
/*h(690)=258 */ {690, xed3_phash_find_mapevex_map2_opcode0x39_vv2_258_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(169)=260 */ {169, xed3_phash_find_mapevex_map2_opcode0x39_vv2_260_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2232)=262 */ {2232, xed3_phash_find_mapevex_map2_opcode0x39_vv2_262_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2698)=265 */ {2698, xed3_phash_find_mapevex_map2_opcode0x39_vv2_265_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2177)=267 */ {2177, xed3_phash_find_mapevex_map2_opcode0x39_vv2_267_l1},
|
|
/*h(203)=268 */ {203, xed3_phash_find_mapevex_map2_opcode0x39_vv2_268_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2266)=270 */ {2266, xed3_phash_find_mapevex_map2_opcode0x39_vv2_270_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2732)=272 */ {2732, xed3_phash_find_mapevex_map2_opcode0x39_vv2_272_l1},
|
|
/*h(758)=273 */ {758, xed3_phash_find_mapevex_map2_opcode0x39_vv2_273_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1224)=275 */ {1224, xed3_phash_find_mapevex_map2_opcode0x39_vv2_275_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2300)=278 */ {2300, xed3_phash_find_mapevex_map2_opcode0x39_vv2_278_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2766)=280 */ {2766, xed3_phash_find_mapevex_map2_opcode0x39_vv2_280_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(648)=282 */ {648, xed3_phash_find_mapevex_map2_opcode0x39_vv2_282_l1},
|
|
/*h(1258)=283 */ {1258, xed3_phash_find_mapevex_map2_opcode0x39_vv2_283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3321)=285 */ {3321, xed3_phash_find_mapevex_map2_opcode0x39_vv2_285_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2190)=287 */ {2190, xed3_phash_find_mapevex_map2_opcode0x39_vv2_287_l1},
|
|
/*h(216)=288 */ {216, xed3_phash_find_mapevex_map2_opcode0x39_vv2_288_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(682)=290 */ {682, xed3_phash_find_mapevex_map2_opcode0x39_vv2_290_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2745)=292 */ {2745, xed3_phash_find_mapevex_map2_opcode0x39_vv2_292_l1},
|
|
/*h(161)=293 */ {161, xed3_phash_find_mapevex_map2_opcode0x39_vv2_293_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(250)=295 */ {250, xed3_phash_find_mapevex_map2_opcode0x39_vv2_295_l1},
|
|
/*h(1470)=296 */ {1470, xed3_phash_find_mapevex_map2_opcode0x39_vv2_296_l1},
|
|
/*h(2690)=297 */ {2690, xed3_phash_find_mapevex_map2_opcode0x39_vv2_297_l1},
|
|
/*h(716)=298 */ {716, xed3_phash_find_mapevex_map2_opcode0x39_vv2_298_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2779)=300 */ {2779, xed3_phash_find_mapevex_map2_opcode0x39_vv2_300_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2258)=303 */ {2258, xed3_phash_find_mapevex_map2_opcode0x39_vv2_303_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(750)=305 */ {750, xed3_phash_find_mapevex_map2_opcode0x39_vv2_305_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2203)=307 */ {2203, xed3_phash_find_mapevex_map2_opcode0x39_vv2_307_l1},
|
|
/*h(1216)=308 */ {1216, xed3_phash_find_mapevex_map2_opcode0x39_vv2_308_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2292)=310 */ {2292, xed3_phash_find_mapevex_map2_opcode0x39_vv2_310_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1161)=312 */ {1161, xed3_phash_find_mapevex_map2_opcode0x39_vv2_312_l1},
|
|
/*h(174)=313 */ {174, xed3_phash_find_mapevex_map2_opcode0x39_vv2_313_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3224)=315 */ {3224, xed3_phash_find_mapevex_map2_opcode0x39_vv2_315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(729)=318 */ {729, xed3_phash_find_mapevex_map2_opcode0x39_vv2_318_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2792)=320 */ {2792, xed3_phash_find_mapevex_map2_opcode0x39_vv2_320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3258)=322 */ {3258, xed3_phash_find_mapevex_map2_opcode0x39_vv2_322_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(763)=325 */ {763, xed3_phash_find_mapevex_map2_opcode0x39_vv2_325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2216)=327 */ {2216, xed3_phash_find_mapevex_map2_opcode0x39_vv2_327_l1},
|
|
/*h(242)=328 */ {242, xed3_phash_find_mapevex_map2_opcode0x39_vv2_328_l1},
|
|
/*h(1462)=329 */ {1462, xed3_phash_find_mapevex_map2_opcode0x39_vv2_329_l1},
|
|
/*h(3292)=330 */ {3292, xed3_phash_find_mapevex_map2_opcode0x39_vv2_330_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1174)=332 */ {1174, xed3_phash_find_mapevex_map2_opcode0x39_vv2_332_l1},
|
|
/*h(187)=333 */ {187, xed3_phash_find_mapevex_map2_opcode0x39_vv2_333_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2250)=335 */ {2250, xed3_phash_find_mapevex_map2_opcode0x39_vv2_335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2716)=337 */ {2716, xed3_phash_find_mapevex_map2_opcode0x39_vv2_337_l1},
|
|
/*h(3326)=338 */ {3326, xed3_phash_find_mapevex_map2_opcode0x39_vv2_338_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1208)=340 */ {1208, xed3_phash_find_mapevex_map2_opcode0x39_vv2_340_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2284)=343 */ {2284, xed3_phash_find_mapevex_map2_opcode0x39_vv2_343_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2750)=345 */ {2750, xed3_phash_find_mapevex_map2_opcode0x39_vv2_345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3216)=347 */ {3216, xed3_phash_find_mapevex_map2_opcode0x39_vv2_347_l1},
|
|
/*h(1242)=348 */ {1242, xed3_phash_find_mapevex_map2_opcode0x39_vv2_348_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3305)=350 */ {3305, xed3_phash_find_mapevex_map2_opcode0x39_vv2_350_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1187)=352 */ {1187, xed3_phash_find_mapevex_map2_opcode0x39_vv2_352_l1},
|
|
/*h(200)=353 */ {200, xed3_phash_find_mapevex_map2_opcode0x39_vv2_353_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(666)=355 */ {666, xed3_phash_find_mapevex_map2_opcode0x39_vv2_355_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2729)=357 */ {2729, xed3_phash_find_mapevex_map2_opcode0x39_vv2_357_l1},
|
|
/*h(755)=358 */ {755, xed3_phash_find_mapevex_map2_opcode0x39_vv2_358_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(234)=360 */ {234, xed3_phash_find_mapevex_map2_opcode0x39_vv2_360_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3284)=362 */ {3284, xed3_phash_find_mapevex_map2_opcode0x39_vv2_362_l1},
|
|
/*h(700)=363 */ {700, xed3_phash_find_mapevex_map2_opcode0x39_vv2_363_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2763)=365 */ {2763, xed3_phash_find_mapevex_map2_opcode0x39_vv2_365_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2242)=367 */ {2242, xed3_phash_find_mapevex_map2_opcode0x39_vv2_367_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(734)=370 */ {734, xed3_phash_find_mapevex_map2_opcode0x39_vv2_370_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2187)=372 */ {2187, xed3_phash_find_mapevex_map2_opcode0x39_vv2_372_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(446)=374 */ {446, xed3_phash_find_mapevex_map2_opcode0x39_vv2_374_l1},
|
|
/*h(2276)=375 */ {2276, xed3_phash_find_mapevex_map2_opcode0x39_vv2_375_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(158)=377 */ {158, xed3_phash_find_mapevex_map2_opcode0x39_vv2_377_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3208)=380 */ {3208, xed3_phash_find_mapevex_map2_opcode0x39_vv2_380_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3297)=382 */ {3297, xed3_phash_find_mapevex_map2_opcode0x39_vv2_382_l1},
|
|
/*h(713)=383 */ {713, xed3_phash_find_mapevex_map2_opcode0x39_vv2_383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2776)=385 */ {2776, xed3_phash_find_mapevex_map2_opcode0x39_vv2_385_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3242)=387 */ {3242, xed3_phash_find_mapevex_map2_opcode0x39_vv2_387_l1},
|
|
/*h(1268)=388 */ {1268, xed3_phash_find_mapevex_map2_opcode0x39_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(747)=390 */ {747, xed3_phash_find_mapevex_map2_opcode0x39_vv2_390_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2200)=392 */ {2200, xed3_phash_find_mapevex_map2_opcode0x39_vv2_392_l1},
|
|
/*h(2810)=393 */ {2810, xed3_phash_find_mapevex_map2_opcode0x39_vv2_393_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3276)=395 */ {3276, xed3_phash_find_mapevex_map2_opcode0x39_vv2_395_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(171)=397 */ {171, xed3_phash_find_mapevex_map2_opcode0x39_vv2_397_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2234)=400 */ {2234, xed3_phash_find_mapevex_map2_opcode0x39_vv2_400_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2700)=402 */ {2700, xed3_phash_find_mapevex_map2_opcode0x39_vv2_402_l1},
|
|
/*h(3310)=403 */ {3310, xed3_phash_find_mapevex_map2_opcode0x39_vv2_403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1192)=405 */ {1192, xed3_phash_find_mapevex_map2_opcode0x39_vv2_405_l1},
|
|
/*h(438)=406 */ {438, xed3_phash_find_mapevex_map2_opcode0x39_vv2_406_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2268)=408 */ {2268, xed3_phash_find_mapevex_map2_opcode0x39_vv2_408_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(760)=410 */ {760, xed3_phash_find_mapevex_map2_opcode0x39_vv2_410_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3200)=412 */ {3200, xed3_phash_find_mapevex_map2_opcode0x39_vv2_412_l1},
|
|
/*h(1226)=413 */ {1226, xed3_phash_find_mapevex_map2_opcode0x39_vv2_413_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2302)=415 */ {2302, xed3_phash_find_mapevex_map2_opcode0x39_vv2_415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2768)=417 */ {2768, xed3_phash_find_mapevex_map2_opcode0x39_vv2_417_l1},
|
|
/*h(184)=418 */ {184, xed3_phash_find_mapevex_map2_opcode0x39_vv2_418_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(650)=420 */ {650, xed3_phash_find_mapevex_map2_opcode0x39_vv2_420_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2713)=422 */ {2713, xed3_phash_find_mapevex_map2_opcode0x39_vv2_422_l1},
|
|
/*h(3323)=423 */ {3323, xed3_phash_find_mapevex_map2_opcode0x39_vv2_423_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(218)=425 */ {218, xed3_phash_find_mapevex_map2_opcode0x39_vv2_425_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(684)=427 */ {684, xed3_phash_find_mapevex_map2_opcode0x39_vv2_427_l1},
|
|
/*h(2281)=428 */ {2281, xed3_phash_find_mapevex_map2_opcode0x39_vv2_428_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2747)=430 */ {2747, xed3_phash_find_mapevex_map2_opcode0x39_vv2_430_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2226)=432 */ {2226, xed3_phash_find_mapevex_map2_opcode0x39_vv2_432_l1},
|
|
/*h(252)=433 */ {252, xed3_phash_find_mapevex_map2_opcode0x39_vv2_433_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(718)=435 */ {718, xed3_phash_find_mapevex_map2_opcode0x39_vv2_435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1184)=437 */ {1184, xed3_phash_find_mapevex_map2_opcode0x39_vv2_437_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1273)=440 */ {1273, xed3_phash_find_mapevex_map2_opcode0x39_vv2_440_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(142)=442 */ {142, xed3_phash_find_mapevex_map2_opcode0x39_vv2_442_l1},
|
|
/*h(752)=443 */ {752, xed3_phash_find_mapevex_map2_opcode0x39_vv2_443_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1218)=445 */ {1218, xed3_phash_find_mapevex_map2_opcode0x39_vv2_445_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(697)=447 */ {697, xed3_phash_find_mapevex_map2_opcode0x39_vv2_447_l1},
|
|
/*h(2294)=448 */ {2294, xed3_phash_find_mapevex_map2_opcode0x39_vv2_448_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2760)=450 */ {2760, xed3_phash_find_mapevex_map2_opcode0x39_vv2_450_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3226)=452 */ {3226, xed3_phash_find_mapevex_map2_opcode0x39_vv2_452_l1},
|
|
/*h(1252)=453 */ {1252, xed3_phash_find_mapevex_map2_opcode0x39_vv2_453_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(731)=455 */ {731, xed3_phash_find_mapevex_map2_opcode0x39_vv2_455_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2184)=457 */ {2184, xed3_phash_find_mapevex_map2_opcode0x39_vv2_457_l1},
|
|
/*h(2794)=458 */ {2794, xed3_phash_find_mapevex_map2_opcode0x39_vv2_458_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3260)=460 */ {3260, xed3_phash_find_mapevex_map2_opcode0x39_vv2_460_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(155)=462 */ {155, xed3_phash_find_mapevex_map2_opcode0x39_vv2_462_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2218)=465 */ {2218, xed3_phash_find_mapevex_map2_opcode0x39_vv2_465_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3294)=467 */ {3294, xed3_phash_find_mapevex_map2_opcode0x39_vv2_467_l1},
|
|
/*h(710)=468 */ {710, xed3_phash_find_mapevex_map2_opcode0x39_vv2_468_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1176)=470 */ {1176, xed3_phash_find_mapevex_map2_opcode0x39_vv2_470_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2252)=472 */ {2252, xed3_phash_find_mapevex_map2_opcode0x39_vv2_472_l1},
|
|
/*h(1265)=473 */ {1265, xed3_phash_find_mapevex_map2_opcode0x39_vv2_473_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(744)=475 */ {744, xed3_phash_find_mapevex_map2_opcode0x39_vv2_475_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1210)=477 */ {1210, xed3_phash_find_mapevex_map2_opcode0x39_vv2_477_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2286)=480 */ {2286, xed3_phash_find_mapevex_map2_opcode0x39_vv2_480_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(168)=482 */ {168, xed3_phash_find_mapevex_map2_opcode0x39_vv2_482_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1244)=485 */ {1244, xed3_phash_find_mapevex_map2_opcode0x39_vv2_485_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2697)=487 */ {2697, xed3_phash_find_mapevex_map2_opcode0x39_vv2_487_l1},
|
|
/*h(723)=488 */ {723, xed3_phash_find_mapevex_map2_opcode0x39_vv2_488_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(202)=490 */ {202, xed3_phash_find_mapevex_map2_opcode0x39_vv2_490_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(668)=492 */ {668, xed3_phash_find_mapevex_map2_opcode0x39_vv2_492_l1},
|
|
/*h(1278)=493 */ {1278, xed3_phash_find_mapevex_map2_opcode0x39_vv2_493_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2731)=495 */ {2731, xed3_phash_find_mapevex_map2_opcode0x39_vv2_495_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2210)=497 */ {2210, xed3_phash_find_mapevex_map2_opcode0x39_vv2_497_l1},
|
|
/*h(236)=498 */ {236, xed3_phash_find_mapevex_map2_opcode0x39_vv2_498_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(702)=500 */ {702, xed3_phash_find_mapevex_map2_opcode0x39_vv2_500_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1168)=502 */ {1168, xed3_phash_find_mapevex_map2_opcode0x39_vv2_502_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1257)=505 */ {1257, xed3_phash_find_mapevex_map2_opcode0x39_vv2_505_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3320)=507 */ {3320, xed3_phash_find_mapevex_map2_opcode0x39_vv2_507_l1},
|
|
/*h(736)=508 */ {736, xed3_phash_find_mapevex_map2_opcode0x39_vv2_508_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1202)=510 */ {1202, xed3_phash_find_mapevex_map2_opcode0x39_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(681)=512 */ {681, xed3_phash_find_mapevex_map2_opcode0x39_vv2_512_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2744)=515 */ {2744, xed3_phash_find_mapevex_map2_opcode0x39_vv2_515_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3210)=517 */ {3210, xed3_phash_find_mapevex_map2_opcode0x39_vv2_517_l1},
|
|
/*h(249)=518 */ {249, xed3_phash_find_mapevex_map2_opcode0x39_vv2_518_l1},
|
|
/*h(2689)=519 */ {2689, xed3_phash_find_mapevex_map2_opcode0x39_vv2_519_l1},
|
|
/*h(715)=520 */ {715, xed3_phash_find_mapevex_map2_opcode0x39_vv2_520_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2778)=522 */ {2778, xed3_phash_find_mapevex_map2_opcode0x39_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3244)=525 */ {3244, xed3_phash_find_mapevex_map2_opcode0x39_vv2_525_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(139)=527 */ {139, xed3_phash_find_mapevex_map2_opcode0x39_vv2_527_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2812)=530 */ {2812, xed3_phash_find_mapevex_map2_opcode0x39_vv2_530_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3278)=532 */ {3278, xed3_phash_find_mapevex_map2_opcode0x39_vv2_532_l1},
|
|
/*h(2291)=533 */ {2291, xed3_phash_find_mapevex_map2_opcode0x39_vv2_533_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1160)=535 */ {1160, xed3_phash_find_mapevex_map2_opcode0x39_vv2_535_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2236)=537 */ {2236, xed3_phash_find_mapevex_map2_opcode0x39_vv2_537_l1},
|
|
/*h(1249)=538 */ {1249, xed3_phash_find_mapevex_map2_opcode0x39_vv2_538_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(728)=540 */ {728, xed3_phash_find_mapevex_map2_opcode0x39_vv2_540_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1194)=542 */ {1194, xed3_phash_find_mapevex_map2_opcode0x39_vv2_542_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2270)=545 */ {2270, xed3_phash_find_mapevex_map2_opcode0x39_vv2_545_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(152)=547 */ {152, xed3_phash_find_mapevex_map2_opcode0x39_vv2_547_l1},
|
|
/*h(762)=548 */ {762, xed3_phash_find_mapevex_map2_opcode0x39_vv2_548_l1},
|
|
/*h(3202)=549 */ {3202, xed3_phash_find_mapevex_map2_opcode0x39_vv2_549_l1},
|
|
/*h(1228)=550 */ {1228, xed3_phash_find_mapevex_map2_opcode0x39_vv2_550_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3291)=552 */ {3291, xed3_phash_find_mapevex_map2_opcode0x39_vv2_552_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(186)=555 */ {186, xed3_phash_find_mapevex_map2_opcode0x39_vv2_555_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(652)=557 */ {652, xed3_phash_find_mapevex_map2_opcode0x39_vv2_557_l1},
|
|
/*h(1262)=558 */ {1262, xed3_phash_find_mapevex_map2_opcode0x39_vv2_558_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2715)=560 */ {2715, xed3_phash_find_mapevex_map2_opcode0x39_vv2_560_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2804)=562 */ {2804, xed3_phash_find_mapevex_map2_opcode0x39_vv2_562_l1},
|
|
/*h(220)=563 */ {220, xed3_phash_find_mapevex_map2_opcode0x39_vv2_563_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(686)=565 */ {686, xed3_phash_find_mapevex_map2_opcode0x39_vv2_565_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1152)=567 */ {1152, xed3_phash_find_mapevex_map2_opcode0x39_vv2_567_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(254)=570 */ {254, xed3_phash_find_mapevex_map2_opcode0x39_vv2_570_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3304)=572 */ {3304, xed3_phash_find_mapevex_map2_opcode0x39_vv2_572_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1186)=575 */ {1186, xed3_phash_find_mapevex_map2_opcode0x39_vv2_575_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(665)=577 */ {665, xed3_phash_find_mapevex_map2_opcode0x39_vv2_577_l1},
|
|
/*h(1275)=578 */ {1275, xed3_phash_find_mapevex_map2_opcode0x39_vv2_578_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2728)=580 */ {2728, xed3_phash_find_mapevex_map2_opcode0x39_vv2_580_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 582ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[599] = {
|
|
/*h(1198)=0 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1198, 6502},
|
|
/*h(200)=1 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {200, 6499},
|
|
/*h(2796)=2 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2796, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2198)=5 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2198, 6498},
|
|
/*h(1200)=6 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1200, 6503},
|
|
/*h(202)=7 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {202, 6499},
|
|
/*h(2798)=8 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2798, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2200)=11 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2200, 6499},
|
|
/*h(1202)=12 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1202, 6503},
|
|
/*h(204)=13 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {204, 6498},
|
|
/*h(2800)=14 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2800, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3200)=16 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3200, 6503},
|
|
/*h(2202)=17 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2202, 6499},
|
|
/*h(1204)=18 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1204, 6502},
|
|
/*h(206)=19 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {206, 6498},
|
|
/*h(2802)=20 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2802, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3202)=22 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3202, 6503},
|
|
/*h(2204)=23 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2204, 6498},
|
|
/*h(1206)=24 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1206, 6502},
|
|
/*h(208)=25 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {208, 6499},
|
|
/*h(2804)=26 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2804, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3204)=28 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3204, 6502},
|
|
/*h(2206)=29 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2206, 6498},
|
|
/*h(1208)=30 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1208, 6503},
|
|
/*h(210)=31 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {210, 6499},
|
|
/*h(2806)=32 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2806, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3206)=34 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3206, 6502},
|
|
/*h(2208)=35 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2208, 6499},
|
|
/*h(1210)=36 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1210, 6503},
|
|
/*h(212)=37 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {212, 6498},
|
|
/*h(2808)=38 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2808, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3208)=40 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3208, 6503},
|
|
/*h(2210)=41 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2210, 6499},
|
|
/*h(1212)=42 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1212, 6502},
|
|
/*h(214)=43 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {214, 6498},
|
|
/*h(2810)=44 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2810, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3210)=46 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3210, 6503},
|
|
/*h(2212)=47 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2212, 6498},
|
|
/*h(1214)=48 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1214, 6502},
|
|
/*h(216)=49 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {216, 6499},
|
|
/*h(2812)=50 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2812, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3212)=52 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3212, 6502},
|
|
/*h(2214)=53 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2214, 6498},
|
|
/*h(1216)=54 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1216, 6503},
|
|
/*h(218)=55 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {218, 6499},
|
|
/*h(2814)=56 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2814, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3214)=58 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3214, 6502},
|
|
/*h(2216)=59 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2216, 6499},
|
|
/*h(1218)=60 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1218, 6503},
|
|
/*h(220)=61 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {220, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3216)=64 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3216, 6503},
|
|
/*h(2218)=65 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2218, 6499},
|
|
/*h(1220)=66 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1220, 6502},
|
|
/*h(222)=67 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {222, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3218)=70 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3218, 6503},
|
|
/*h(2220)=71 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2220, 6498},
|
|
/*h(1222)=72 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1222, 6502},
|
|
/*h(224)=73 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {224, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3220)=76 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3220, 6502},
|
|
/*h(2222)=77 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2222, 6498},
|
|
/*h(1224)=78 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1224, 6503},
|
|
/*h(226)=79 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {226, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3222)=82 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3222, 6502},
|
|
/*h(2224)=83 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2224, 6499},
|
|
/*h(1226)=84 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1226, 6503},
|
|
/*h(228)=85 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {228, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3224)=88 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3224, 6503},
|
|
/*h(2226)=89 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2226, 6499},
|
|
/*h(1228)=90 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1228, 6502},
|
|
/*h(230)=91 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {230, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3226)=94 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3226, 6503},
|
|
/*h(2228)=95 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2228, 6498},
|
|
/*h(1230)=96 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1230, 6502},
|
|
/*h(232)=97 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {232, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3228)=100 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3228, 6502},
|
|
/*h(2230)=101 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2230, 6498},
|
|
/*h(1232)=102 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1232, 6503},
|
|
/*h(234)=103 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {234, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3230)=106 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3230, 6502},
|
|
/*h(2232)=107 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2232, 6499},
|
|
/*h(1234)=108 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1234, 6503},
|
|
/*h(236)=109 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {236, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3232)=112 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3232, 6503},
|
|
/*h(2234)=113 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2234, 6499},
|
|
/*h(1236)=114 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1236, 6502},
|
|
/*h(238)=115 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {238, 6498},
|
|
/*h(438)=116 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 MASK=0*/ {438, 6004},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3234)=118 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3234, 6503},
|
|
/*h(2236)=119 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2236, 6498},
|
|
/*h(1238)=120 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1238, 6502},
|
|
/*h(240)=121 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {240, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(640)=123 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {640, 6501},
|
|
/*h(3236)=124 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3236, 6502},
|
|
/*h(2238)=125 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2238, 6498},
|
|
/*h(1240)=126 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1240, 6503},
|
|
/*h(242)=127 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {242, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(642)=129 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {642, 6501},
|
|
/*h(3238)=130 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3238, 6502},
|
|
/*h(2240)=131 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2240, 6499},
|
|
/*h(1242)=132 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1242, 6503},
|
|
/*h(244)=133 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {244, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(644)=135 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {644, 6500},
|
|
/*h(3240)=136 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3240, 6503},
|
|
/*h(2242)=137 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2242, 6499},
|
|
/*h(1244)=138 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1244, 6502},
|
|
/*h(246)=139 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {246, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(646)=141 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {646, 6500},
|
|
/*h(3242)=142 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3242, 6503},
|
|
/*h(2244)=143 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2244, 6498},
|
|
/*h(1246)=144 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1246, 6502},
|
|
/*h(248)=145 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {248, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(648)=147 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {648, 6501},
|
|
/*h(3244)=148 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3244, 6502},
|
|
/*h(2246)=149 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2246, 6498},
|
|
/*h(1248)=150 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1248, 6503},
|
|
/*h(250)=151 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {250, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(650)=153 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {650, 6501},
|
|
/*h(3246)=154 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3246, 6502},
|
|
/*h(2248)=155 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2248, 6499},
|
|
/*h(1250)=156 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1250, 6503},
|
|
/*h(252)=157 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {252, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(652)=159 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {652, 6500},
|
|
/*h(3248)=160 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3248, 6503},
|
|
/*h(2250)=161 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2250, 6499},
|
|
/*h(1252)=162 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1252, 6502},
|
|
/*h(254)=163 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {254, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(654)=165 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {654, 6500},
|
|
/*h(3250)=166 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3250, 6503},
|
|
/*h(2252)=167 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2252, 6498},
|
|
/*h(1254)=168 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1254, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(656)=171 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {656, 6501},
|
|
/*h(3252)=172 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3252, 6502},
|
|
/*h(2254)=173 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2254, 6498},
|
|
/*h(1256)=174 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1256, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(658)=177 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {658, 6501},
|
|
/*h(3254)=178 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3254, 6502},
|
|
/*h(2256)=179 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2256, 6499},
|
|
/*h(1258)=180 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1258, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(660)=183 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {660, 6500},
|
|
/*h(3256)=184 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3256, 6503},
|
|
/*h(2258)=185 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2258, 6499},
|
|
/*h(1260)=186 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1260, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(662)=189 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {662, 6500},
|
|
/*h(3258)=190 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3258, 6503},
|
|
/*h(2260)=191 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2260, 6498},
|
|
/*h(1262)=192 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1262, 6502},
|
|
/*h(1462)=193 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 MASK=0*/ {1462, 6003},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(664)=195 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {664, 6501},
|
|
/*h(3260)=196 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3260, 6502},
|
|
/*h(2262)=197 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2262, 6498},
|
|
/*h(1264)=198 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1264, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(666)=201 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {666, 6501},
|
|
/*h(3262)=202 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3262, 6502},
|
|
/*h(2264)=203 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2264, 6499},
|
|
/*h(1266)=204 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1266, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(668)=207 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {668, 6500},
|
|
/*h(3264)=208 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3264, 6503},
|
|
/*h(2266)=209 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2266, 6499},
|
|
/*h(1268)=210 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1268, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(670)=213 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {670, 6500},
|
|
/*h(3266)=214 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3266, 6503},
|
|
/*h(2268)=215 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2268, 6498},
|
|
/*h(1270)=216 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1270, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(672)=219 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {672, 6501},
|
|
/*h(3268)=220 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3268, 6502},
|
|
/*h(2270)=221 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2270, 6498},
|
|
/*h(1272)=222 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1272, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(674)=225 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {674, 6501},
|
|
/*h(3270)=226 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3270, 6502},
|
|
/*h(2272)=227 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2272, 6499},
|
|
/*h(1274)=228 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1274, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(676)=231 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {676, 6500},
|
|
/*h(3272)=232 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3272, 6503},
|
|
/*h(2274)=233 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2274, 6499},
|
|
/*h(1276)=234 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1276, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(678)=237 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {678, 6500},
|
|
/*h(3274)=238 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3274, 6503},
|
|
/*h(2276)=239 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2276, 6498},
|
|
/*h(1278)=240 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1278, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(680)=243 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {680, 6501},
|
|
/*h(3276)=244 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3276, 6502},
|
|
/*h(2278)=245 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2278, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(682)=249 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {682, 6501},
|
|
/*h(3278)=250 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3278, 6502},
|
|
/*h(2280)=251 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2280, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(684)=255 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {684, 6500},
|
|
/*h(3280)=256 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3280, 6503},
|
|
/*h(2282)=257 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2282, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(686)=261 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {686, 6500},
|
|
/*h(3282)=262 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3282, 6503},
|
|
/*h(2284)=263 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2284, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(688)=267 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {688, 6501},
|
|
/*h(3284)=268 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3284, 6502},
|
|
/*h(2286)=269 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2286, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(690)=273 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {690, 6501},
|
|
/*h(3286)=274 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3286, 6502},
|
|
/*h(2288)=275 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2288, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2688)=277 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2688, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(692)=279 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {692, 6500},
|
|
/*h(3288)=280 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3288, 6503},
|
|
/*h(2290)=281 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2290, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2690)=283 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2690, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(694)=285 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {694, 6500},
|
|
/*h(3290)=286 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3290, 6503},
|
|
/*h(2292)=287 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2292, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2692)=289 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2692, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(696)=291 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {696, 6501},
|
|
/*h(3292)=292 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3292, 6502},
|
|
/*h(2294)=293 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2294, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2694)=295 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2694, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(698)=297 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {698, 6501},
|
|
/*h(3294)=298 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3294, 6502},
|
|
/*h(2296)=299 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2296, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2696)=301 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2696, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(700)=303 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {700, 6500},
|
|
/*h(3296)=304 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3296, 6503},
|
|
/*h(2298)=305 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2298, 6499},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2698)=307 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2698, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(702)=309 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {702, 6500},
|
|
/*h(3298)=310 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3298, 6503},
|
|
/*h(2300)=311 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2300, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2700)=313 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2700, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(704)=315 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {704, 6501},
|
|
/*h(3300)=316 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3300, 6502},
|
|
/*h(2302)=317 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2302, 6498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2702)=319 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2702, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(706)=321 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {706, 6501},
|
|
/*h(3302)=322 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3302, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2704)=325 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2704, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(708)=327 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {708, 6500},
|
|
/*h(3304)=328 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3304, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2706)=331 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2706, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(710)=333 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {710, 6500},
|
|
/*h(3306)=334 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3306, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2708)=337 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2708, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(712)=339 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {712, 6501},
|
|
/*h(3308)=340 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3308, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2710)=343 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2710, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(714)=345 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {714, 6501},
|
|
/*h(3310)=346 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3310, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2712)=349 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2712, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(716)=351 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {716, 6500},
|
|
/*h(3312)=352 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3312, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2714)=355 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2714, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(718)=357 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {718, 6500},
|
|
/*h(3314)=358 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3314, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2716)=361 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2716, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(720)=363 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {720, 6501},
|
|
/*h(3316)=364 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3316, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2718)=367 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2718, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(722)=369 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {722, 6501},
|
|
/*h(3318)=370 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3318, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2720)=373 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2720, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(724)=375 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {724, 6500},
|
|
/*h(3320)=376 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3320, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2722)=379 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2722, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(726)=381 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {726, 6500},
|
|
/*h(3322)=382 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {3322, 6503},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(128)=384 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {128, 6499},
|
|
/*h(2724)=385 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2724, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=387 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {728, 6501},
|
|
/*h(3324)=388 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3324, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(130)=390 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {130, 6499},
|
|
/*h(2726)=391 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2726, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=393 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {730, 6501},
|
|
/*h(3326)=394 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {3326, 6502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(132)=396 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {132, 6498},
|
|
/*h(2728)=397 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2728, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(732)=399 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {732, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(134)=402 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {134, 6498},
|
|
/*h(2730)=403 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2730, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(734)=405 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {734, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(136)=408 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {136, 6499},
|
|
/*h(2732)=409 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2732, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(736)=411 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {736, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(138)=414 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {138, 6499},
|
|
/*h(2734)=415 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2734, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(738)=417 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {738, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(140)=420 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {140, 6498},
|
|
/*h(2736)=421 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2736, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(740)=423 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {740, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(142)=426 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {142, 6498},
|
|
/*h(2738)=427 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2738, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(742)=429 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {742, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(144)=432 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {144, 6499},
|
|
/*h(2740)=433 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2740, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(744)=435 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {744, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(146)=438 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {146, 6499},
|
|
/*h(2742)=439 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2742, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(746)=441 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {746, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(148)=444 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {148, 6498},
|
|
/*h(2744)=445 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2744, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(748)=447 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {748, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(150)=450 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {150, 6498},
|
|
/*h(2746)=451 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2746, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(750)=453 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {750, 6500},
|
|
/*h(950)=454 EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 MASK=0*/ {950, 6005},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(152)=456 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {152, 6499},
|
|
/*h(2748)=457 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2748, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(752)=459 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {752, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1152)=461 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1152, 6503},
|
|
/*h(154)=462 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {154, 6499},
|
|
/*h(2750)=463 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2750, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(754)=465 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {754, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1154)=467 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1154, 6503},
|
|
/*h(156)=468 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {156, 6498},
|
|
/*h(2752)=469 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2752, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(756)=471 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {756, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1156)=473 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1156, 6502},
|
|
/*h(158)=474 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {158, 6498},
|
|
/*h(2754)=475 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2754, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(758)=477 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {758, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1158)=479 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1158, 6502},
|
|
/*h(160)=480 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {160, 6499},
|
|
/*h(2756)=481 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2756, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(760)=483 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {760, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1160)=485 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1160, 6503},
|
|
/*h(162)=486 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {162, 6499},
|
|
/*h(2758)=487 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2758, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(762)=489 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {762, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1162)=491 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1162, 6503},
|
|
/*h(164)=492 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {164, 6498},
|
|
/*h(2760)=493 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2760, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(764)=495 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {764, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1164)=497 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1164, 6502},
|
|
/*h(166)=498 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {166, 6498},
|
|
/*h(2762)=499 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2762, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(766)=501 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {766, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1166)=503 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1166, 6502},
|
|
/*h(168)=504 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {168, 6499},
|
|
/*h(2764)=505 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2764, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1168)=509 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1168, 6503},
|
|
/*h(170)=510 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {170, 6499},
|
|
/*h(2766)=511 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2766, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1170)=515 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1170, 6503},
|
|
/*h(172)=516 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {172, 6498},
|
|
/*h(2768)=517 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2768, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1172)=521 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1172, 6502},
|
|
/*h(174)=522 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {174, 6498},
|
|
/*h(2770)=523 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2770, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1174)=527 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1174, 6502},
|
|
/*h(176)=528 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {176, 6499},
|
|
/*h(2772)=529 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2772, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1176)=533 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1176, 6503},
|
|
/*h(178)=534 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {178, 6499},
|
|
/*h(2774)=535 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2774, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2176)=538 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2176, 6499},
|
|
/*h(1178)=539 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1178, 6503},
|
|
/*h(180)=540 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {180, 6498},
|
|
/*h(2776)=541 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2776, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2178)=544 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2178, 6499},
|
|
/*h(1180)=545 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1180, 6502},
|
|
/*h(182)=546 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {182, 6498},
|
|
/*h(2778)=547 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2778, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2180)=550 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2180, 6498},
|
|
/*h(1182)=551 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1182, 6502},
|
|
/*h(184)=552 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {184, 6499},
|
|
/*h(2780)=553 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2780, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2182)=556 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2182, 6498},
|
|
/*h(1184)=557 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1184, 6503},
|
|
/*h(186)=558 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {186, 6499},
|
|
/*h(2782)=559 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2782, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2184)=562 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2184, 6499},
|
|
/*h(1186)=563 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1186, 6503},
|
|
/*h(188)=564 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {188, 6498},
|
|
/*h(2784)=565 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2784, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2186)=568 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2186, 6499},
|
|
/*h(1188)=569 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1188, 6502},
|
|
/*h(190)=570 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {190, 6498},
|
|
/*h(2786)=571 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2786, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2188)=574 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2188, 6498},
|
|
/*h(1190)=575 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1190, 6502},
|
|
/*h(192)=576 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {192, 6499},
|
|
/*h(2788)=577 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2788, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2190)=580 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2190, 6498},
|
|
/*h(1192)=581 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1192, 6503},
|
|
/*h(194)=582 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {194, 6499},
|
|
/*h(2790)=583 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {2790, 6500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2192)=586 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2192, 6499},
|
|
/*h(1194)=587 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {1194, 6503},
|
|
/*h(196)=588 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {196, 6498},
|
|
/*h(2792)=589 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2792, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2194)=592 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2194, 6499},
|
|
/*h(1196)=593 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {1196, 6502},
|
|
/*h(198)=594 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {198, 6498},
|
|
/*h(2794)=595 EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {2794, 6501},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2196)=598 EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {2196, 6498}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 599);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5369},
|
|
/*h(76)=1 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5375},
|
|
/*h(8)=2 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5371},
|
|
/*h(12)=3 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5377},
|
|
/*h(41)=4 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5373},
|
|
/*h(45)=5 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5379},
|
|
/*h(74)=6 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5368},
|
|
/*h(78)=7 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5374},
|
|
/*h(10)=8 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5370},
|
|
/*h(14)=9 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5376},
|
|
/*h(40)=10 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5373},
|
|
/*h(44)=11 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5379},
|
|
/*h(73)=12 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5369},
|
|
/*h(77)=13 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5375},
|
|
/*h(9)=14 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5371},
|
|
/*h(13)=15 EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5377},
|
|
/*h(42)=16 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5372},
|
|
/*h(46)=17 EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5378}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6458},
|
|
/*h(4)=1 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6457},
|
|
/*h(38)=2 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6460},
|
|
/*h(20)=3 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6459},
|
|
/*h(6)=4 EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6456},
|
|
/*h(36)=5 EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6461}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5333},
|
|
/*h(76)=1 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5339},
|
|
/*h(8)=2 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5335},
|
|
/*h(12)=3 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5341},
|
|
/*h(41)=4 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5337},
|
|
/*h(45)=5 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5343},
|
|
/*h(74)=6 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5332},
|
|
/*h(78)=7 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5338},
|
|
/*h(10)=8 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5334},
|
|
/*h(14)=9 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5340},
|
|
/*h(40)=10 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5337},
|
|
/*h(44)=11 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5343},
|
|
/*h(73)=12 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5333},
|
|
/*h(77)=13 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5339},
|
|
/*h(9)=14 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5335},
|
|
/*h(13)=15 EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5341},
|
|
/*h(42)=16 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5336},
|
|
/*h(46)=17 EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6476},
|
|
/*h(4)=1 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6475},
|
|
/*h(38)=2 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6478},
|
|
/*h(20)=3 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6477},
|
|
/*h(6)=4 EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6474},
|
|
/*h(36)=5 EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6479}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x3f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5345},
|
|
/*h(76)=1 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5351},
|
|
/*h(8)=2 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5347},
|
|
/*h(12)=3 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5353},
|
|
/*h(41)=4 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5349},
|
|
/*h(45)=5 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5355},
|
|
/*h(74)=6 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5344},
|
|
/*h(78)=7 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5350},
|
|
/*h(10)=8 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5346},
|
|
/*h(14)=9 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5352},
|
|
/*h(40)=10 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5349},
|
|
/*h(44)=11 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5355},
|
|
/*h(73)=12 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5345},
|
|
/*h(77)=13 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5351},
|
|
/*h(9)=14 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5347},
|
|
/*h(13)=15 EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5353},
|
|
/*h(42)=16 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5348},
|
|
/*h(46)=17 EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5354}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x40_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5537},
|
|
/*h(76)=1 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6581},
|
|
/*h(8)=2 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5539},
|
|
/*h(12)=3 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6577},
|
|
/*h(41)=4 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5541},
|
|
/*h(45)=5 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6579},
|
|
/*h(74)=6 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5536},
|
|
/*h(78)=7 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6580},
|
|
/*h(10)=8 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5538},
|
|
/*h(14)=9 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6576},
|
|
/*h(40)=10 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5541},
|
|
/*h(44)=11 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6579},
|
|
/*h(73)=12 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5537},
|
|
/*h(77)=13 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6581},
|
|
/*h(9)=14 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5539},
|
|
/*h(13)=15 EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6577},
|
|
/*h(42)=16 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5540},
|
|
/*h(46)=17 EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6578}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x42_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[47] = {
|
|
/*h(89)=0 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 4808},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=2 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4804},
|
|
/*h(348)=3 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 4803},
|
|
/*h(94)=4 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4800},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(607)=6 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 4798},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=10 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 4810},
|
|
/*h(91)=11 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 4805},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=13 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4799},
|
|
/*h(350)=14 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4802},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(863)=17 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 4798},
|
|
/*h(88)=18 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 4808},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=20 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4806},
|
|
/*h(347)=21 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 4805},
|
|
/*h(93)=22 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 4801},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=24 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4797},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=28 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 4810},
|
|
/*h(90)=29 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4807},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=31 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 4805},
|
|
/*h(349)=32 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 4803},
|
|
/*h(95)=33 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 4798},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=38 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4806},
|
|
/*h(346)=39 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4809},
|
|
/*h(92)=40 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 4801},
|
|
/*h(859)=41 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 4805},
|
|
/*h(605)=42 EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4799},
|
|
/*h(351)=43 EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 4798},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 47ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x43_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4814},
|
|
/*h(15)=2 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {15, 4812},
|
|
/*h(12)=3 EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4813},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4811},
|
|
/*h(11)=6 EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {11, 4815},
|
|
/*h(8)=7 EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4816}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x44_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(601)=0 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 6019},
|
|
/*h(88)=1 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 6021},
|
|
/*h(94)=2 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6026},
|
|
/*h(349)=3 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 6029},
|
|
/*h(604)=4 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 6025},
|
|
/*h(90)=5 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6020},
|
|
/*h(345)=6 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 6023},
|
|
/*h(600)=7 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 6019},
|
|
/*h(606)=8 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6024},
|
|
/*h(93)=9 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 6027},
|
|
/*h(348)=10 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 6029},
|
|
/*h(602)=11 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6018},
|
|
/*h(89)=12 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 6021},
|
|
/*h(344)=13 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 6023},
|
|
/*h(350)=14 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6028},
|
|
/*h(605)=15 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 6025},
|
|
/*h(92)=16 EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 6027},
|
|
/*h(346)=17 EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6022}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((11*key % 83) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x45_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5723},
|
|
/*h(76)=1 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5729},
|
|
/*h(8)=2 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5725},
|
|
/*h(12)=3 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5731},
|
|
/*h(41)=4 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5727},
|
|
/*h(45)=5 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5733},
|
|
/*h(74)=6 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5722},
|
|
/*h(78)=7 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5728},
|
|
/*h(10)=8 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5724},
|
|
/*h(14)=9 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5730},
|
|
/*h(40)=10 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5727},
|
|
/*h(44)=11 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5733},
|
|
/*h(73)=12 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5723},
|
|
/*h(77)=13 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5729},
|
|
/*h(9)=14 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5725},
|
|
/*h(13)=15 EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5731},
|
|
/*h(42)=16 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5726},
|
|
/*h(46)=17 EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5732}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x46_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5687},
|
|
/*h(76)=1 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5693},
|
|
/*h(8)=2 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5689},
|
|
/*h(12)=3 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5695},
|
|
/*h(41)=4 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5691},
|
|
/*h(45)=5 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5697},
|
|
/*h(74)=6 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5686},
|
|
/*h(78)=7 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5692},
|
|
/*h(10)=8 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5688},
|
|
/*h(14)=9 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5694},
|
|
/*h(40)=10 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5691},
|
|
/*h(44)=11 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5697},
|
|
/*h(73)=12 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5687},
|
|
/*h(77)=13 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5693},
|
|
/*h(9)=14 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5689},
|
|
/*h(13)=15 EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5695},
|
|
/*h(42)=16 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5690},
|
|
/*h(46)=17 EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5696}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x47_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5651},
|
|
/*h(76)=1 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5657},
|
|
/*h(8)=2 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5653},
|
|
/*h(12)=3 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5659},
|
|
/*h(41)=4 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5655},
|
|
/*h(45)=5 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5661},
|
|
/*h(74)=6 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5650},
|
|
/*h(78)=7 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5656},
|
|
/*h(10)=8 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5652},
|
|
/*h(14)=9 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5658},
|
|
/*h(40)=10 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5655},
|
|
/*h(44)=11 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5661},
|
|
/*h(73)=12 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5651},
|
|
/*h(77)=13 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5657},
|
|
/*h(9)=14 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5653},
|
|
/*h(13)=15 EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5659},
|
|
/*h(42)=16 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5654},
|
|
/*h(46)=17 EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5660}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(601)=0 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 5825},
|
|
/*h(88)=1 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 5827},
|
|
/*h(94)=2 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5820},
|
|
/*h(349)=3 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 5823},
|
|
/*h(604)=4 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 5819},
|
|
/*h(90)=5 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5826},
|
|
/*h(345)=6 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 5829},
|
|
/*h(600)=7 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 5825},
|
|
/*h(606)=8 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5818},
|
|
/*h(93)=9 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 5821},
|
|
/*h(348)=10 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 5823},
|
|
/*h(602)=11 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5824},
|
|
/*h(89)=12 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 5827},
|
|
/*h(344)=13 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 5829},
|
|
/*h(350)=14 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5822},
|
|
/*h(605)=15 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 5819},
|
|
/*h(92)=16 EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 5821},
|
|
/*h(346)=17 EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5828}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((11*key % 83) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(10)=0 EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 5832},
|
|
/*h(12)=1 EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5831},
|
|
/*h(14)=2 EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 5830},
|
|
/*h(8)=3 EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5833}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(601)=0 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 5861},
|
|
/*h(88)=1 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 5863},
|
|
/*h(94)=2 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5856},
|
|
/*h(349)=3 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 5859},
|
|
/*h(604)=4 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 5855},
|
|
/*h(90)=5 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5862},
|
|
/*h(345)=6 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 5865},
|
|
/*h(600)=7 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 5861},
|
|
/*h(606)=8 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5854},
|
|
/*h(93)=9 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 5857},
|
|
/*h(348)=10 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 5859},
|
|
/*h(602)=11 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5860},
|
|
/*h(89)=12 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 5863},
|
|
/*h(344)=13 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 5865},
|
|
/*h(350)=14 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5858},
|
|
/*h(605)=15 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 5855},
|
|
/*h(92)=16 EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 5857},
|
|
/*h(346)=17 EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5864}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((11*key % 83) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x4f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(10)=0 EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 5868},
|
|
/*h(12)=1 EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5867},
|
|
/*h(14)=2 EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 5866},
|
|
/*h(8)=3 EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5869}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x50_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 3974},
|
|
/*h(10)=3 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 3969},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 3972},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 3974},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 3970},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 3972},
|
|
/*h(74)=13 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 3973},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x50 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 3970},
|
|
/*h(42)=17 EVV 0x50 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 3971}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x51_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 3980},
|
|
/*h(10)=3 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 3975},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 3978},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 3980},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 3976},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 3978},
|
|
/*h(74)=13 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 3979},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x51 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 3976},
|
|
/*h(42)=17 EVV 0x51 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 3977}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x52_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[29] = {
|
|
/*h(58)=0 EVV 0x52 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {58, 4007},
|
|
/*h(10)=1 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 3981},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=3 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 4010},
|
|
/*h(40)=4 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 3984},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=6 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 4010},
|
|
/*h(41)=7 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 3984},
|
|
/*h(80)=8 EVV 0x52 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 VL512 W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4061},
|
|
/*h(90)=9 EVV 0x52 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {90, 4009},
|
|
/*h(42)=10 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 3983},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=13 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 3986},
|
|
/*h(24)=14 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {24, 4006},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=16 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 3986},
|
|
/*h(25)=17 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {25, 4006},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=19 EVV 0x52 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 3985},
|
|
/*h(26)=20 EVV 0x52 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {26, 4005},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=23 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {56, 4008},
|
|
/*h(8)=24 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 3982},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(57)=26 EVV 0x52 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {57, 4008},
|
|
/*h(9)=27 EVV 0x52 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 3982},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 29);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x53_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 3992},
|
|
/*h(10)=3 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 3987},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 3990},
|
|
/*h(80)=7 EVV 0x53 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 VL512 W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4062},
|
|
/*h(72)=8 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 3992},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 3988},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 3990},
|
|
/*h(74)=13 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 3991},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x53 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 3988},
|
|
/*h(42)=17 EVV 0x53 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 3989}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x54_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(348)=0 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6859},
|
|
/*h(346)=1 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6852},
|
|
/*h(344)=2 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {344, 6853},
|
|
/*h(94)=3 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6856},
|
|
/*h(92)=4 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6857},
|
|
/*h(90)=5 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6850},
|
|
/*h(88)=6 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {88, 6851},
|
|
/*h(606)=7 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6860},
|
|
/*h(604)=8 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6861},
|
|
/*h(602)=9 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6854},
|
|
/*h(600)=10 EVV 0x54 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {600, 6855},
|
|
/*h(350)=11 EVV 0x54 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6858}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((15*key % 31) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x55_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(601)=0 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4064},
|
|
/*h(88)=1 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 4066},
|
|
/*h(94)=2 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4071},
|
|
/*h(349)=3 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 4074},
|
|
/*h(604)=4 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4070},
|
|
/*h(90)=5 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4065},
|
|
/*h(345)=6 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 4068},
|
|
/*h(600)=7 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4064},
|
|
/*h(606)=8 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4069},
|
|
/*h(93)=9 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 4072},
|
|
/*h(348)=10 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 4074},
|
|
/*h(602)=11 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4063},
|
|
/*h(89)=12 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 4066},
|
|
/*h(344)=13 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 4068},
|
|
/*h(350)=14 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4073},
|
|
/*h(605)=15 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4070},
|
|
/*h(92)=16 EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 4072},
|
|
/*h(346)=17 EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4067}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((11*key % 83) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x58_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5132},
|
|
/*h(600)=1 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {600, 5131},
|
|
/*h(346)=2 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5140},
|
|
/*h(344)=3 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {344, 5139},
|
|
/*h(90)=4 EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5136},
|
|
/*h(88)=5 EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE1()*/ {88, 5135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x59_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(348)=0 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE1()*/ {348, 5149},
|
|
/*h(346)=1 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6063},
|
|
/*h(344)=2 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE2()*/ {344, 6064},
|
|
/*h(94)=3 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5147},
|
|
/*h(92)=4 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE1()*/ {92, 5146},
|
|
/*h(90)=5 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6061},
|
|
/*h(88)=6 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE2()*/ {88, 6062},
|
|
/*h(606)=7 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5144},
|
|
/*h(604)=8 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE1()*/ {604, 5143},
|
|
/*h(602)=9 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6065},
|
|
/*h(600)=10 EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE2()*/ {600, 6066},
|
|
/*h(350)=11 EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5150}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((15*key % 31) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x5a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(348)=0 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 6068},
|
|
/*h(604)=1 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 6069},
|
|
/*h(344)=2 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 4123},
|
|
/*h(600)=3 EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 4122}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x5b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(604)=0 EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4124},
|
|
/*h(600)=1 EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 6067}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x62_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(348)=0 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_16_BITS() NELEM_GSCAT()*/ {348, 6888},
|
|
/*h(346)=1 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6883},
|
|
/*h(344)=2 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_8_BITS() NELEM_GSCAT()*/ {344, 6882},
|
|
/*h(94)=3 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6887},
|
|
/*h(92)=4 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_16_BITS() NELEM_GSCAT()*/ {92, 6886},
|
|
/*h(90)=5 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6881},
|
|
/*h(88)=6 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_8_BITS() NELEM_GSCAT()*/ {88, 6880},
|
|
/*h(606)=7 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6891},
|
|
/*h(604)=8 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_16_BITS() NELEM_GSCAT()*/ {604, 6890},
|
|
/*h(602)=9 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6885},
|
|
/*h(600)=10 EVV 0x62 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_8_BITS() NELEM_GSCAT()*/ {600, 6884},
|
|
/*h(350)=11 EVV 0x62 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6889}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((15*key % 31) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x63_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[31] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=2 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_GSCAT()*/ {600, 6872},
|
|
/*h(94)=3 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6875},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=6 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1118, 6875},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=8 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6873},
|
|
/*h(344)=9 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_GSCAT()*/ {344, 6870},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=11 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 6873},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=14 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_GSCAT()*/ {604, 6878},
|
|
/*h(346)=15 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6871},
|
|
/*h(88)=16 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_GSCAT()*/ {88, 6868},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=18 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 6871},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=20 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6879},
|
|
/*h(348)=21 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_GSCAT()*/ {348, 6876},
|
|
/*h(90)=22 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6869},
|
|
/*h(1630)=23 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1630, 6879},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=25 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 6869},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=27 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6877},
|
|
/*h(92)=28 EVV 0x63 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_GSCAT()*/ {92, 6874},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=30 EVV 0x63 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1374, 6877}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 31);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x64_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5120},
|
|
/*h(76)=1 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5126},
|
|
/*h(8)=2 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5122},
|
|
/*h(12)=3 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5128},
|
|
/*h(41)=4 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5124},
|
|
/*h(45)=5 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5130},
|
|
/*h(74)=6 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5119},
|
|
/*h(78)=7 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5125},
|
|
/*h(10)=8 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5121},
|
|
/*h(14)=9 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5127},
|
|
/*h(40)=10 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5124},
|
|
/*h(44)=11 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5130},
|
|
/*h(73)=12 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5120},
|
|
/*h(77)=13 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5126},
|
|
/*h(9)=14 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5122},
|
|
/*h(13)=15 EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5128},
|
|
/*h(42)=16 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5123},
|
|
/*h(46)=17 EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5129}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x65_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4114},
|
|
/*h(76)=1 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4108},
|
|
/*h(8)=2 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4116},
|
|
/*h(12)=3 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4110},
|
|
/*h(41)=4 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4118},
|
|
/*h(45)=5 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4112},
|
|
/*h(74)=6 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4113},
|
|
/*h(78)=7 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4107},
|
|
/*h(10)=8 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4115},
|
|
/*h(14)=9 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4109},
|
|
/*h(40)=10 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4118},
|
|
/*h(44)=11 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4112},
|
|
/*h(73)=12 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4114},
|
|
/*h(77)=13 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4108},
|
|
/*h(9)=14 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4116},
|
|
/*h(13)=15 EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4110},
|
|
/*h(42)=16 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4117},
|
|
/*h(46)=17 EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4111}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x66_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6334},
|
|
/*h(72)=1 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6331},
|
|
/*h(42)=2 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6328},
|
|
/*h(78)=3 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6336},
|
|
/*h(12)=4 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6333},
|
|
/*h(74)=5 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6330},
|
|
/*h(8)=6 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6327},
|
|
/*h(44)=7 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6335},
|
|
/*h(14)=8 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6332},
|
|
/*h(40)=9 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6329},
|
|
/*h(76)=10 EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6337},
|
|
/*h(10)=11 EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x68_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[36] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(99)=1 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {99, 7015},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(38)=3 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {38, 7012},
|
|
/*h(174)=4 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 MASK=0*/ {174, 7022},
|
|
/*h(162)=5 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {162, 7017},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(163)=8 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {163, 7017},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(102)=10 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 MASK=0*/ {102, 7014},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=15 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {42, 7019},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(166)=17 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 MASK=0*/ {166, 7016},
|
|
/*h(43)=18 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {43, 7019},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(106)=22 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {106, 7021},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(107)=25 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {107, 7021},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=27 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 MASK=0*/ {46, 7018},
|
|
/*h(34)=28 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {34, 7013},
|
|
/*h(170)=29 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {170, 7023},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(35)=31 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {35, 7013},
|
|
/*h(171)=32 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULL()*/ {171, 7023},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(110)=34 EVV 0x68 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 MASK=0*/ {110, 7020},
|
|
/*h(98)=35 EVV 0x68 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULL()*/ {98, 7015}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 37) % 36);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x70_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(14)=0 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6916},
|
|
/*h(46)=1 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6918},
|
|
/*h(78)=2 EVV 0x70 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6920},
|
|
/*h(12)=3 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6917},
|
|
/*h(44)=4 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6919},
|
|
/*h(76)=5 EVV 0x70 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6921}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x71_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 6909},
|
|
/*h(76)=1 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6915},
|
|
/*h(8)=2 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 6905},
|
|
/*h(12)=3 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6911},
|
|
/*h(41)=4 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 6907},
|
|
/*h(45)=5 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6913},
|
|
/*h(74)=6 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6908},
|
|
/*h(78)=7 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6914},
|
|
/*h(10)=8 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6904},
|
|
/*h(14)=9 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6910},
|
|
/*h(40)=10 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 6907},
|
|
/*h(44)=11 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6913},
|
|
/*h(73)=12 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 6909},
|
|
/*h(77)=13 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6915},
|
|
/*h(9)=14 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 6905},
|
|
/*h(13)=15 EVV 0x71 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6911},
|
|
/*h(42)=16 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6906},
|
|
/*h(46)=17 EVV 0x71 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6912}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x72_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[258] = {
|
|
/*h(426)=0 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {426, 3995},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(128)=2 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {128, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(682)=4 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {682, 3997},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(384)=6 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {384, 3996},
|
|
/*h(108)=7 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {108, 6953},
|
|
/*h(129)=8 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {129, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(640)=10 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {640, 3998},
|
|
/*h(364)=11 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {364, 6955},
|
|
/*h(385)=12 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {385, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(130)=14 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {130, 3993},
|
|
/*h(620)=15 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {620, 6957},
|
|
/*h(641)=16 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {641, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(386)=18 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {386, 3995},
|
|
/*h(110)=19 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {110, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(642)=22 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {642, 3997},
|
|
/*h(366)=23 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {366, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(68)=25 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {68, 6953},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(622)=27 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {622, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(324)=29 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {324, 6955},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(176)=32 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {176, 3994},
|
|
/*h(580)=33 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {580, 6957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(432)=36 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {432, 3996},
|
|
/*h(70)=37 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {70, 6952},
|
|
/*h(177)=38 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {177, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(688)=40 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {688, 3998},
|
|
/*h(326)=41 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {326, 6954},
|
|
/*h(433)=42 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {433, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(178)=44 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {178, 3993},
|
|
/*h(582)=45 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {582, 6956},
|
|
/*h(689)=46 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {689, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(434)=48 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {434, 3995},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(136)=50 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {136, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(690)=52 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {690, 3997},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(392)=54 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {392, 3996},
|
|
/*h(116)=55 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {116, 6953},
|
|
/*h(137)=56 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {137, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(648)=58 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {648, 3998},
|
|
/*h(372)=59 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {372, 6955},
|
|
/*h(393)=60 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {393, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(138)=62 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {138, 3993},
|
|
/*h(628)=63 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {628, 6957},
|
|
/*h(649)=64 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {649, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(394)=66 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {394, 3995},
|
|
/*h(118)=67 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {118, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(650)=70 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {650, 3997},
|
|
/*h(374)=71 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {374, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6953},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(630)=75 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {630, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(332)=77 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {332, 6955},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(184)=80 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {184, 3994},
|
|
/*h(588)=81 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {588, 6957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(440)=84 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {440, 3996},
|
|
/*h(78)=85 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {78, 6952},
|
|
/*h(185)=86 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {185, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(696)=88 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {696, 3998},
|
|
/*h(334)=89 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {334, 6954},
|
|
/*h(441)=90 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {441, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(186)=92 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {186, 3993},
|
|
/*h(590)=93 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {590, 6956},
|
|
/*h(697)=94 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {697, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(442)=96 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {442, 3995},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(144)=98 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {144, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(698)=100 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {698, 3997},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(400)=102 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {400, 3996},
|
|
/*h(124)=103 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {124, 6953},
|
|
/*h(145)=104 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {145, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(656)=106 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {656, 3998},
|
|
/*h(380)=107 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {380, 6955},
|
|
/*h(401)=108 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {401, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(146)=110 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {146, 3993},
|
|
/*h(636)=111 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {636, 6957},
|
|
/*h(657)=112 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {657, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(402)=114 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {402, 3995},
|
|
/*h(126)=115 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {126, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(658)=118 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {658, 3997},
|
|
/*h(382)=119 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {382, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(84)=121 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {84, 6953},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(638)=123 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {638, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(340)=125 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {340, 6955},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(596)=129 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {596, 6957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=133 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {86, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(342)=137 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {342, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(598)=141 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {598, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(152)=146 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {152, 3994},
|
|
/*h(216)=147 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {216, 4000},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(408)=150 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {408, 3996},
|
|
/*h(472)=151 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {472, 4002},
|
|
/*h(153)=152 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {153, 3994},
|
|
/*h(217)=153 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {217, 4000},
|
|
/*h(664)=154 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {664, 3998},
|
|
/*h(728)=155 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {728, 4004},
|
|
/*h(409)=156 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {409, 3996},
|
|
/*h(473)=157 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {473, 4002},
|
|
/*h(154)=158 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {154, 3993},
|
|
/*h(218)=159 EVV 0x72 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 3999},
|
|
/*h(665)=160 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {665, 3998},
|
|
/*h(729)=161 EVV 0x72 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {729, 4004},
|
|
/*h(410)=162 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {410, 3995},
|
|
/*h(474)=163 EVV 0x72 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4001},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(666)=166 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {666, 3997},
|
|
/*h(730)=167 EVV 0x72 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4003},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=169 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {92, 6953},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=173 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {348, 6955},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=177 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {604, 6957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=181 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {94, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=185 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {350, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=189 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {606, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(160)=194 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {160, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(416)=198 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {416, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(161)=200 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {161, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(672)=202 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {672, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(417)=204 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {417, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(162)=206 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {162, 3993},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(673)=208 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {673, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(418)=210 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {418, 3995},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(674)=214 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {674, 3997},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(100)=217 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {100, 6953},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=221 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {356, 6955},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(612)=225 EVV 0x72 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {612, 6957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(102)=229 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {102, 6952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=233 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {358, 6954},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(614)=237 EVV 0x72 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {614, 6956},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(168)=242 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {168, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(424)=246 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {424, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(169)=248 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {169, 3994},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(680)=250 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {680, 3998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(425)=252 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {425, 3996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(170)=254 EVV 0x72 VF2 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {170, 3993},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(681)=256 EVV 0x72 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {681, 3998},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 383) % 258);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x73_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 6945},
|
|
/*h(76)=1 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6951},
|
|
/*h(8)=2 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 6941},
|
|
/*h(12)=3 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6947},
|
|
/*h(41)=4 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 6943},
|
|
/*h(45)=5 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6949},
|
|
/*h(74)=6 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6944},
|
|
/*h(78)=7 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6950},
|
|
/*h(10)=8 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6940},
|
|
/*h(14)=9 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6946},
|
|
/*h(40)=10 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 6943},
|
|
/*h(44)=11 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6949},
|
|
/*h(73)=12 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 6945},
|
|
/*h(77)=13 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6951},
|
|
/*h(9)=14 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 6941},
|
|
/*h(13)=15 EVV 0x73 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6947},
|
|
/*h(42)=16 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6942},
|
|
/*h(46)=17 EVV 0x73 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x75_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6406},
|
|
/*h(72)=1 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6837},
|
|
/*h(42)=2 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6834},
|
|
/*h(78)=3 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6408},
|
|
/*h(12)=4 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6405},
|
|
/*h(74)=5 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6836},
|
|
/*h(8)=6 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6833},
|
|
/*h(44)=7 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6407},
|
|
/*h(14)=8 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6404},
|
|
/*h(40)=9 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6835},
|
|
/*h(76)=10 EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6409},
|
|
/*h(10)=11 EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6832}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x76_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5217},
|
|
/*h(76)=1 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5235},
|
|
/*h(8)=2 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5219},
|
|
/*h(12)=3 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5237},
|
|
/*h(41)=4 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5221},
|
|
/*h(45)=5 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5239},
|
|
/*h(74)=6 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5216},
|
|
/*h(78)=7 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5234},
|
|
/*h(10)=8 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5218},
|
|
/*h(14)=9 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5236},
|
|
/*h(40)=10 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5221},
|
|
/*h(44)=11 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5239},
|
|
/*h(73)=12 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5217},
|
|
/*h(77)=13 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5235},
|
|
/*h(9)=14 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5219},
|
|
/*h(13)=15 EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5237},
|
|
/*h(42)=16 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5220},
|
|
/*h(46)=17 EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x77_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5229},
|
|
/*h(76)=1 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5223},
|
|
/*h(8)=2 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5231},
|
|
/*h(12)=3 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5225},
|
|
/*h(41)=4 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5233},
|
|
/*h(45)=5 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5227},
|
|
/*h(74)=6 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5228},
|
|
/*h(78)=7 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5222},
|
|
/*h(10)=8 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5230},
|
|
/*h(14)=9 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5224},
|
|
/*h(40)=10 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5233},
|
|
/*h(44)=11 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5227},
|
|
/*h(73)=12 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5229},
|
|
/*h(77)=13 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5223},
|
|
/*h(9)=14 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5231},
|
|
/*h(13)=15 EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5225},
|
|
/*h(42)=16 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5232},
|
|
/*h(46)=17 EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x78_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6344},
|
|
/*h(600)=1 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {600, 6345},
|
|
/*h(346)=2 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6341},
|
|
/*h(344)=3 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {344, 6342},
|
|
/*h(90)=4 EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6338},
|
|
/*h(88)=5 EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_8_BITS() NELEM_TUPLE1_BYTE()*/ {88, 6339}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x79_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6353},
|
|
/*h(600)=1 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {600, 6354},
|
|
/*h(346)=2 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6350},
|
|
/*h(344)=3 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {344, 6351},
|
|
/*h(90)=4 EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6347},
|
|
/*h(88)=5 EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_TUPLE1_WORD()*/ {88, 6348}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(602)=0 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6346},
|
|
/*h(90)=1 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6340},
|
|
/*h(346)=2 EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6343}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(602)=0 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6355},
|
|
/*h(90)=1 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6349},
|
|
/*h(346)=2 EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6352}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[36] = {
|
|
/*h(1398)=0 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 not64 NOEVSR*/ {1398, 5141},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1382)=4 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 not64 NOEVSR*/ {1382, 5141},
|
|
/*h(374)=5 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR*/ {374, 5137},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=9 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR*/ {358, 5137},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2426)=12 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 mode64 W1 NOEVSR*/ {2426, 5145},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2418)=14 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 not64 NOEVSR*/ {2418, 5133},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2410)=16 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 mode64 W0 NOEVSR*/ {2410, 5134},
|
|
/*h(1402)=17 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 mode64 NOEVSR*/ {1402, 5151},
|
|
/*h(2402)=18 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 not64 NOEVSR*/ {2402, 5133},
|
|
/*h(1394)=19 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 not64 NOEVSR*/ {1394, 5141},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1386)=21 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 mode64 W0 NOEVSR*/ {1386, 5142},
|
|
/*h(378)=22 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR*/ {378, 5148},
|
|
/*h(1378)=23 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 not64 NOEVSR*/ {1378, 5141},
|
|
/*h(370)=24 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR*/ {370, 5137},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(362)=26 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 mode64 W0 NOEVSR*/ {362, 5138},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(354)=28 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR*/ {354, 5137},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2422)=31 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 not64 NOEVSR*/ {2422, 5133},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2406)=35 EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 not64 NOEVSR*/ {2406, 5133}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 36ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6412},
|
|
/*h(72)=1 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6843},
|
|
/*h(42)=2 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6840},
|
|
/*h(78)=3 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6414},
|
|
/*h(12)=4 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6411},
|
|
/*h(74)=5 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6842},
|
|
/*h(8)=6 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6839},
|
|
/*h(44)=7 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6413},
|
|
/*h(14)=8 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6410},
|
|
/*h(40)=9 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6841},
|
|
/*h(76)=10 EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6415},
|
|
/*h(10)=11 EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6838}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5285},
|
|
/*h(76)=1 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5303},
|
|
/*h(8)=2 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5287},
|
|
/*h(12)=3 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5305},
|
|
/*h(41)=4 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5289},
|
|
/*h(45)=5 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5307},
|
|
/*h(74)=6 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5284},
|
|
/*h(78)=7 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5302},
|
|
/*h(10)=8 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5286},
|
|
/*h(14)=9 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5304},
|
|
/*h(40)=10 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5289},
|
|
/*h(44)=11 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5307},
|
|
/*h(73)=12 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5285},
|
|
/*h(77)=13 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5303},
|
|
/*h(9)=14 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5287},
|
|
/*h(13)=15 EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5305},
|
|
/*h(42)=16 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5288},
|
|
/*h(46)=17 EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5306}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x7f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5297},
|
|
/*h(76)=1 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5291},
|
|
/*h(8)=2 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5299},
|
|
/*h(12)=3 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5293},
|
|
/*h(41)=4 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5301},
|
|
/*h(45)=5 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5295},
|
|
/*h(74)=6 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5296},
|
|
/*h(78)=7 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5290},
|
|
/*h(10)=8 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5298},
|
|
/*h(14)=9 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5292},
|
|
/*h(40)=10 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5301},
|
|
/*h(44)=11 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5295},
|
|
/*h(73)=12 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5297},
|
|
/*h(77)=13 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5291},
|
|
/*h(9)=14 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5299},
|
|
/*h(13)=15 EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5293},
|
|
/*h(42)=16 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5300},
|
|
/*h(46)=17 EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x83_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6849},
|
|
/*h(46)=1 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6846},
|
|
/*h(12)=2 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6845},
|
|
/*h(77)=3 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6849},
|
|
/*h(13)=4 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6845},
|
|
/*h(78)=5 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6848},
|
|
/*h(44)=6 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6847},
|
|
/*h(14)=7 EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6844},
|
|
/*h(45)=8 EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6847}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x88_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(348)=0 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 4419},
|
|
/*h(346)=1 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4426},
|
|
/*h(344)=2 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 4425},
|
|
/*h(94)=3 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4418},
|
|
/*h(92)=4 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 4417},
|
|
/*h(90)=5 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4424},
|
|
/*h(88)=6 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 4423},
|
|
/*h(606)=7 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4416},
|
|
/*h(604)=8 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 4415},
|
|
/*h(602)=9 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4422},
|
|
/*h(600)=10 EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 4421},
|
|
/*h(350)=11 EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4420}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((15*key % 31) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x89_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(348)=0 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 5318},
|
|
/*h(346)=1 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5313},
|
|
/*h(344)=2 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 5312},
|
|
/*h(94)=3 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5317},
|
|
/*h(92)=4 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 5316},
|
|
/*h(90)=5 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5311},
|
|
/*h(88)=6 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 5310},
|
|
/*h(606)=7 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5315},
|
|
/*h(604)=8 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 5314},
|
|
/*h(602)=9 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5309},
|
|
/*h(600)=10 EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 5308},
|
|
/*h(350)=11 EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5319}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((15*key % 31) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[31] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=2 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 4167},
|
|
/*h(94)=3 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4164},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=6 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1118, 4164},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=8 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4168},
|
|
/*h(344)=9 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 4171},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=11 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 4168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=14 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 4161},
|
|
/*h(346)=15 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4172},
|
|
/*h(88)=16 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 4169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=18 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 4172},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=20 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4162},
|
|
/*h(348)=21 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 4165},
|
|
/*h(90)=22 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4170},
|
|
/*h(1630)=23 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1630, 4162},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=25 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 4170},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=27 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4166},
|
|
/*h(92)=28 EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 4163},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=30 EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1374, 4166}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 31);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[31] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=2 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {600, 5200},
|
|
/*h(94)=3 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5209},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=6 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1118, 5209},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=8 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 5201},
|
|
/*h(344)=9 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {344, 5204},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=11 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 5201},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=14 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {604, 5206},
|
|
/*h(346)=15 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 5205},
|
|
/*h(88)=16 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {88, 5202},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=18 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 5205},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=20 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 5207},
|
|
/*h(348)=21 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {348, 5210},
|
|
/*h(90)=22 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 5203},
|
|
/*h(1630)=23 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1630, 5207},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1114)=25 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 5203},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=27 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 5211},
|
|
/*h(92)=28 EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {92, 5208},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=30 EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1374, 5211}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 31);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6418},
|
|
/*h(72)=1 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6831},
|
|
/*h(42)=2 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6828},
|
|
/*h(78)=3 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6420},
|
|
/*h(12)=4 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6417},
|
|
/*h(74)=5 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6830},
|
|
/*h(8)=6 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6827},
|
|
/*h(44)=7 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6419},
|
|
/*h(14)=8 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6416},
|
|
/*h(40)=9 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6829},
|
|
/*h(76)=10 EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6421},
|
|
/*h(10)=11 EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6826}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x8f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(42)=0 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {42, 6864},
|
|
/*h(8)=1 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6863},
|
|
/*h(72)=2 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6867},
|
|
/*h(10)=3 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {10, 6862},
|
|
/*h(74)=4 EVV 0x8F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {74, 6866},
|
|
/*h(40)=5 EVV 0x8F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6865}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((8*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x90_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5323},
|
|
/*h(486)=1 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5321},
|
|
/*h(1510)=2 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5322},
|
|
/*h(484)=3 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5321},
|
|
/*h(2534)=4 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5320},
|
|
/*h(1508)=5 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5322},
|
|
/*h(2532)=6 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5320},
|
|
/*h(502)=7 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5324},
|
|
/*h(1526)=8 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5325},
|
|
/*h(500)=9 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5324},
|
|
/*h(2550)=10 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5323},
|
|
/*h(1524)=11 EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x91_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5329},
|
|
/*h(486)=1 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5327},
|
|
/*h(1510)=2 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5328},
|
|
/*h(484)=3 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5327},
|
|
/*h(2534)=4 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5326},
|
|
/*h(1508)=5 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5328},
|
|
/*h(2532)=6 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5326},
|
|
/*h(502)=7 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5330},
|
|
/*h(1526)=8 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5331},
|
|
/*h(500)=9 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5330},
|
|
/*h(2550)=10 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5329},
|
|
/*h(1524)=11 EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5331}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x92_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 4785},
|
|
/*h(486)=1 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 4789},
|
|
/*h(1510)=2 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 4790},
|
|
/*h(484)=3 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 4789},
|
|
/*h(2534)=4 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 4788},
|
|
/*h(1508)=5 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 4790},
|
|
/*h(2532)=6 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 4788},
|
|
/*h(502)=7 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 4786},
|
|
/*h(1526)=8 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 4787},
|
|
/*h(500)=9 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 4786},
|
|
/*h(2550)=10 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 4785},
|
|
/*h(1524)=11 EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 4787}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x93_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 4791},
|
|
/*h(486)=1 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 4795},
|
|
/*h(1510)=2 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 4796},
|
|
/*h(484)=3 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 4795},
|
|
/*h(2534)=4 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 4794},
|
|
/*h(1508)=5 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 4796},
|
|
/*h(2532)=6 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 4794},
|
|
/*h(502)=7 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 4792},
|
|
/*h(1526)=8 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 4793},
|
|
/*h(500)=9 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 4792},
|
|
/*h(2550)=10 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 4791},
|
|
/*h(1524)=11 EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 4793}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x96_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4534},
|
|
/*h(14)=1 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4524},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4533},
|
|
/*h(15)=4 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4522},
|
|
/*h(111)=5 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4522},
|
|
/*h(43)=6 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4529},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4527},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4530},
|
|
/*h(45)=12 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4527},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4530},
|
|
/*h(46)=15 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4526},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4528},
|
|
/*h(47)=18 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4522},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4529},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4523},
|
|
/*h(8)=24 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4532},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4523},
|
|
/*h(9)=27 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4532},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4521},
|
|
/*h(10)=30 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4531},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4522},
|
|
/*h(11)=33 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4529},
|
|
/*h(107)=34 EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4529},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4525},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4534},
|
|
/*h(13)=39 EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4525},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x97_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4636},
|
|
/*h(14)=1 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4626},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4635},
|
|
/*h(15)=4 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4624},
|
|
/*h(111)=5 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4624},
|
|
/*h(43)=6 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4631},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4629},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4632},
|
|
/*h(45)=12 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4629},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4632},
|
|
/*h(46)=15 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4628},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4630},
|
|
/*h(47)=18 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4624},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4631},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4625},
|
|
/*h(8)=24 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4634},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4625},
|
|
/*h(9)=27 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4634},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4623},
|
|
/*h(10)=30 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4633},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4624},
|
|
/*h(11)=33 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4631},
|
|
/*h(107)=34 EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4631},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4627},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4636},
|
|
/*h(13)=39 EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4627},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x98_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4474},
|
|
/*h(14)=1 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4464},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4473},
|
|
/*h(15)=4 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4462},
|
|
/*h(111)=5 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4462},
|
|
/*h(43)=6 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4469},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4467},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4470},
|
|
/*h(45)=12 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4467},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4470},
|
|
/*h(46)=15 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4466},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4468},
|
|
/*h(47)=18 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4462},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4469},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4463},
|
|
/*h(8)=24 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4472},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4463},
|
|
/*h(9)=27 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4472},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4461},
|
|
/*h(10)=30 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4471},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4462},
|
|
/*h(11)=33 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4469},
|
|
/*h(107)=34 EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4469},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4465},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4474},
|
|
/*h(13)=39 EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4465},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x99_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4478},
|
|
/*h(15)=2 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4476},
|
|
/*h(12)=3 EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4477},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4475},
|
|
/*h(11)=6 EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4479},
|
|
/*h(8)=7 EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4480}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4576},
|
|
/*h(14)=1 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4566},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4575},
|
|
/*h(15)=4 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4564},
|
|
/*h(111)=5 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4564},
|
|
/*h(43)=6 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4571},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4569},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4572},
|
|
/*h(45)=12 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4569},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4572},
|
|
/*h(46)=15 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4568},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4570},
|
|
/*h(47)=18 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4564},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4571},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4565},
|
|
/*h(8)=24 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4565},
|
|
/*h(9)=27 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4574},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4563},
|
|
/*h(10)=30 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4573},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4564},
|
|
/*h(11)=33 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4571},
|
|
/*h(107)=34 EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4571},
|
|
/*h(80)=35 EVV 0x9A VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4057},
|
|
/*h(12)=36 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4567},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4576},
|
|
/*h(13)=39 EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4567},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4580},
|
|
/*h(15)=2 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4578},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=4 EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4579},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4577},
|
|
/*h(11)=7 EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4581},
|
|
/*h(16)=8 EVV 0x9B VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {16, 4058},
|
|
/*h(8)=9 EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4582}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4678},
|
|
/*h(14)=1 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4668},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4677},
|
|
/*h(15)=4 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4666},
|
|
/*h(111)=5 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4666},
|
|
/*h(43)=6 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4673},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4671},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4674},
|
|
/*h(45)=12 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4671},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4674},
|
|
/*h(46)=15 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4670},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4672},
|
|
/*h(47)=18 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4666},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4673},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4667},
|
|
/*h(8)=24 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4676},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4667},
|
|
/*h(9)=27 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4676},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4665},
|
|
/*h(10)=30 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4675},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4666},
|
|
/*h(11)=33 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4673},
|
|
/*h(107)=34 EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4673},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4669},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4678},
|
|
/*h(13)=39 EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4669},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4682},
|
|
/*h(15)=2 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4680},
|
|
/*h(12)=3 EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4681},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4679},
|
|
/*h(11)=6 EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4683},
|
|
/*h(8)=7 EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4684}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4738},
|
|
/*h(14)=1 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4728},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4737},
|
|
/*h(15)=4 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4726},
|
|
/*h(111)=5 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4726},
|
|
/*h(43)=6 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4733},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4731},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4734},
|
|
/*h(45)=12 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4731},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4734},
|
|
/*h(46)=15 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4730},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4732},
|
|
/*h(47)=18 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4726},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4733},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4727},
|
|
/*h(8)=24 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4736},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4727},
|
|
/*h(9)=27 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4736},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4725},
|
|
/*h(10)=30 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4735},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4726},
|
|
/*h(11)=33 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4733},
|
|
/*h(107)=34 EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4733},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4729},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4738},
|
|
/*h(13)=39 EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4729},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0x9f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4742},
|
|
/*h(15)=2 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4740},
|
|
/*h(12)=3 EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4741},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4739},
|
|
/*h(11)=6 EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4743},
|
|
/*h(8)=7 EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4744}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa0_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5611},
|
|
/*h(486)=1 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5609},
|
|
/*h(1510)=2 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5610},
|
|
/*h(484)=3 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5609},
|
|
/*h(2534)=4 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5608},
|
|
/*h(1508)=5 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5610},
|
|
/*h(2532)=6 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5608},
|
|
/*h(502)=7 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5612},
|
|
/*h(1526)=8 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5613},
|
|
/*h(500)=9 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5612},
|
|
/*h(2550)=10 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5611},
|
|
/*h(1524)=11 EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5613}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa1_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5617},
|
|
/*h(486)=1 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5615},
|
|
/*h(1510)=2 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5616},
|
|
/*h(484)=3 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5615},
|
|
/*h(2534)=4 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5614},
|
|
/*h(1508)=5 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5616},
|
|
/*h(2532)=6 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5614},
|
|
/*h(502)=7 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5618},
|
|
/*h(1526)=8 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5619},
|
|
/*h(500)=9 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5618},
|
|
/*h(2550)=10 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5617},
|
|
/*h(1524)=11 EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5619}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5890},
|
|
/*h(486)=1 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5894},
|
|
/*h(1510)=2 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5895},
|
|
/*h(484)=3 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5894},
|
|
/*h(2534)=4 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5893},
|
|
/*h(1508)=5 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5895},
|
|
/*h(2532)=6 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5893},
|
|
/*h(502)=7 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5891},
|
|
/*h(1526)=8 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5892},
|
|
/*h(500)=9 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5891},
|
|
/*h(2550)=10 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5890},
|
|
/*h(1524)=11 EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5892}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa3_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(2548)=0 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2548, 5896},
|
|
/*h(486)=1 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {486, 5900},
|
|
/*h(1510)=2 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1510, 5901},
|
|
/*h(484)=3 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W0 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {484, 5900},
|
|
/*h(2534)=4 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2534, 5899},
|
|
/*h(1508)=5 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W0 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {1508, 5901},
|
|
/*h(2532)=6 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W0 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {2532, 5899},
|
|
/*h(502)=7 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {502, 5897},
|
|
/*h(1526)=8 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1526, 5898},
|
|
/*h(500)=9 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL128 W1 UISA_VMODRM_XMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {500, 5897},
|
|
/*h(2550)=10 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL512 W1 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {2550, 5896},
|
|
/*h(1524)=11 EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] RM=4 BCRC=0 VL256 W1 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {1524, 5898}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 37) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4548},
|
|
/*h(14)=1 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4538},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4547},
|
|
/*h(15)=4 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4536},
|
|
/*h(111)=5 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4536},
|
|
/*h(43)=6 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4543},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4541},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4544},
|
|
/*h(45)=12 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4541},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4544},
|
|
/*h(46)=15 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4540},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4542},
|
|
/*h(47)=18 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4536},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4543},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4537},
|
|
/*h(8)=24 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4546},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4537},
|
|
/*h(9)=27 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4546},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4535},
|
|
/*h(10)=30 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4545},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4536},
|
|
/*h(11)=33 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4543},
|
|
/*h(107)=34 EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4543},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4539},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4548},
|
|
/*h(13)=39 EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4539},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4650},
|
|
/*h(14)=1 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4649},
|
|
/*h(15)=4 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4638},
|
|
/*h(111)=5 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4638},
|
|
/*h(43)=6 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4645},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4643},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4646},
|
|
/*h(45)=12 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4643},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4646},
|
|
/*h(46)=15 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4642},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4644},
|
|
/*h(47)=18 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4638},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4645},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4639},
|
|
/*h(8)=24 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4639},
|
|
/*h(9)=27 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4637},
|
|
/*h(10)=30 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4647},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4638},
|
|
/*h(11)=33 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4645},
|
|
/*h(107)=34 EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4645},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4650},
|
|
/*h(13)=39 EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4641},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4494},
|
|
/*h(14)=1 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4484},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4493},
|
|
/*h(15)=4 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4482},
|
|
/*h(111)=5 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4482},
|
|
/*h(43)=6 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4489},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4487},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4490},
|
|
/*h(45)=12 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4487},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4490},
|
|
/*h(46)=15 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4486},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4488},
|
|
/*h(47)=18 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4482},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4489},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4483},
|
|
/*h(8)=24 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4492},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4483},
|
|
/*h(9)=27 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4492},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4481},
|
|
/*h(10)=30 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4491},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4482},
|
|
/*h(11)=33 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4489},
|
|
/*h(107)=34 EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4489},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4485},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4494},
|
|
/*h(13)=39 EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4485},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xa9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4498},
|
|
/*h(15)=2 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4496},
|
|
/*h(12)=3 EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4497},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4495},
|
|
/*h(11)=6 EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4499},
|
|
/*h(8)=7 EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4500}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xaa_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4596},
|
|
/*h(14)=1 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4586},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4595},
|
|
/*h(15)=4 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4584},
|
|
/*h(111)=5 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4584},
|
|
/*h(43)=6 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4591},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4589},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4592},
|
|
/*h(45)=12 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4589},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4592},
|
|
/*h(46)=15 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4588},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4590},
|
|
/*h(47)=18 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4584},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4591},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4585},
|
|
/*h(8)=24 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4594},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4585},
|
|
/*h(9)=27 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4594},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4583},
|
|
/*h(10)=30 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4593},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4584},
|
|
/*h(11)=33 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4591},
|
|
/*h(107)=34 EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4591},
|
|
/*h(80)=35 EVV 0xAA VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {80, 4059},
|
|
/*h(12)=36 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4587},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4596},
|
|
/*h(13)=39 EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4587},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xab_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4600},
|
|
/*h(15)=2 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4598},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=4 EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4599},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4597},
|
|
/*h(11)=7 EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4601},
|
|
/*h(16)=8 EVV 0xAB VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()*/ {16, 4060},
|
|
/*h(8)=9 EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4602}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xac_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4698},
|
|
/*h(14)=1 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4688},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4697},
|
|
/*h(15)=4 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4686},
|
|
/*h(111)=5 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4686},
|
|
/*h(43)=6 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4693},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4691},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4694},
|
|
/*h(45)=12 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4691},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4694},
|
|
/*h(46)=15 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4690},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4692},
|
|
/*h(47)=18 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4686},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4693},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4687},
|
|
/*h(8)=24 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4696},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4687},
|
|
/*h(9)=27 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4696},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4685},
|
|
/*h(10)=30 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4695},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4686},
|
|
/*h(11)=33 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4693},
|
|
/*h(107)=34 EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4693},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4689},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4698},
|
|
/*h(13)=39 EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4689},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xad_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4702},
|
|
/*h(15)=2 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4700},
|
|
/*h(12)=3 EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4701},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4699},
|
|
/*h(11)=6 EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4703},
|
|
/*h(8)=7 EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4704}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xae_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4758},
|
|
/*h(14)=1 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4748},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4757},
|
|
/*h(15)=4 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4746},
|
|
/*h(111)=5 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4746},
|
|
/*h(43)=6 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4753},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4751},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4754},
|
|
/*h(45)=12 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4751},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4754},
|
|
/*h(46)=15 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4750},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4752},
|
|
/*h(47)=18 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4746},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4753},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4747},
|
|
/*h(8)=24 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4756},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4747},
|
|
/*h(9)=27 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4756},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4745},
|
|
/*h(10)=30 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4755},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4746},
|
|
/*h(11)=33 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4753},
|
|
/*h(107)=34 EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4753},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4749},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4758},
|
|
/*h(13)=39 EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4749},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xaf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4762},
|
|
/*h(15)=2 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4760},
|
|
/*h(12)=3 EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4761},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4759},
|
|
/*h(11)=6 EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4763},
|
|
/*h(8)=7 EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4764}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6825},
|
|
/*h(46)=1 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6822},
|
|
/*h(12)=2 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6821},
|
|
/*h(77)=3 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6825},
|
|
/*h(13)=4 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6821},
|
|
/*h(78)=5 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6824},
|
|
/*h(44)=6 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6823},
|
|
/*h(14)=7 EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6820},
|
|
/*h(45)=8 EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6823}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6819},
|
|
/*h(46)=1 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6816},
|
|
/*h(12)=2 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6815},
|
|
/*h(77)=3 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6819},
|
|
/*h(13)=4 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6815},
|
|
/*h(78)=5 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6818},
|
|
/*h(44)=6 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6817},
|
|
/*h(14)=7 EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6814},
|
|
/*h(45)=8 EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6817}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4562},
|
|
/*h(14)=1 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4552},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4561},
|
|
/*h(15)=4 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4550},
|
|
/*h(111)=5 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4550},
|
|
/*h(43)=6 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4557},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4555},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4558},
|
|
/*h(45)=12 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4555},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4558},
|
|
/*h(46)=15 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4554},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4556},
|
|
/*h(47)=18 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4550},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4557},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4551},
|
|
/*h(8)=24 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4560},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4551},
|
|
/*h(9)=27 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4560},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4549},
|
|
/*h(10)=30 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4559},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4550},
|
|
/*h(11)=33 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4557},
|
|
/*h(107)=34 EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4557},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4553},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4562},
|
|
/*h(13)=39 EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4553},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4664},
|
|
/*h(14)=1 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4654},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4663},
|
|
/*h(15)=4 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4652},
|
|
/*h(111)=5 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4652},
|
|
/*h(43)=6 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4659},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4657},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4660},
|
|
/*h(45)=12 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4657},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4660},
|
|
/*h(46)=15 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4656},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4658},
|
|
/*h(47)=18 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4652},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4659},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4653},
|
|
/*h(8)=24 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4653},
|
|
/*h(9)=27 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4662},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4651},
|
|
/*h(10)=30 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4661},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4652},
|
|
/*h(11)=33 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4659},
|
|
/*h(107)=34 EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4659},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4655},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4664},
|
|
/*h(13)=39 EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4655},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4514},
|
|
/*h(14)=1 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4504},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4513},
|
|
/*h(15)=4 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4502},
|
|
/*h(111)=5 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4502},
|
|
/*h(43)=6 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4509},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4507},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4510},
|
|
/*h(45)=12 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4507},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4510},
|
|
/*h(46)=15 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4506},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4508},
|
|
/*h(47)=18 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4509},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4503},
|
|
/*h(8)=24 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4512},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4503},
|
|
/*h(9)=27 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4512},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4501},
|
|
/*h(10)=30 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4511},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4502},
|
|
/*h(11)=33 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4509},
|
|
/*h(107)=34 EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4509},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4505},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4514},
|
|
/*h(13)=39 EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4505},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xb9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4518},
|
|
/*h(15)=2 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4516},
|
|
/*h(12)=3 EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4517},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4515},
|
|
/*h(11)=6 EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4519},
|
|
/*h(8)=7 EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4520}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xba_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4616},
|
|
/*h(14)=1 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4615},
|
|
/*h(15)=4 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4604},
|
|
/*h(111)=5 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4604},
|
|
/*h(43)=6 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4611},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4609},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4612},
|
|
/*h(45)=12 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4609},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4612},
|
|
/*h(46)=15 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4608},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4610},
|
|
/*h(47)=18 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4611},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4605},
|
|
/*h(8)=24 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4614},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4605},
|
|
/*h(9)=27 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4614},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4603},
|
|
/*h(10)=30 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4613},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4604},
|
|
/*h(11)=33 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4611},
|
|
/*h(107)=34 EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4611},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4607},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4616},
|
|
/*h(13)=39 EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4607},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4620},
|
|
/*h(15)=2 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4618},
|
|
/*h(12)=3 EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4619},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4617},
|
|
/*h(11)=6 EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4621},
|
|
/*h(8)=7 EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4622}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4718},
|
|
/*h(14)=1 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4708},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4717},
|
|
/*h(15)=4 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4706},
|
|
/*h(111)=5 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4706},
|
|
/*h(43)=6 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4713},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4711},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4714},
|
|
/*h(45)=12 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4711},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4714},
|
|
/*h(46)=15 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4710},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4712},
|
|
/*h(47)=18 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4706},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4713},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4707},
|
|
/*h(8)=24 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4716},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4707},
|
|
/*h(9)=27 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4716},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4705},
|
|
/*h(10)=30 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4715},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4706},
|
|
/*h(11)=33 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4713},
|
|
/*h(107)=34 EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4709},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4718},
|
|
/*h(13)=39 EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4709},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4722},
|
|
/*h(15)=2 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4720},
|
|
/*h(12)=3 EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4721},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4719},
|
|
/*h(11)=6 EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4723},
|
|
/*h(8)=7 EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4724}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbe_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 4778},
|
|
/*h(14)=1 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4768},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 4777},
|
|
/*h(15)=4 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4766},
|
|
/*h(111)=5 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4766},
|
|
/*h(43)=6 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 4773},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4771},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 4774},
|
|
/*h(45)=12 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4771},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 4774},
|
|
/*h(46)=15 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4770},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 4772},
|
|
/*h(47)=18 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4766},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 4773},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4767},
|
|
/*h(8)=24 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 4776},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4767},
|
|
/*h(9)=27 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 4776},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4765},
|
|
/*h(10)=30 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 4775},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4766},
|
|
/*h(11)=33 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 4773},
|
|
/*h(107)=34 EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 4773},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4769},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 4778},
|
|
/*h(13)=39 EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4769},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xbf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4782},
|
|
/*h(15)=2 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {15, 4780},
|
|
/*h(12)=3 EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4781},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4779},
|
|
/*h(11)=6 EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 4783},
|
|
/*h(8)=7 EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4784}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(601)=0 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 6007},
|
|
/*h(88)=1 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 6009},
|
|
/*h(94)=2 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6014},
|
|
/*h(349)=3 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 6017},
|
|
/*h(604)=4 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 6013},
|
|
/*h(90)=5 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6008},
|
|
/*h(345)=6 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 6011},
|
|
/*h(600)=7 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 6007},
|
|
/*h(606)=8 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6012},
|
|
/*h(93)=9 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 6015},
|
|
/*h(348)=10 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 6017},
|
|
/*h(602)=11 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6006},
|
|
/*h(89)=12 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 6009},
|
|
/*h(344)=13 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 6011},
|
|
/*h(350)=14 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6016},
|
|
/*h(605)=15 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 6013},
|
|
/*h(92)=16 EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 6015},
|
|
/*h(346)=17 EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((11*key % 83) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[16] = {
|
|
/*h(20326)=0 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20326, 4054},
|
|
/*h(20372)=1 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20372, 4017},
|
|
/*h(20310)=2 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20310, 4050},
|
|
/*h(20452)=3 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20452, 4053},
|
|
/*h(20390)=4 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20390, 4021},
|
|
/*h(20260)=5 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20260, 4022},
|
|
/*h(20436)=6 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20436, 4049},
|
|
/*h(20374)=7 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20374, 4017},
|
|
/*h(20244)=8 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20244, 4018},
|
|
/*h(20454)=9 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20454, 4053},
|
|
/*h(20324)=10 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20324, 4054},
|
|
/*h(20262)=11 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20262, 4022},
|
|
/*h(20438)=12 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20438, 4049},
|
|
/*h(20308)=13 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20308, 4050},
|
|
/*h(20246)=14 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20246, 4018},
|
|
/*h(20388)=15 EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20388, 4021}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REG_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 17) % 16);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[16] = {
|
|
/*h(20326)=0 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20326, 4056},
|
|
/*h(20372)=1 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20372, 4019},
|
|
/*h(20310)=2 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20310, 4052},
|
|
/*h(20452)=3 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20452, 4055},
|
|
/*h(20390)=4 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20390, 4023},
|
|
/*h(20260)=5 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20260, 4024},
|
|
/*h(20436)=6 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20436, 4051},
|
|
/*h(20374)=7 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20374, 4019},
|
|
/*h(20244)=8 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20244, 4020},
|
|
/*h(20454)=9 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20454, 4055},
|
|
/*h(20324)=10 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20324, 4056},
|
|
/*h(20262)=11 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20262, 4024},
|
|
/*h(20438)=12 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20438, 4051},
|
|
/*h(20308)=13 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20308, 4052},
|
|
/*h(20246)=14 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT()*/ {20246, 4020},
|
|
/*h(20388)=15 EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT()*/ {20388, 4023}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REG_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 17) % 16);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xc8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[28] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=1 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4013},
|
|
/*h(605)=2 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4013},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=6 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4011},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(95)=8 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 4012},
|
|
/*h(351)=9 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 4012},
|
|
/*h(607)=10 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 4012},
|
|
/*h(863)=11 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 4012},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=13 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4016},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=17 EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4016},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=21 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4014},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=23 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 4015},
|
|
/*h(347)=24 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 4015},
|
|
/*h(603)=25 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 4015},
|
|
/*h(859)=26 EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 4015},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 31) % 28);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xca_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[28] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=1 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4027},
|
|
/*h(605)=2 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4027},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=6 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4025},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(95)=8 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 4026},
|
|
/*h(351)=9 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 4026},
|
|
/*h(607)=10 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 4026},
|
|
/*h(863)=11 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 4026},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=13 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4030},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=17 EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4030},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=21 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4028},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=23 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 4029},
|
|
/*h(347)=24 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 4029},
|
|
/*h(603)=25 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 4029},
|
|
/*h(859)=26 EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 4029},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 31) % 28);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4034},
|
|
/*h(15)=2 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {15, 4032},
|
|
/*h(12)=3 EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4033},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4031},
|
|
/*h(11)=6 EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {11, 4035},
|
|
/*h(8)=7 EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4036}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[28] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=1 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4039},
|
|
/*h(605)=2 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4039},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=6 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4037},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(95)=8 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 4038},
|
|
/*h(351)=9 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 4038},
|
|
/*h(607)=10 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 4038},
|
|
/*h(863)=11 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 4038},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=13 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4042},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=17 EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4042},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=21 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4040},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=23 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 4041},
|
|
/*h(347)=24 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 4041},
|
|
/*h(603)=25 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 4041},
|
|
/*h(859)=26 EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 4041},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 31) % 28);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {10, 4046},
|
|
/*h(15)=2 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {15, 4044},
|
|
/*h(12)=3 EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4045},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {14, 4043},
|
|
/*h(11)=6 EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {11, 4047},
|
|
/*h(8)=7 EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4048}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xcf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(42)=0 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6978},
|
|
/*h(8)=1 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6977},
|
|
/*h(72)=2 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6981},
|
|
/*h(10)=3 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6976},
|
|
/*h(74)=4 EVV 0xCF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6980},
|
|
/*h(40)=5 EVV 0xCF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6979}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 6995},
|
|
/*h(78)=2 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0*/ {78, 6998},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0*/ {46, 6996},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xDC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0*/ {14, 6994},
|
|
/*h(74)=7 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 6999},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0xDC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 6997}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 7001},
|
|
/*h(78)=2 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0*/ {78, 7004},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0*/ {46, 7002},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xDD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0*/ {14, 7000},
|
|
/*h(74)=7 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 7005},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0xDD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 7003}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xde_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 6983},
|
|
/*h(78)=2 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0*/ {78, 6986},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0*/ {46, 6984},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xDE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0*/ {14, 6982},
|
|
/*h(74)=7 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 6987},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0xDE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 6985}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map2_opcode0xdf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {10, 6989},
|
|
/*h(78)=2 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0*/ {78, 6992},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0*/ {46, 6990},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xDF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0*/ {14, 6988},
|
|
/*h(74)=7 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {74, 6993},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0xDF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 ESIZE_128_BITS() NELEM_FULLMEM()*/ {42, 6991}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x0_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*h(348)=0 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 5281},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=2 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 5277},
|
|
/*h(350)=3 EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 5280},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=5 EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 5276},
|
|
/*h(349)=6 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 5281},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=9 EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 5277}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*h(348)=0 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 5269},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=2 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 5265},
|
|
/*h(350)=3 EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 5268},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=5 EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 5264},
|
|
/*h(349)=6 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 5269},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=9 EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 5265}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 4096},
|
|
/*h(76)=1 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 4102},
|
|
/*h(8)=2 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 4098},
|
|
/*h(12)=3 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 4104},
|
|
/*h(41)=4 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 4100},
|
|
/*h(45)=5 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 4106},
|
|
/*h(74)=6 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 4095},
|
|
/*h(78)=7 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 4101},
|
|
/*h(10)=8 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 4097},
|
|
/*h(14)=9 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 4103},
|
|
/*h(40)=10 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 4100},
|
|
/*h(44)=11 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 4106},
|
|
/*h(73)=12 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 4096},
|
|
/*h(77)=13 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 4102},
|
|
/*h(9)=14 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 4098},
|
|
/*h(13)=15 EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 4104},
|
|
/*h(42)=16 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 4099},
|
|
/*h(46)=17 EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 4105}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(89)=0 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 5257},
|
|
/*h(602)=1 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 5252},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=3 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 5261},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=6 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 5257},
|
|
/*h(601)=7 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 5253},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 5261},
|
|
/*h(90)=11 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 5256},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=14 EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 5253},
|
|
/*h(346)=15 EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 5260},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(94)=0 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()*/ {94, 5244},
|
|
/*h(350)=1 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 5248},
|
|
/*h(606)=2 EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 5240},
|
|
/*h(92)=3 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {92, 5245},
|
|
/*h(348)=4 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 5249},
|
|
/*h(604)=5 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 5241},
|
|
/*h(93)=6 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {93, 5245},
|
|
/*h(349)=7 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 5249},
|
|
/*h(605)=8 EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 5241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 13) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[26] = {
|
|
/*h(601)=0 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 5843},
|
|
/*h(538)=1 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {538, 7567},
|
|
/*h(603)=2 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {603, 5842},
|
|
/*h(344)=3 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 5847},
|
|
/*h(281)=4 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {281, 7566},
|
|
/*h(346)=5 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 5846},
|
|
/*h(283)=6 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {283, 7568},
|
|
/*h(24)=7 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {24, 7564},
|
|
/*h(89)=8 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 5845},
|
|
/*h(26)=9 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {26, 7563},
|
|
/*h(91)=10 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {91, 5842},
|
|
/*h(859)=11 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {859, 5842},
|
|
/*h(600)=12 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 5843},
|
|
/*h(537)=13 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {537, 7569},
|
|
/*h(602)=14 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 5841},
|
|
/*h(539)=15 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {539, 7568},
|
|
/*h(280)=16 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {280, 7566},
|
|
/*h(345)=17 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 5847},
|
|
/*h(282)=18 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {282, 7565},
|
|
/*h(347)=19 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {347, 5842},
|
|
/*h(88)=20 EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 5845},
|
|
/*h(25)=21 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {25, 7564},
|
|
/*h(90)=22 EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 5844},
|
|
/*h(27)=23 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {27, 7568},
|
|
/*h(795)=24 EVV 0x08 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {795, 7568},
|
|
/*h(536)=25 EVV 0x08 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {536, 7569}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((14*key % 277) % 26);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[23] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=1 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 5840},
|
|
/*h(94)=2 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()*/ {94, 5837},
|
|
/*h(607)=3 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {607, 5835},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=6 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 5836},
|
|
/*h(350)=7 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 5839},
|
|
/*h(863)=8 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {863, 5835},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=10 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {93, 5838},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=12 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 5834},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=15 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 5840},
|
|
/*h(95)=16 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {95, 5835},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=19 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {92, 5838},
|
|
/*h(605)=20 EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 5836},
|
|
/*h(351)=21 EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {351, 5835},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 23ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xa_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*h(0)=0 EVV 0x0A VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {0, 7572},
|
|
/*h(10)=1 EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()*/ {10, 5851},
|
|
/*h(2)=2 EVV 0x0A VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 UIMM8()*/ {2, 7570},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=7 EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {11, 5852},
|
|
/*h(3)=8 EVV 0x0A VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {3, 7571},
|
|
/*h(8)=9 EVV 0x0A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 5853}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=1 EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 UIMM8()*/ {15, 5849},
|
|
/*h(12)=2 EVV 0x0B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 5850},
|
|
/*h(14)=3 EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()*/ {14, 5848},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 UIMM8()*/ {22, 6310},
|
|
/*h(4)=1 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {4, 6309},
|
|
/*h(38)=2 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 UIMM8()*/ {38, 6312},
|
|
/*h(20)=3 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {20, 6311},
|
|
/*h(6)=4 EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 UIMM8()*/ {6, 6308},
|
|
/*h(36)=5 EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {36, 6313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x14_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(94)=0 EVV 0x14 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {94, 6422},
|
|
/*h(90)=1 EVV 0x14 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_GPR_WRITER_STORE_BYTE()*/ {90, 6423}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x15_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(94)=0 EVV 0x15 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {94, 6430},
|
|
/*h(90)=1 EVV 0x15 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_16_BITS() NELEM_GPR_WRITER_STORE_WORD()*/ {90, 6431}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x16_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[17] = {
|
|
/*h(746)=0 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {746, 6426},
|
|
/*h(738)=1 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {738, 6426},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(722)=3 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {722, 6427},
|
|
/*h(714)=4 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {714, 6426},
|
|
/*h(706)=5 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {706, 6426},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(758)=7 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {758, 6428},
|
|
/*h(750)=8 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {750, 6424},
|
|
/*h(742)=9 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {742, 6424},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(726)=11 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {726, 6425},
|
|
/*h(718)=12 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {718, 6424},
|
|
/*h(710)=13 EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {710, 6424},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(754)=16 EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_64_BITS() NELEM_GPR_WRITER_STORE()*/ {754, 6429}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x17_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(94)=0 EVV 0x17 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8()*/ {94, 4439},
|
|
/*h(90)=1 EVV 0x17 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {90, 4440}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x18_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*h(42)=0 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 4839},
|
|
/*h(78)=1 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6192},
|
|
/*h(40)=2 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {40, 4840},
|
|
/*h(76)=3 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {76, 6193},
|
|
/*h(46)=4 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6190},
|
|
/*h(74)=5 EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 4837},
|
|
/*h(44)=6 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {44, 6191},
|
|
/*h(72)=7 EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {72, 4838}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((28*key % 29) % 8);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x19_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[17] = {
|
|
/*h(602)=0 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 4427},
|
|
/*h(348)=1 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 6163},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=3 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {1374, 6162},
|
|
/*h(604)=4 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 6165},
|
|
/*h(350)=5 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 6162},
|
|
/*h(1630)=6 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {1630, 6164},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=8 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 6164},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 4430},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=12 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {1370, 4429},
|
|
/*h(600)=13 EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 4428},
|
|
/*h(346)=14 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 4429},
|
|
/*h(1626)=15 EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {1626, 4427},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(78)=0 EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 4841},
|
|
/*h(72)=1 EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE8()*/ {72, 6189},
|
|
/*h(74)=2 EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6188},
|
|
/*h(76)=3 EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE4()*/ {76, 4842}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 6160},
|
|
/*h(604)=1 EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4432},
|
|
/*h(1630)=2 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {1630, 4431},
|
|
/*h(606)=3 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 4431},
|
|
/*h(600)=4 EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 6161},
|
|
/*h(1626)=5 EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {1626, 6160}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 6ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[23] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=1 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 4229},
|
|
/*h(1115)=2 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {1115, 4230},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=5 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {91, 4230},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1371)=7 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {1371, 4230},
|
|
/*h(88)=8 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_HALFMEM()*/ {88, 4233},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=10 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {347, 4230},
|
|
/*h(1114)=11 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {1114, 4232},
|
|
/*h(1627)=12 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {1627, 4230},
|
|
/*h(344)=13 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_HALFMEM()*/ {344, 4235},
|
|
/*h(90)=14 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 4232},
|
|
/*h(603)=15 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {603, 4230},
|
|
/*h(1370)=16 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {1370, 4234},
|
|
/*h(1883)=17 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {1883, 4230},
|
|
/*h(600)=18 EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_HALFMEM()*/ {600, 4231},
|
|
/*h(346)=19 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 4234},
|
|
/*h(859)=20 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {859, 4230},
|
|
/*h(1626)=21 EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {1626, 4229},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 23ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5189},
|
|
/*h(76)=1 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5195},
|
|
/*h(8)=2 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 5191},
|
|
/*h(12)=3 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 5197},
|
|
/*h(41)=4 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 5193},
|
|
/*h(45)=5 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5199},
|
|
/*h(74)=6 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {74, 5188},
|
|
/*h(78)=7 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()*/ {78, 5194},
|
|
/*h(10)=8 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {10, 5190},
|
|
/*h(14)=9 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()*/ {14, 5196},
|
|
/*h(40)=10 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 5193},
|
|
/*h(44)=11 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5199},
|
|
/*h(73)=12 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5189},
|
|
/*h(77)=13 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5195},
|
|
/*h(9)=14 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 5191},
|
|
/*h(13)=15 EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 5197},
|
|
/*h(42)=16 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {42, 5192},
|
|
/*h(46)=17 EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()*/ {46, 5198}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x1f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5153},
|
|
/*h(76)=1 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5183},
|
|
/*h(8)=2 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 5155},
|
|
/*h(12)=3 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 5185},
|
|
/*h(41)=4 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 5157},
|
|
/*h(45)=5 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5187},
|
|
/*h(74)=6 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {74, 5152},
|
|
/*h(78)=7 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()*/ {78, 5182},
|
|
/*h(10)=8 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {10, 5154},
|
|
/*h(14)=9 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()*/ {14, 5184},
|
|
/*h(40)=10 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 5157},
|
|
/*h(44)=11 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5187},
|
|
/*h(73)=12 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5153},
|
|
/*h(77)=13 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5183},
|
|
/*h(9)=14 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 5155},
|
|
/*h(13)=15 EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 5185},
|
|
/*h(42)=16 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {42, 5156},
|
|
/*h(46)=17 EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()*/ {46, 5186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x20_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10)=0 EVV 0x20 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_GPR_READER_BYTE()*/ {10, 6435},
|
|
/*h(14)=1 EVV 0x20 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {14, 6434}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x21_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(18)=0 EVV 0x21 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE1()*/ {18, 4850},
|
|
/*h(22)=1 EVV 0x21 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0 UIMM8()*/ {22, 4849}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x22_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[16] = {
|
|
/*h(102)=0 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 ZEROING=0 MASK=0 UIMM8()*/ {102, 6436},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=2 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 mode64 W0 ZEROING=0 MASK=0 UIMM8()*/ {86, 6437},
|
|
/*h(78)=3 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 ZEROING=0 MASK=0 UIMM8()*/ {78, 6436},
|
|
/*h(70)=4 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 ZEROING=0 MASK=0 UIMM8()*/ {70, 6436},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(114)=7 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 ZEROING=0 MASK=0 UIMM8() ESIZE_64_BITS() NELEM_GPR_READER()*/ {114, 6441},
|
|
/*h(106)=8 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_READER()*/ {106, 6438},
|
|
/*h(98)=9 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_READER()*/ {98, 6438},
|
|
/*h(82)=10 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 mode64 W0 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_READER()*/ {82, 6439},
|
|
/*h(74)=11 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_READER()*/ {74, 6438},
|
|
/*h(66)=12 EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 ZEROING=0 MASK=0 UIMM8() ESIZE_32_BITS() NELEM_GPR_READER()*/ {66, 6438},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=14 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 ZEROING=0 MASK=0 UIMM8()*/ {118, 6440},
|
|
/*h(110)=15 EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 ZEROING=0 MASK=0 UIMM8()*/ {110, 6436}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-4));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x23_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 5908},
|
|
/*h(73)=1 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5903},
|
|
/*h(77)=2 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5907},
|
|
/*h(41)=3 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 5905},
|
|
/*h(45)=4 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5909},
|
|
/*h(72)=5 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5903},
|
|
/*h(76)=6 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5907},
|
|
/*h(40)=7 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 5905},
|
|
/*h(44)=8 EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5909},
|
|
/*h(74)=9 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 5902},
|
|
/*h(78)=10 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 5906},
|
|
/*h(42)=11 EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 5904}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 43) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x25_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5747},
|
|
/*h(76)=1 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5753},
|
|
/*h(8)=2 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 5749},
|
|
/*h(12)=3 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 5755},
|
|
/*h(41)=4 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 5751},
|
|
/*h(45)=5 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5757},
|
|
/*h(74)=6 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 5746},
|
|
/*h(78)=7 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 5752},
|
|
/*h(10)=8 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 5748},
|
|
/*h(14)=9 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 5754},
|
|
/*h(40)=10 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 5751},
|
|
/*h(44)=11 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5757},
|
|
/*h(73)=12 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5747},
|
|
/*h(77)=13 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5753},
|
|
/*h(9)=14 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 5749},
|
|
/*h(13)=15 EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 5755},
|
|
/*h(42)=16 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 5750},
|
|
/*h(46)=17 EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 5756}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x26_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[78] = {
|
|
/*h(26)=0 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {26, 7497},
|
|
/*h(606)=1 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 4817},
|
|
/*h(27)=2 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {27, 7502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(607)=4 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {607, 4818},
|
|
/*h(344)=5 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 4830},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=8 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 4830},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=11 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 4829},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=14 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {347, 4825},
|
|
/*h(795)=15 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {795, 7502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=17 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 4823},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=20 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 4823},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=23 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 4822},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(351)=26 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {351, 4818},
|
|
/*h(88)=27 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 4828},
|
|
/*h(536)=28 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {536, 7503},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=30 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 4828},
|
|
/*h(537)=31 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {537, 7503},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=33 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 4827},
|
|
/*h(538)=34 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {538, 7501},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=36 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {91, 4825},
|
|
/*h(539)=37 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {539, 7502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=39 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {92, 4821},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=42 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {93, 4821},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=45 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()*/ {94, 4820},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(95)=48 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {95, 4818},
|
|
/*h(859)=49 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {859, 4825},
|
|
/*h(280)=50 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {280, 7500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(281)=53 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {281, 7500},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(282)=56 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {282, 7499},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(283)=59 EVV 0x26 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {283, 7502},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(863)=61 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {863, 4818},
|
|
/*h(600)=62 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 4826},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=65 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 4826},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=68 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 4824},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=71 EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {603, 4825},
|
|
/*h(24)=72 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {24, 7498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=74 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 4819},
|
|
/*h(25)=75 EVV 0x26 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {25, 7498},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=77 EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 4819}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 79) % 78);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x27_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[15] = {
|
|
/*h(0)=0 EVV 0x27 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {0, 7506},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=2 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()*/ {10, 4834},
|
|
/*h(2)=3 EVV 0x27 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 UIMM8()*/ {2, 7504},
|
|
/*h(15)=4 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 UIMM8()*/ {15, 4832},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=6 EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4833},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=9 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()*/ {14, 4831},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=11 EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {11, 4835},
|
|
/*h(3)=12 EVV 0x27 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {3, 7505},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=14 EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4836}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 15ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x38_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*h(42)=0 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 4845},
|
|
/*h(78)=1 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6198},
|
|
/*h(40)=2 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {40, 4846},
|
|
/*h(76)=3 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {76, 6199},
|
|
/*h(46)=4 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6196},
|
|
/*h(74)=5 EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 4843},
|
|
/*h(44)=6 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {44, 6197},
|
|
/*h(72)=7 EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {72, 4844}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((28*key % 29) % 8);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x39_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[17] = {
|
|
/*h(602)=0 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 4433},
|
|
/*h(348)=1 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {348, 6169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=3 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {1374, 6168},
|
|
/*h(604)=4 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE2()*/ {604, 6171},
|
|
/*h(350)=5 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 6168},
|
|
/*h(1630)=6 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {1630, 6170},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=8 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 6170},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {344, 4436},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1370)=12 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {1370, 4435},
|
|
/*h(600)=13 EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE4()*/ {600, 4434},
|
|
/*h(346)=14 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 4435},
|
|
/*h(1626)=15 EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {1626, 4433},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(78)=0 EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 4847},
|
|
/*h(72)=1 EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE8()*/ {72, 6195},
|
|
/*h(74)=2 EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6194},
|
|
/*h(76)=3 EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_TUPLE4()*/ {76, 4848}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-2));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(602)=0 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 6166},
|
|
/*h(604)=1 EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_TUPLE4()*/ {604, 4438},
|
|
/*h(1630)=2 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {1630, 4437},
|
|
/*h(606)=3 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 4437},
|
|
/*h(600)=4 EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_TUPLE8()*/ {600, 6167},
|
|
/*h(1626)=5 EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {1626, 6166}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 6ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()*/ {46, 6394},
|
|
/*h(72)=1 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6391},
|
|
/*h(42)=2 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {42, 6388},
|
|
/*h(78)=3 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()*/ {78, 6396},
|
|
/*h(12)=4 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6393},
|
|
/*h(74)=5 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {74, 6390},
|
|
/*h(8)=6 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6387},
|
|
/*h(44)=7 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6395},
|
|
/*h(14)=8 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()*/ {14, 6392},
|
|
/*h(40)=9 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6389},
|
|
/*h(76)=10 EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6397},
|
|
/*h(10)=11 EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {10, 6386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x3f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()*/ {46, 6400},
|
|
/*h(72)=1 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {72, 6361},
|
|
/*h(42)=2 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {42, 6358},
|
|
/*h(78)=3 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()*/ {78, 6402},
|
|
/*h(12)=4 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6399},
|
|
/*h(74)=5 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {74, 6360},
|
|
/*h(8)=6 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {8, 6357},
|
|
/*h(44)=7 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6401},
|
|
/*h(14)=8 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()*/ {14, 6398},
|
|
/*h(40)=9 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {40, 6359},
|
|
/*h(76)=10 EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6403},
|
|
/*h(10)=11 EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {10, 6356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x42_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(42)=0 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 6156},
|
|
/*h(8)=1 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {8, 6155},
|
|
/*h(72)=2 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {72, 6159},
|
|
/*h(10)=3 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 6154},
|
|
/*h(74)=4 EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6158},
|
|
/*h(40)=5 EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {40, 6157}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x43_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 5916},
|
|
/*h(73)=1 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5911},
|
|
/*h(77)=2 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5915},
|
|
/*h(41)=3 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 5913},
|
|
/*h(45)=4 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5917},
|
|
/*h(72)=5 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5911},
|
|
/*h(76)=6 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5915},
|
|
/*h(40)=7 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 5913},
|
|
/*h(44)=8 EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5917},
|
|
/*h(74)=9 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 5910},
|
|
/*h(78)=10 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 5914},
|
|
/*h(42)=11 EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 5912}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 43) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x44_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {10, 7007},
|
|
/*h(78)=2 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8()*/ {78, 7010},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0 UIMM8()*/ {46, 7008},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0x44 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {14, 7006},
|
|
/*h(74)=7 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {74, 7011},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0x44 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 UIMM8() ESIZE_64_BITS() NELEM_FULLMEM()*/ {42, 7009}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x50_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 6772},
|
|
/*h(14)=1 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6762},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 6771},
|
|
/*h(15)=4 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {15, 6767},
|
|
/*h(111)=5 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {111, 6767},
|
|
/*h(43)=6 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {43, 6774},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 6765},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 6775},
|
|
/*h(45)=12 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 6765},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 6775},
|
|
/*h(46)=15 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6764},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6773},
|
|
/*h(47)=18 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {47, 6767},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {75, 6774},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 6768},
|
|
/*h(8)=24 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 6770},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 6768},
|
|
/*h(9)=27 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 6770},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6766},
|
|
/*h(10)=30 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 6769},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {79, 6767},
|
|
/*h(11)=33 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {11, 6774},
|
|
/*h(107)=34 EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {107, 6774},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 6763},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 6772},
|
|
/*h(13)=39 EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 6763},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x51_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()*/ {10, 6779},
|
|
/*h(15)=2 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 UIMM8()*/ {15, 6777},
|
|
/*h(12)=3 EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 6778},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()*/ {14, 6776},
|
|
/*h(11)=6 EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {11, 6780},
|
|
/*h(8)=7 EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 6781}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x54_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[41] = {
|
|
/*h(41)=0 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 4454},
|
|
/*h(14)=1 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 4444},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=3 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 4453},
|
|
/*h(15)=4 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {15, 4442},
|
|
/*h(111)=5 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {111, 4442},
|
|
/*h(43)=6 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {43, 4449},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=9 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 4447},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=11 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 4450},
|
|
/*h(45)=12 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 4447},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=14 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 4450},
|
|
/*h(46)=15 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 4446},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=17 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 4448},
|
|
/*h(47)=18 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {47, 4442},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(75)=20 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {75, 4449},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=23 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 4443},
|
|
/*h(8)=24 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 4452},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=26 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 4443},
|
|
/*h(9)=27 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 4452},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(78)=29 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 4441},
|
|
/*h(10)=30 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 4451},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(79)=32 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 UIMM8()*/ {79, 4442},
|
|
/*h(11)=33 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {11, 4449},
|
|
/*h(107)=34 EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 UIMM8()*/ {107, 4449},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=36 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 4445},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=38 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 4454},
|
|
/*h(13)=39 EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 4445},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 41);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x55_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[8] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()*/ {10, 4458},
|
|
/*h(15)=2 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 UIMM8()*/ {15, 4456},
|
|
/*h(12)=3 EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 4457},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=5 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()*/ {14, 4455},
|
|
/*h(11)=6 EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {11, 4459},
|
|
/*h(8)=7 EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 4460}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-3));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x56_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[78] = {
|
|
/*h(26)=0 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {26, 7553},
|
|
/*h(606)=1 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()*/ {606, 6786},
|
|
/*h(27)=2 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {27, 7558},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(607)=4 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {607, 6787},
|
|
/*h(344)=5 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 6792},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=8 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 6792},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=11 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 6791},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=14 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {347, 6794},
|
|
/*h(795)=15 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {795, 7558},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=17 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 6785},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=20 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 6785},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=23 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()*/ {350, 6784},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(351)=26 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {351, 6787},
|
|
/*h(88)=27 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 6790},
|
|
/*h(536)=28 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {536, 7559},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=30 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 6790},
|
|
/*h(537)=31 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {537, 7559},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=33 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 6789},
|
|
/*h(538)=34 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {538, 7557},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=36 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {91, 6794},
|
|
/*h(539)=37 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {539, 7558},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=39 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {92, 6783},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=42 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {93, 6783},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=45 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()*/ {94, 6782},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(95)=48 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {95, 6787},
|
|
/*h(859)=49 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {859, 6794},
|
|
/*h(280)=50 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {280, 7556},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(281)=53 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {281, 7556},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(282)=56 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {282, 7555},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(283)=59 EVV 0x56 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {283, 7558},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(863)=61 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR UIMM8()*/ {863, 6787},
|
|
/*h(600)=62 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 6795},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(601)=65 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 6795},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(602)=68 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 6793},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=71 EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR UIMM8()*/ {603, 6794},
|
|
/*h(24)=72 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {24, 7554},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=74 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 6788},
|
|
/*h(25)=75 EVV 0x56 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {25, 7554},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=77 EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 6788}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 79) % 78);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x57_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[15] = {
|
|
/*h(0)=0 EVV 0x57 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {0, 7562},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=2 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()*/ {10, 6799},
|
|
/*h(2)=3 EVV 0x57 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 UIMM8()*/ {2, 7560},
|
|
/*h(15)=4 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 UIMM8()*/ {15, 6797},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=6 EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {12, 6798},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=9 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()*/ {14, 6796},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=11 EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {11, 6800},
|
|
/*h(3)=12 EVV 0x57 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 UIMM8()*/ {3, 7561},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=14 EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 6801}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 15ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x66_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[54] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=13 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {24, 7480},
|
|
/*h(280)=14 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {280, 7482},
|
|
/*h(536)=15 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {536, 7484},
|
|
/*h(25)=16 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {25, 7480},
|
|
/*h(281)=17 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {281, 7482},
|
|
/*h(537)=18 EVV 0x66 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {537, 7484},
|
|
/*h(26)=19 EVV 0x66 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 UIMM8()*/ {26, 7479},
|
|
/*h(282)=20 EVV 0x66 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 UIMM8()*/ {282, 7481},
|
|
/*h(538)=21 EVV 0x66 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 UIMM8()*/ {538, 7483},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=28 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 6179},
|
|
/*h(344)=29 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 6181},
|
|
/*h(600)=30 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 6183},
|
|
/*h(89)=31 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 6179},
|
|
/*h(345)=32 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 6181},
|
|
/*h(601)=33 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 6183},
|
|
/*h(90)=34 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 UIMM8()*/ {90, 6178},
|
|
/*h(346)=35 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=0 UIMM8()*/ {346, 6180},
|
|
/*h(602)=36 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=0 UIMM8()*/ {602, 6182},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=40 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {92, 6173},
|
|
/*h(348)=41 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {348, 6175},
|
|
/*h(604)=42 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {604, 6177},
|
|
/*h(93)=43 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {93, 6173},
|
|
/*h(349)=44 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {349, 6175},
|
|
/*h(605)=45 EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {605, 6177},
|
|
/*h(94)=46 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 UIMM8()*/ {94, 6172},
|
|
/*h(350)=47 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=0 UIMM8()*/ {350, 6174},
|
|
/*h(606)=48 EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=0 UIMM8()*/ {606, 6176},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 59) % 54);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x67_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(26)=0 EVV 0x67 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 UIMM8()*/ {26, 7485},
|
|
/*h(94)=1 EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 UIMM8()*/ {94, 6184},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=4 EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 6187},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=7 EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 UIMM8()*/ {90, 6186},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=9 EVV 0x67 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7486},
|
|
/*h(92)=10 EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {92, 6185},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 12ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x70_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(14)=0 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6922},
|
|
/*h(46)=1 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6924},
|
|
/*h(78)=2 EVV 0x70 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6926},
|
|
/*h(12)=3 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6923},
|
|
/*h(44)=4 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6925},
|
|
/*h(76)=5 EVV 0x70 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6927}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x71_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 6897},
|
|
/*h(76)=1 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 6903},
|
|
/*h(8)=2 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 6893},
|
|
/*h(12)=3 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 6899},
|
|
/*h(41)=4 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 6895},
|
|
/*h(45)=5 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 6901},
|
|
/*h(74)=6 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6896},
|
|
/*h(78)=7 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6902},
|
|
/*h(10)=8 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 6892},
|
|
/*h(14)=9 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6898},
|
|
/*h(40)=10 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 6895},
|
|
/*h(44)=11 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 6901},
|
|
/*h(73)=12 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 6897},
|
|
/*h(77)=13 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 6903},
|
|
/*h(9)=14 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 6893},
|
|
/*h(13)=15 EVV 0x71 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 6899},
|
|
/*h(42)=16 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 6894},
|
|
/*h(46)=17 EVV 0x71 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6900}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x72_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(14)=0 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6958},
|
|
/*h(46)=1 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6960},
|
|
/*h(78)=2 EVV 0x72 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6962},
|
|
/*h(12)=3 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {12, 6959},
|
|
/*h(44)=4 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {44, 6961},
|
|
/*h(76)=5 EVV 0x72 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {76, 6963}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0x73_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 6933},
|
|
/*h(76)=1 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 6939},
|
|
/*h(8)=2 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {8, 6929},
|
|
/*h(12)=3 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 6935},
|
|
/*h(41)=4 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {41, 6931},
|
|
/*h(45)=5 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 6937},
|
|
/*h(74)=6 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {74, 6932},
|
|
/*h(78)=7 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6938},
|
|
/*h(10)=8 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {10, 6928},
|
|
/*h(14)=9 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6934},
|
|
/*h(40)=10 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {40, 6931},
|
|
/*h(44)=11 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 6937},
|
|
/*h(73)=12 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 6933},
|
|
/*h(77)=13 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 6939},
|
|
/*h(9)=14 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {9, 6929},
|
|
/*h(13)=15 EVV 0x73 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 6935},
|
|
/*h(42)=16 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {42, 6930},
|
|
/*h(46)=17 EVV 0x73 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6936}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xc2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {0, 7035},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0xC2 VF3 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7043},
|
|
/*h(32)=4 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {32, 7037},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0xC2 VF3 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7043},
|
|
/*h(64)=8 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {64, 7040},
|
|
/*h(1)=9 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {1, 7035},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0xC2 VF3 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7043},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {33, 7037},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0xC2 VF3 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7043},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0xC2 VNP V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_16_BITS() NELEM_FULL()*/ {65, 7040},
|
|
/*h(2)=18 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {2, 7034},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8()*/ {26, 7041},
|
|
/*h(34)=22 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {34, 7036},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8()*/ {58, 7041},
|
|
/*h(66)=26 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {66, 7038},
|
|
/*h(3)=27 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {3, 7039},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8()*/ {90, 7041},
|
|
/*h(27)=30 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {27, 7042},
|
|
/*h(35)=31 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {35, 7039},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 ZEROING=0 UIMM8()*/ {122, 7041},
|
|
/*h(59)=34 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {59, 7042},
|
|
/*h(67)=35 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {67, 7039},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {91, 7042},
|
|
/*h(99)=39 EVV 0xC2 VNP V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {99, 7039},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0xC2 VF3 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {123, 7042},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xce_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 6975},
|
|
/*h(46)=1 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6972},
|
|
/*h(12)=2 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 6971},
|
|
/*h(77)=3 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 6975},
|
|
/*h(13)=4 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 6971},
|
|
/*h(78)=5 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6974},
|
|
/*h(44)=6 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 6973},
|
|
/*h(14)=7 EVV 0xCE V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6970},
|
|
/*h(45)=8 EVV 0xCE V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 6973}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map3_opcode0xcf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 6969},
|
|
/*h(46)=1 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 6966},
|
|
/*h(12)=2 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 6965},
|
|
/*h(77)=3 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 6969},
|
|
/*h(13)=4 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 6965},
|
|
/*h(78)=5 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 6968},
|
|
/*h(44)=6 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 6967},
|
|
/*h(14)=7 EVV 0xCF V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 6964},
|
|
/*h(45)=8 EVV 0xCF V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 6967}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x10_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=8 EVV 0x10 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 NOEVSR ESIZE_16_BITS() NELEM_SCALAR()*/ {216, 7527},
|
|
/*h(250)=9 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {250, 7529},
|
|
/*h(242)=10 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {242, 7529},
|
|
/*h(234)=11 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {234, 7529},
|
|
/*h(226)=12 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {226, 7529},
|
|
/*h(218)=13 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {218, 7529},
|
|
/*h(210)=14 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {210, 7529},
|
|
/*h(202)=15 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {202, 7529},
|
|
/*h(194)=16 EVV 0x10 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {194, 7529},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x11_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[17] = {
|
|
/*h(202)=0 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {202, 7530},
|
|
/*h(506)=1 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {506, 7530},
|
|
/*h(482)=2 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {482, 7530},
|
|
/*h(458)=3 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {458, 7530},
|
|
/*h(242)=4 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {242, 7530},
|
|
/*h(218)=5 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {218, 7530},
|
|
/*h(194)=6 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {194, 7530},
|
|
/*h(498)=7 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {498, 7530},
|
|
/*h(474)=8 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {474, 7530},
|
|
/*h(450)=9 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {450, 7530},
|
|
/*h(234)=10 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {234, 7530},
|
|
/*h(210)=11 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {210, 7530},
|
|
/*h(216)=12 EVV 0x11 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_SCALAR()*/ {216, 7528},
|
|
/*h(490)=13 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {490, 7530},
|
|
/*h(466)=14 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {466, 7530},
|
|
/*h(250)=15 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {250, 7530},
|
|
/*h(226)=16 EVV 0x11 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {226, 7530}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((20*key % 149) % 17);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x1d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[218] = {
|
|
/*h(0)=0 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {0, 7169},
|
|
/*h(539)=1 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {539, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(787)=3 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {787, 7168},
|
|
/*h(88)=4 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 7118},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=9 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 7118},
|
|
/*h(2)=10 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {2, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=14 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7117},
|
|
/*h(3)=15 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {3, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=19 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {91, 7122},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(48)=22 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {48, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(296)=24 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {296, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(544)=26 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {544, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(792)=28 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {792, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(50)=32 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {50, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(298)=34 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {298, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(546)=36 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {546, 7167},
|
|
/*h(51)=37 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {51, 7168},
|
|
/*h(794)=38 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {794, 7167},
|
|
/*h(299)=39 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {299, 7168},
|
|
/*h(8)=40 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {8, 7169},
|
|
/*h(547)=41 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {547, 7168},
|
|
/*h(256)=42 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {256, 7169},
|
|
/*h(795)=43 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {795, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=46 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 7120},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=50 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7167},
|
|
/*h(345)=51 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 7120},
|
|
/*h(258)=52 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {258, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=55 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7168},
|
|
/*h(346)=56 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7119},
|
|
/*h(259)=57 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {259, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=61 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {347, 7122},
|
|
/*h(56)=62 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(304)=64 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {304, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(552)=66 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {552, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(800)=68 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {800, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=72 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(306)=74 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {306, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(554)=76 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {554, 7167},
|
|
/*h(59)=77 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 7168},
|
|
/*h(802)=78 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {802, 7167},
|
|
/*h(307)=79 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {307, 7168},
|
|
/*h(16)=80 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {16, 7169},
|
|
/*h(555)=81 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {555, 7168},
|
|
/*h(264)=82 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {264, 7169},
|
|
/*h(803)=83 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {803, 7168},
|
|
/*h(512)=84 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {512, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=88 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 7123},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(18)=90 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {18, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(266)=92 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {266, 7167},
|
|
/*h(601)=93 EVV 0x1D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 7123},
|
|
/*h(514)=94 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {514, 7167},
|
|
/*h(19)=95 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {19, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(267)=97 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {267, 7168},
|
|
/*h(602)=98 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7121},
|
|
/*h(515)=99 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {515, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=103 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {603, 7122},
|
|
/*h(312)=104 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {312, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(560)=106 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {560, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(808)=108 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {808, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(314)=114 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {314, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(562)=116 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {562, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(810)=118 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {810, 7167},
|
|
/*h(315)=119 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {315, 7168},
|
|
/*h(24)=120 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 7169},
|
|
/*h(563)=121 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {563, 7168},
|
|
/*h(272)=122 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {272, 7169},
|
|
/*h(811)=123 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {811, 7168},
|
|
/*h(520)=124 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {520, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(768)=126 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {768, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=130 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(274)=132 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {274, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(522)=134 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {522, 7167},
|
|
/*h(27)=135 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7168},
|
|
/*h(770)=136 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {770, 7167},
|
|
/*h(275)=137 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {275, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(523)=139 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {523, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(771)=141 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {771, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(859)=145 EVV 0x1D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {859, 7122},
|
|
/*h(568)=146 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {568, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(816)=148 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {816, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(570)=156 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {570, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(818)=158 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {818, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(32)=160 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {32, 7169},
|
|
/*h(571)=161 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {571, 7168},
|
|
/*h(280)=162 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {280, 7169},
|
|
/*h(819)=163 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {819, 7168},
|
|
/*h(528)=164 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {528, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(776)=166 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {776, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(34)=170 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {34, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(282)=172 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {282, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(530)=174 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {530, 7167},
|
|
/*h(35)=175 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {35, 7168},
|
|
/*h(778)=176 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {778, 7167},
|
|
/*h(283)=177 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {283, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(531)=179 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {531, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(779)=181 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {779, 7168},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(824)=188 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {824, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(826)=198 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {826, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=200 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {40, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(288)=202 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {288, 7169},
|
|
/*h(827)=203 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {827, 7168},
|
|
/*h(536)=204 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {536, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(784)=206 EVV 0x1D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {784, 7169},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=210 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {42, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(290)=212 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {290, 7167},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(538)=214 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {538, 7167},
|
|
/*h(43)=215 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {43, 7168},
|
|
/*h(786)=216 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {786, 7167},
|
|
/*h(291)=217 EVV 0x1D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {291, 7168}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 619) % 218);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[27] = {
|
|
/*h(246)=0 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {246, 7164},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(238)=2 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {238, 7161},
|
|
/*h(230)=3 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {230, 7161},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(214)=7 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {214, 7158},
|
|
/*h(206)=8 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {206, 7161},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(198)=10 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {198, 7161},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(242)=15 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {242, 7166},
|
|
/*h(234)=16 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {234, 7163},
|
|
/*h(247)=17 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {247, 7165},
|
|
/*h(226)=18 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {226, 7163},
|
|
/*h(239)=19 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {239, 7162},
|
|
/*h(231)=20 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {231, 7162},
|
|
/*h(210)=21 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {210, 7160},
|
|
/*h(202)=22 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {202, 7163},
|
|
/*h(215)=23 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {215, 7159},
|
|
/*h(194)=24 EVV 0x2A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {194, 7163},
|
|
/*h(207)=25 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {207, 7162},
|
|
/*h(199)=26 EVV 0x2A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {199, 7162}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 27ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(3522)=0 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3522, 7217},
|
|
/*h(3479)=1 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 7213},
|
|
/*h(3542)=2 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3542, 7218},
|
|
/*h(3530)=3 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3530, 7217},
|
|
/*h(3474)=4 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 7214},
|
|
/*h(3462)=5 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3462, 7215},
|
|
/*h(3463)=6 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3463, 7216},
|
|
/*h(3535)=7 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3535, 7216},
|
|
/*h(3470)=8 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3470, 7215},
|
|
/*h(3458)=9 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3458, 7217},
|
|
/*h(3543)=10 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 7219},
|
|
/*h(3478)=11 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3478, 7212},
|
|
/*h(3466)=12 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3466, 7217},
|
|
/*h(3538)=13 EVV 0x2C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 7220},
|
|
/*h(3526)=14 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3526, 7215},
|
|
/*h(3527)=15 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3527, 7216},
|
|
/*h(3471)=16 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3471, 7216},
|
|
/*h(3534)=17 EVV 0x2C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3534, 7215}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((26*key % 331) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(3522)=0 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3522, 7142},
|
|
/*h(3479)=1 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 7138},
|
|
/*h(3542)=2 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3542, 7143},
|
|
/*h(3530)=3 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3530, 7142},
|
|
/*h(3474)=4 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3474, 7139},
|
|
/*h(3462)=5 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3462, 7140},
|
|
/*h(3463)=6 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3463, 7141},
|
|
/*h(3535)=7 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3535, 7141},
|
|
/*h(3470)=8 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3470, 7140},
|
|
/*h(3458)=9 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3458, 7142},
|
|
/*h(3543)=10 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 7144},
|
|
/*h(3478)=11 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3478, 7137},
|
|
/*h(3466)=12 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3466, 7142},
|
|
/*h(3538)=13 EVV 0x2D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 7145},
|
|
/*h(3526)=14 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3526, 7140},
|
|
/*h(3527)=15 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3527, 7141},
|
|
/*h(3471)=16 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3471, 7141},
|
|
/*h(3534)=17 EVV 0x2D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3534, 7140}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((26*key % 331) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(54)=0 EVV 0x2E VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 MASK=0*/ {54, 7611},
|
|
/*h(55)=1 EVV 0x2E VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 NOEVSR ZEROING=0 MASK=0*/ {55, 7612},
|
|
/*h(50)=2 EVV 0x2E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_SCALAR()*/ {50, 7613}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x2f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(54)=0 EVV 0x2F VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 MASK=0*/ {54, 7044},
|
|
/*h(55)=1 EVV 0x2F VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 NOEVSR ZEROING=0 MASK=0*/ {55, 7045},
|
|
/*h(50)=2 EVV 0x2F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_SCALAR()*/ {50, 7046}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7591}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 26;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24)=0 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {24, 7592},
|
|
/*h(1011)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {1011, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(491)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {491, 7599},
|
|
/*h(25)=1 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {25, 7592}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(282)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7593}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(746)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {746, 7598},
|
|
/*h(280)=1 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {280, 7594}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(192)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {192, 7600},
|
|
/*h(281)=2 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {281, 7594}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(538)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7595}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(27)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7596}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 27;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(283)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7596}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 283;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(539)=0 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {539, 7596},
|
|
/*h(251)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {251, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(706)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {706, 7598},
|
|
/*h(795)=1 EVV 0x51 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {795, 7596},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1002)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {1002, 7598},
|
|
/*h(536)=1 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {536, 7597},
|
|
/*h(248)=2 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {248, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(537)=0 EVV 0x51 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {537, 7597},
|
|
/*h(1003)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {1003, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_97_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(715)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {715, 7599},
|
|
/*h(482)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {482, 7598},
|
|
/*h(194)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {194, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {450, 7598},
|
|
/*h(971)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {971, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(962)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {962, 7598},
|
|
/*h(496)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {496, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(226)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {226, 7598},
|
|
/*h(747)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {747, 7599},
|
|
/*h(459)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {459, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(738)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(240)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {240, 7600},
|
|
/*h(994)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {994, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(210)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {210, 7598},
|
|
/*h(731)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {731, 7599},
|
|
/*h(498)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {498, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(466)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(722)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(978)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {978, 7598},
|
|
/*h(224)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {224, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(763)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {763, 7599},
|
|
/*h(475)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {475, 7599},
|
|
/*h(242)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {242, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(754)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {754, 7598},
|
|
/*h(987)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {987, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
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|
return lu_table[hidx].value;
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|
}
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|
else{
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|
return 0;
|
|
}
|
|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
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|
/*h(1010)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1010;
|
|
if(hidx == 0) {
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|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(490)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {490, 7598},
|
|
/*h(202)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {202, 7598},
|
|
/*h(723)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {723, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(458)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {458, 7598},
|
|
/*h(979)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {979, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(504)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {504, 7600},
|
|
/*h(216)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {216, 7600},
|
|
/*h(970)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {970, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(755)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {755, 7599},
|
|
/*h(467)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {467, 7599},
|
|
/*h(234)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {234, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(451)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {451, 7599},
|
|
/*h(506)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {506, 7598},
|
|
/*h(218)=2 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {218, 7598},
|
|
/*h(739)=3 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {739, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 7) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(474)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {474, 7598},
|
|
/*h(707)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {707, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_17_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(730)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {730, 7598},
|
|
/*h(1018)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {1018, 7598}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(986)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {986, 7598},
|
|
/*h(232)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {232, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(250)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {250, 7598},
|
|
/*h(483)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {483, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {762, 7598},
|
|
/*h(995)=1 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {995, 7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(195)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 195;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(963)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(227)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(211)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 211;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(243)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(499)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(203)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 203;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(235)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(219)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(507)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1019)=0 EVV 0x51 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {7599}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(448)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {448, 7600},
|
|
/*h(736)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {736, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(704)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 704;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(960)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(992)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(208)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(464)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {464, 7600},
|
|
/*h(752)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {752, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(976)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1008)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1008;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(200)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(744)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {744, 7600},
|
|
/*h(456)=1 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {456, 7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(968)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 968;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(488)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1000)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(472)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 472;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(728)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 728;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(984)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 984;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(760)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 760;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1016)=0 EVV 0x51 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7600}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x51_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[109] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map5_opcode0x51_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1000)=3 */ {1000, xed3_phash_find_mapevex_map5_opcode0x51_vv2_3_l1},
|
|
/*h(712)=4 */ {712, xed3_phash_find_mapevex_map5_opcode0x51_vv2_4_l1},
|
|
/*h(746)=5 */ {746, xed3_phash_find_mapevex_map5_opcode0x51_vv2_5_l1},
|
|
/*h(979)=6 */ {979, xed3_phash_find_mapevex_map5_opcode0x51_vv2_6_l1},
|
|
/*h(26)=7 */ {26, xed3_phash_find_mapevex_map5_opcode0x51_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(992)=9 */ {992, xed3_phash_find_mapevex_map5_opcode0x51_vv2_9_l1},
|
|
/*h(704)=10 */ {704, xed3_phash_find_mapevex_map5_opcode0x51_vv2_10_l1},
|
|
/*h(738)=11 */ {738, xed3_phash_find_mapevex_map5_opcode0x51_vv2_11_l1},
|
|
/*h(971)=12 */ {971, xed3_phash_find_mapevex_map5_opcode0x51_vv2_12_l1},
|
|
/*h(251)=13 */ {251, xed3_phash_find_mapevex_map5_opcode0x51_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(984)=15 */ {984, xed3_phash_find_mapevex_map5_opcode0x51_vv2_15_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1018)=17 */ {1018, xed3_phash_find_mapevex_map5_opcode0x51_vv2_17_l1},
|
|
/*h(963)=18 */ {963, xed3_phash_find_mapevex_map5_opcode0x51_vv2_18_l1},
|
|
/*h(243)=19 */ {243, xed3_phash_find_mapevex_map5_opcode0x51_vv2_19_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(976)=21 */ {976, xed3_phash_find_mapevex_map5_opcode0x51_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=23 */ {1010, xed3_phash_find_mapevex_map5_opcode0x51_vv2_23_l1},
|
|
/*h(722)=24 */ {722, xed3_phash_find_mapevex_map5_opcode0x51_vv2_24_l1},
|
|
/*h(235)=25 */ {235, xed3_phash_find_mapevex_map5_opcode0x51_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(968)=28 */ {968, xed3_phash_find_mapevex_map5_opcode0x51_vv2_28_l1},
|
|
/*h(248)=29 */ {248, xed3_phash_find_mapevex_map5_opcode0x51_vv2_29_l1},
|
|
/*h(714)=30 */ {714, xed3_phash_find_mapevex_map5_opcode0x51_vv2_30_l1},
|
|
/*h(282)=31 */ {282, xed3_phash_find_mapevex_map5_opcode0x51_vv2_31_l1},
|
|
/*h(227)=32 */ {227, xed3_phash_find_mapevex_map5_opcode0x51_vv2_32_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(960)=34 */ {960, xed3_phash_find_mapevex_map5_opcode0x51_vv2_34_l1},
|
|
/*h(240)=35 */ {240, xed3_phash_find_mapevex_map5_opcode0x51_vv2_35_l1},
|
|
/*h(706)=36 */ {706, xed3_phash_find_mapevex_map5_opcode0x51_vv2_36_l1},
|
|
/*h(507)=37 */ {507, xed3_phash_find_mapevex_map5_opcode0x51_vv2_37_l1},
|
|
/*h(219)=38 */ {219, xed3_phash_find_mapevex_map5_opcode0x51_vv2_38_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(232)=41 */ {232, xed3_phash_find_mapevex_map5_opcode0x51_vv2_41_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(499)=43 */ {499, xed3_phash_find_mapevex_map5_opcode0x51_vv2_43_l1},
|
|
/*h(211)=44 */ {211, xed3_phash_find_mapevex_map5_opcode0x51_vv2_44_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(224)=47 */ {224, xed3_phash_find_mapevex_map5_opcode0x51_vv2_47_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(491)=49 */ {491, xed3_phash_find_mapevex_map5_opcode0x51_vv2_49_l1},
|
|
/*h(203)=50 */ {203, xed3_phash_find_mapevex_map5_opcode0x51_vv2_50_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(504)=53 */ {504, xed3_phash_find_mapevex_map5_opcode0x51_vv2_53_l1},
|
|
/*h(538)=54 */ {538, xed3_phash_find_mapevex_map5_opcode0x51_vv2_54_l1},
|
|
/*h(483)=55 */ {483, xed3_phash_find_mapevex_map5_opcode0x51_vv2_55_l1},
|
|
/*h(195)=56 */ {195, xed3_phash_find_mapevex_map5_opcode0x51_vv2_56_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(496)=59 */ {496, xed3_phash_find_mapevex_map5_opcode0x51_vv2_59_l1},
|
|
/*h(208)=60 */ {208, xed3_phash_find_mapevex_map5_opcode0x51_vv2_60_l1},
|
|
/*h(763)=61 */ {763, xed3_phash_find_mapevex_map5_opcode0x51_vv2_61_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(488)=65 */ {488, xed3_phash_find_mapevex_map5_opcode0x51_vv2_65_l1},
|
|
/*h(200)=66 */ {200, xed3_phash_find_mapevex_map5_opcode0x51_vv2_66_l1},
|
|
/*h(755)=67 */ {755, xed3_phash_find_mapevex_map5_opcode0x51_vv2_67_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(480)=71 */ {480, xed3_phash_find_mapevex_map5_opcode0x51_vv2_71_l1},
|
|
/*h(192)=72 */ {192, xed3_phash_find_mapevex_map5_opcode0x51_vv2_72_l1},
|
|
/*h(747)=73 */ {747, xed3_phash_find_mapevex_map5_opcode0x51_vv2_73_l1},
|
|
/*h(27)=74 */ {27, xed3_phash_find_mapevex_map5_opcode0x51_vv2_74_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(760)=76 */ {760, xed3_phash_find_mapevex_map5_opcode0x51_vv2_76_l1},
|
|
/*h(472)=77 */ {472, xed3_phash_find_mapevex_map5_opcode0x51_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(739)=79 */ {739, xed3_phash_find_mapevex_map5_opcode0x51_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(752)=83 */ {752, xed3_phash_find_mapevex_map5_opcode0x51_vv2_83_l1},
|
|
/*h(1019)=84 */ {1019, xed3_phash_find_mapevex_map5_opcode0x51_vv2_84_l1},
|
|
/*h(731)=85 */ {731, xed3_phash_find_mapevex_map5_opcode0x51_vv2_85_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(744)=89 */ {744, xed3_phash_find_mapevex_map5_opcode0x51_vv2_89_l1},
|
|
/*h(1011)=90 */ {1011, xed3_phash_find_mapevex_map5_opcode0x51_vv2_90_l1},
|
|
/*h(723)=91 */ {723, xed3_phash_find_mapevex_map5_opcode0x51_vv2_91_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(736)=95 */ {736, xed3_phash_find_mapevex_map5_opcode0x51_vv2_95_l1},
|
|
/*h(1003)=96 */ {1003, xed3_phash_find_mapevex_map5_opcode0x51_vv2_96_l1},
|
|
/*h(715)=97 */ {715, xed3_phash_find_mapevex_map5_opcode0x51_vv2_97_l1},
|
|
/*h(283)=98 */ {283, xed3_phash_find_mapevex_map5_opcode0x51_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1016)=100 */ {1016, xed3_phash_find_mapevex_map5_opcode0x51_vv2_100_l1},
|
|
/*h(728)=101 */ {728, xed3_phash_find_mapevex_map5_opcode0x51_vv2_101_l1},
|
|
/*h(995)=102 */ {995, xed3_phash_find_mapevex_map5_opcode0x51_vv2_102_l1},
|
|
/*h(707)=103 */ {707, xed3_phash_find_mapevex_map5_opcode0x51_vv2_103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1008)=106 */ {1008, xed3_phash_find_mapevex_map5_opcode0x51_vv2_106_l1},
|
|
/*h(720)=107 */ {720, xed3_phash_find_mapevex_map5_opcode0x51_vv2_107_l1},
|
|
/*h(987)=108 */ {987, xed3_phash_find_mapevex_map5_opcode0x51_vv2_108_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 109ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x58_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7025},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x58 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7033},
|
|
/*h(32)=4 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7027},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x58 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7033},
|
|
/*h(64)=8 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7030},
|
|
/*h(1)=9 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7025},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x58 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7033},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7027},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x58 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7033},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x58 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7030},
|
|
/*h(2)=18 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7024},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7031},
|
|
/*h(34)=22 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7026},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7031},
|
|
/*h(66)=26 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7028},
|
|
/*h(3)=27 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 7029},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7031},
|
|
/*h(27)=30 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7032},
|
|
/*h(35)=31 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 7029},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7031},
|
|
/*h(59)=34 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 7032},
|
|
/*h(67)=35 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 7029},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 7032},
|
|
/*h(99)=39 EVV 0x58 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 7029},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x58 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 7032},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x59_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7536},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x59 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7544},
|
|
/*h(32)=4 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7538},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x59 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7544},
|
|
/*h(64)=8 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7541},
|
|
/*h(1)=9 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7536},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x59 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7544},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7538},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x59 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7544},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x59 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7541},
|
|
/*h(2)=18 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7535},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7542},
|
|
/*h(34)=22 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7537},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7542},
|
|
/*h(66)=26 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7539},
|
|
/*h(3)=27 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 7540},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7542},
|
|
/*h(27)=30 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7543},
|
|
/*h(35)=31 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 7540},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7542},
|
|
/*h(59)=34 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 7543},
|
|
/*h(67)=35 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 7540},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 7543},
|
|
/*h(99)=39 EVV 0x59 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 7540},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x59 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 7543},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(704)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {704, 7136},
|
|
/*h(94)=1 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 7054}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(935)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {935, 7132},
|
|
/*h(92)=1 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 7055},
|
|
/*h(702)=2 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {702, 7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(93)=0 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 7055},
|
|
/*h(703)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {703, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(350)=0 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {7056}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(348)=0 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 7057},
|
|
/*h(958)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {958, 7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(959)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {959, 7132},
|
|
/*h(349)=1 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 7057}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(606)=0 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {7058}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(472)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {472, 7136},
|
|
/*h(95)=1 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {95, 7059}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(728)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {728, 7136},
|
|
/*h(351)=1 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {351, 7059}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(984)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {984, 7136},
|
|
/*h(607)=1 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {607, 7059}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(863)=0 EVV 0x5A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {7059}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(604)=0 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {7060}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(605)=0 EVV 0x5A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {7060}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 605;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26)=0 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7068}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 26;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {24, 7069},
|
|
/*h(1011)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {1011, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7069}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 25;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(282)=0 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(280)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 280;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(281)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 281;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(538)=0 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(404)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {404, 7133},
|
|
/*h(27)=1 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {27, 7073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(660)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {660, 7133},
|
|
/*h(283)=1 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {283, 7073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(539)=0 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(795)=0 EVV 0x5A VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(536)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {536, 7074},
|
|
/*h(1002)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {1002, 7134},
|
|
/*h(159)=2 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {159, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(537)=0 EVV 0x5A VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 537;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(744)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {744, 7136},
|
|
/*h(134)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {134, 7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(390)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {390, 7131},
|
|
/*h(1000)=1 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {1000, 7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(646)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(902)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(166)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {166, 7131},
|
|
/*h(399)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {399, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(422)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 422;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(678)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(180)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {180, 7133},
|
|
/*h(934)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {934, 7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(150)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {150, 7131},
|
|
/*h(760)=1 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {760, 7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(406)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {406, 7131},
|
|
/*h(927)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {927, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(662)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(918)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {918, 7131},
|
|
/*h(164)=1 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {164, 7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(182)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {182, 7131},
|
|
/*h(415)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {415, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(438)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {438, 7131},
|
|
/*h(671)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {671, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(694)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(142)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1008)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {1008, 7136},
|
|
/*h(398)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {398, 7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(654)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(910)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(174)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {174, 7131},
|
|
/*h(407)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {407, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {430, 7131},
|
|
/*h(663)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {663, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(686)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(942)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(158)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {158, 7131},
|
|
/*h(391)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {391, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(414)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(670)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {670, 7131},
|
|
/*h(903)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {903, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(926)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {926, 7131},
|
|
/*h(172)=1 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {172, 7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(190)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {7131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(446)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1*/ {446, 7131},
|
|
/*h(679)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {679, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(135)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(647)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1010)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {1010, 7134},
|
|
/*h(167)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {167, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(151)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 151;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(919)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 919;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(183)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 183;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(439)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(695)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(951)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(143)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 143;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(655)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(911)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(175)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 175;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(431)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 431;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(687)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(943)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(191)=0 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 191;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(968)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {968, 7136},
|
|
/*h(447)=1 EVV 0x5A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {447, 7132}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(132)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 132;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(388)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 388;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(644)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(900)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 900;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(420)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 420;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(676)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 676;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(932)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(148)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 148;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {450, 7134},
|
|
/*h(916)=1 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {916, 7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(436)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {436, 7133},
|
|
/*h(203)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {203, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(692)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 692;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(948)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {948, 7133},
|
|
/*h(194)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {194, 7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(140)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 140;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(396)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 396;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(652)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(908)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(428)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 428;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(684)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 684;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(940)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {940, 7133},
|
|
/*h(707)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {707, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(156)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 156;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(412)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 412;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(668)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 668;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(924)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(188)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {7133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 188;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(444)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {444, 7133},
|
|
/*h(211)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {211, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(234)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {234, 7134},
|
|
/*h(700)=1 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {700, 7133},
|
|
/*h(467)=2 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {467, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(956)=0 EVV 0x5A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {956, 7133},
|
|
/*h(202)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {202, 7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(706)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(962)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(226)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {226, 7134},
|
|
/*h(459)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {459, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(482)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {482, 7134},
|
|
/*h(715)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {715, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(738)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(240)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {240, 7136},
|
|
/*h(994)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {994, 7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(210)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(466)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(722)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(978)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {978, 7134},
|
|
/*h(224)=1 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {224, 7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(242)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {242, 7134},
|
|
/*h(475)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {475, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(498)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {498, 7134},
|
|
/*h(731)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {731, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(754)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {754, 7134},
|
|
/*h(987)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {987, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(458)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {458, 7134},
|
|
/*h(979)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {979, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(216)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {216, 7136},
|
|
/*h(970)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {970, 7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(490)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {490, 7134},
|
|
/*h(723)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {723, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(746)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(218)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {218, 7134},
|
|
/*h(451)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {451, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(474)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(730)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(986)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {986, 7134},
|
|
/*h(232)=1 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {232, 7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(250)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(506)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {506, 7134},
|
|
/*h(739)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {739, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {762, 7134},
|
|
/*h(995)=1 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {995, 7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1018)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {7134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(195)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 195;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(963)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(227)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(483)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 483;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(243)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(499)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(755)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(971)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 971;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(235)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(491)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 491;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(747)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 747;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1003)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(219)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(251)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 251;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(507)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(763)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 763;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1019)=0 EVV 0x5A VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {7135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(192)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 192;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(448)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(960)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(736)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 736;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(992)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(208)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(464)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 464;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(976)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(496)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 496;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(752)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(200)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(456)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(488)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(248)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(504)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 504;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1016)=0 EVV 0x5A VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {7136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[218] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_0_l1},
|
|
/*h(932)=1 */ {932, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_1_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(644)=3 */ {644, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(678)=5 */ {678, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_5_l1},
|
|
/*h(911)=6 */ {911, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_6_l1},
|
|
/*h(1000)=7 */ {1000, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_7_l1},
|
|
/*h(712)=8 */ {712, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_8_l1},
|
|
/*h(191)=9 */ {191, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_9_l1},
|
|
/*h(280)=10 */ {280, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_10_l1},
|
|
/*h(746)=11 */ {746, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_11_l1},
|
|
/*h(979)=12 */ {979, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_12_l1},
|
|
/*h(924)=13 */ {924, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26)=15 */ {26, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_15_l1},
|
|
/*h(958)=16 */ {958, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(903)=18 */ {903, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_18_l1},
|
|
/*h(992)=19 */ {992, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_19_l1},
|
|
/*h(704)=20 */ {704, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_20_l1},
|
|
/*h(183)=21 */ {183, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(738)=23 */ {738, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_23_l1},
|
|
/*h(971)=24 */ {971, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_24_l1},
|
|
/*h(450)=25 */ {450, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_25_l1},
|
|
/*h(539)=26 */ {539, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_26_l1},
|
|
/*h(251)=27 */ {251, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_27_l1},
|
|
/*h(950)=28 */ {950, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(662)=30 */ {662, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_30_l1},
|
|
/*h(984)=31 */ {984, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_31_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(175)=33 */ {175, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_33_l1},
|
|
/*h(1018)=34 */ {1018, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_34_l1},
|
|
/*h(730)=35 */ {730, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_35_l1},
|
|
/*h(963)=36 */ {963, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(908)=38 */ {908, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_38_l1},
|
|
/*h(243)=39 */ {243, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_39_l1},
|
|
/*h(942)=40 */ {942, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_40_l1},
|
|
/*h(188)=41 */ {188, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_41_l1},
|
|
/*h(654)=42 */ {654, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_42_l1},
|
|
/*h(976)=43 */ {976, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=46 */ {1010, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_46_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(722)=48 */ {722, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(900)=50 */ {900, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_50_l1},
|
|
/*h(235)=51 */ {235, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_51_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(180)=53 */ {180, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_53_l1},
|
|
/*h(646)=54 */ {646, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_54_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(968)=56 */ {968, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_56_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1002)=58 */ {1002, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_58_l1},
|
|
/*h(248)=59 */ {248, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_59_l1},
|
|
/*h(714)=60 */ {714, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(282)=62 */ {282, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_62_l1},
|
|
/*h(604)=63 */ {604, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_63_l1},
|
|
/*h(227)=64 */ {227, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_64_l1},
|
|
/*h(172)=65 */ {172, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_65_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(350)=67 */ {350, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_67_l1},
|
|
/*h(960)=68 */ {960, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_68_l1},
|
|
/*h(439)=69 */ {439, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_69_l1},
|
|
/*h(151)=70 */ {151, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_70_l1},
|
|
/*h(240)=71 */ {240, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_71_l1},
|
|
/*h(706)=72 */ {706, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_72_l1},
|
|
/*h(795)=73 */ {795, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_73_l1},
|
|
/*h(507)=74 */ {507, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_74_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(219)=76 */ {219, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_76_l1},
|
|
/*h(164)=77 */ {164, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(863)=79 */ {863, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(431)=81 */ {431, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_81_l1},
|
|
/*h(143)=82 */ {143, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_82_l1},
|
|
/*h(232)=83 */ {232, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_83_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(499)=86 */ {499, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(211)=88 */ {211, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_88_l1},
|
|
/*h(910)=89 */ {910, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_89_l1},
|
|
/*h(156)=90 */ {156, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_90_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(190)=92 */ {190, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_92_l1},
|
|
/*h(423)=93 */ {423, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_93_l1},
|
|
/*h(135)=94 */ {135, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_94_l1},
|
|
/*h(224)=95 */ {224, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25)=98 */ {25, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_98_l1},
|
|
/*h(491)=99 */ {491, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_99_l1},
|
|
/*h(203)=100 */ {203, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_100_l1},
|
|
/*h(902)=101 */ {902, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_101_l1},
|
|
/*h(148)=102 */ {148, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_102_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(703)=104 */ {703, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_104_l1},
|
|
/*h(415)=105 */ {415, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_105_l1},
|
|
/*h(504)=106 */ {504, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_106_l1},
|
|
/*h(216)=107 */ {216, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_107_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(538)=109 */ {538, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_109_l1},
|
|
/*h(250)=110 */ {250, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_110_l1},
|
|
/*h(483)=111 */ {483, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_111_l1},
|
|
/*h(195)=112 */ {195, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_112_l1},
|
|
/*h(428)=113 */ {428, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_113_l1},
|
|
/*h(140)=114 */ {140, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_114_l1},
|
|
/*h(606)=115 */ {606, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_115_l1},
|
|
/*h(695)=116 */ {695, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_116_l1},
|
|
/*h(407)=117 */ {407, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_117_l1},
|
|
/*h(496)=118 */ {496, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_118_l1},
|
|
/*h(962)=119 */ {962, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_119_l1},
|
|
/*h(208)=120 */ {208, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(763)=122 */ {763, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_122_l1},
|
|
/*h(475)=123 */ {475, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_123_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(420)=125 */ {420, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_125_l1},
|
|
/*h(132)=126 */ {132, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_126_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(687)=128 */ {687, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_128_l1},
|
|
/*h(399)=129 */ {399, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_129_l1},
|
|
/*h(488)=130 */ {488, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(200)=132 */ {200, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(755)=134 */ {755, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_134_l1},
|
|
/*h(467)=135 */ {467, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_135_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(412)=137 */ {412, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(679)=140 */ {679, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_140_l1},
|
|
/*h(391)=141 */ {391, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_141_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(480)=143 */ {480, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_143_l1},
|
|
/*h(192)=144 */ {192, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_144_l1},
|
|
/*h(281)=145 */ {281, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_145_l1},
|
|
/*h(747)=146 */ {747, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_146_l1},
|
|
/*h(459)=147 */ {459, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_147_l1},
|
|
/*h(692)=148 */ {692, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_148_l1},
|
|
/*h(404)=149 */ {404, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_149_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(959)=151 */ {959, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_151_l1},
|
|
/*h(671)=152 */ {671, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_152_l1},
|
|
/*h(760)=153 */ {760, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_153_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(472)=155 */ {472, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(739)=158 */ {739, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_158_l1},
|
|
/*h(451)=159 */ {451, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_159_l1},
|
|
/*h(684)=160 */ {684, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_160_l1},
|
|
/*h(396)=161 */ {396, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(951)=163 */ {951, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_163_l1},
|
|
/*h(663)=164 */ {663, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_164_l1},
|
|
/*h(142)=165 */ {142, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_165_l1},
|
|
/*h(752)=166 */ {752, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_166_l1},
|
|
/*h(464)=167 */ {464, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1019)=169 */ {1019, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_169_l1},
|
|
/*h(731)=170 */ {731, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_170_l1},
|
|
/*h(210)=171 */ {210, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_171_l1},
|
|
/*h(676)=172 */ {676, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_172_l1},
|
|
/*h(388)=173 */ {388, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(943)=175 */ {943, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_175_l1},
|
|
/*h(422)=176 */ {422, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_176_l1},
|
|
/*h(655)=177 */ {655, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_177_l1},
|
|
/*h(744)=178 */ {744, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_178_l1},
|
|
/*h(456)=179 */ {456, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_179_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1011)=181 */ {1011, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_181_l1},
|
|
/*h(723)=182 */ {723, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_182_l1},
|
|
/*h(202)=183 */ {202, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_183_l1},
|
|
/*h(668)=184 */ {668, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(935)=187 */ {935, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_187_l1},
|
|
/*h(414)=188 */ {414, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_188_l1},
|
|
/*h(647)=189 */ {647, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_189_l1},
|
|
/*h(736)=190 */ {736, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_190_l1},
|
|
/*h(448)=191 */ {448, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_191_l1},
|
|
/*h(537)=192 */ {537, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_192_l1},
|
|
/*h(1003)=193 */ {1003, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_193_l1},
|
|
/*h(715)=194 */ {715, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_194_l1},
|
|
/*h(194)=195 */ {194, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_195_l1},
|
|
/*h(660)=196 */ {660, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_196_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(605)=198 */ {605, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_198_l1},
|
|
/*h(694)=199 */ {694, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_199_l1},
|
|
/*h(927)=200 */ {927, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_200_l1},
|
|
/*h(1016)=201 */ {1016, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_201_l1},
|
|
/*h(728)=202 */ {728, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(995)=205 */ {995, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_205_l1},
|
|
/*h(474)=206 */ {474, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_206_l1},
|
|
/*h(707)=207 */ {707, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_207_l1},
|
|
/*h(652)=208 */ {652, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(686)=211 */ {686, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_211_l1},
|
|
/*h(919)=212 */ {919, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_212_l1},
|
|
/*h(1008)=213 */ {1008, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_213_l1},
|
|
/*h(720)=214 */ {720, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_214_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(987)=217 */ {987, xed3_phash_find_mapevex_map5_opcode0x5a_vv2_217_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 218ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[104] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(29)=1 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {29, 7125},
|
|
/*h(602)=2 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7065},
|
|
/*h(30)=3 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {30, 7124},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(537)=6 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {537, 7053},
|
|
/*h(89)=7 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {89, 7062},
|
|
/*h(538)=8 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 7051},
|
|
/*h(90)=9 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7061},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(473)=12 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {473, 7173},
|
|
/*h(25)=13 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25, 7048},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(284)=16 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {284, 7127},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(543)=19 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {543, 7129},
|
|
/*h(219)=20 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {219, 7175},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=22 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {344, 7064},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=25 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {603, 7066},
|
|
/*h(31)=26 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {31, 7129},
|
|
/*h(728)=27 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {728, 7176},
|
|
/*h(280)=28 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {280, 7050},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(987)=30 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {987, 7175},
|
|
/*h(539)=31 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {539, 7052},
|
|
/*h(91)=32 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {91, 7066},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=35 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 7172},
|
|
/*h(26)=36 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 7047},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(285)=39 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {285, 7127},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=45 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {345, 7064},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(729)=50 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {729, 7176},
|
|
/*h(281)=51 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {281, 7050},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(540)=54 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {540, 7130},
|
|
/*h(216)=55 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {216, 7171},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(799)=57 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {799, 7129},
|
|
/*h(475)=58 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {475, 7175},
|
|
/*h(27)=59 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {27, 7052},
|
|
/*h(600)=60 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {600, 7067},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(286)=62 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {286, 7126},
|
|
/*h(859)=63 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {859, 7066},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=68 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7063},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=73 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 7174},
|
|
/*h(282)=74 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 7049},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(541)=77 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {541, 7130},
|
|
/*h(217)=78 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {217, 7171},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(28)=82 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {28, 7125},
|
|
/*h(601)=83 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {601, 7067},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(287)=85 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {287, 7129},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(536)=87 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {536, 7053},
|
|
/*h(88)=88 EVV 0x5B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {88, 7062},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(795)=90 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {795, 7052},
|
|
/*h(347)=91 EVV 0x5B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {347, 7066},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=93 EVV 0x5B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {472, 7173},
|
|
/*h(24)=94 EVV 0x5B VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24, 7048},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(731)=96 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {731, 7175},
|
|
/*h(283)=97 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {283, 7052},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(542)=100 EVV 0x5B VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {542, 7128},
|
|
/*h(218)=101 EVV 0x5B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 7170},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((23*key % 229) % 104);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7602},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x5C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7610},
|
|
/*h(32)=4 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7604},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x5C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7610},
|
|
/*h(64)=8 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7607},
|
|
/*h(1)=9 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7602},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x5C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7610},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7604},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x5C VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7610},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x5C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7607},
|
|
/*h(2)=18 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7601},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7608},
|
|
/*h(34)=22 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7603},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7608},
|
|
/*h(66)=26 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7605},
|
|
/*h(3)=27 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 7606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7608},
|
|
/*h(27)=30 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7609},
|
|
/*h(35)=31 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 7606},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7608},
|
|
/*h(59)=34 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 7609},
|
|
/*h(67)=35 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 7606},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 7609},
|
|
/*h(99)=39 EVV 0x5C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 7606},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x5C VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 7609},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7518},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x5D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7526},
|
|
/*h(32)=4 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7520},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x5D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7526},
|
|
/*h(64)=8 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7523},
|
|
/*h(1)=9 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7518},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x5D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7526},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7520},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x5D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7526},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x5D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7523},
|
|
/*h(2)=18 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7517},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7524},
|
|
/*h(34)=22 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7519},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7524},
|
|
/*h(66)=26 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7521},
|
|
/*h(3)=27 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {3, 7522},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7524},
|
|
/*h(27)=30 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {27, 7525},
|
|
/*h(35)=31 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {35, 7522},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7524},
|
|
/*h(59)=34 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {59, 7525},
|
|
/*h(67)=35 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {67, 7522},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {91, 7525},
|
|
/*h(99)=39 EVV 0x5D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {99, 7522},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x5D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {123, 7525},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7268},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x5E VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7276},
|
|
/*h(32)=4 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7270},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x5E VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7276},
|
|
/*h(64)=8 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7273},
|
|
/*h(1)=9 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7268},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x5E VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7276},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7270},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x5E VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7276},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x5E VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7273},
|
|
/*h(2)=18 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7267},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7274},
|
|
/*h(34)=22 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7269},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7274},
|
|
/*h(66)=26 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7271},
|
|
/*h(3)=27 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 7272},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7274},
|
|
/*h(27)=30 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7275},
|
|
/*h(35)=31 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 7272},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7274},
|
|
/*h(59)=34 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 7275},
|
|
/*h(67)=35 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 7272},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 7275},
|
|
/*h(99)=39 EVV 0x5E VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 7272},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x5E VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 7275},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x5f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[50] = {
|
|
/*h(0)=0 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {0, 7508},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=3 EVV 0x5F VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7516},
|
|
/*h(32)=4 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {32, 7510},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=7 EVV 0x5F VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7516},
|
|
/*h(64)=8 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {64, 7513},
|
|
/*h(1)=9 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {1, 7508},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=11 EVV 0x5F VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {88, 7516},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=13 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {33, 7510},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(120)=15 EVV 0x5F VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {120, 7516},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=17 EVV 0x5F VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {65, 7513},
|
|
/*h(2)=18 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 7507},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=21 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7514},
|
|
/*h(34)=22 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 7509},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=25 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7514},
|
|
/*h(66)=26 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 7511},
|
|
/*h(3)=27 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {3, 7512},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=29 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {90, 7514},
|
|
/*h(27)=30 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {27, 7515},
|
|
/*h(35)=31 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {35, 7512},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=33 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {122, 7514},
|
|
/*h(59)=34 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {59, 7515},
|
|
/*h(67)=35 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {67, 7512},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {91, 7515},
|
|
/*h(99)=39 EVV 0x5F VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {99, 7512},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=42 EVV 0x5F VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {123, 7515},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 71) % 50);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x6e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(94)=0 EVV 0x6E V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0*/ {94, 7531},
|
|
/*h(90)=1 EVV 0x6E V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_READER()*/ {90, 7532}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5556)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5556, 7193},
|
|
/*h(388)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {388, 7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16772)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16772, 7184},
|
|
/*h(21940)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21940, 7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_399_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(420)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {420, 7184},
|
|
/*h(29077)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29077, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16804)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_516_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(396)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {396, 7184},
|
|
/*h(21911)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21911, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16780)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16780;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7570)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7570, 7223},
|
|
/*h(1415)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1415, 7196},
|
|
/*h(428)=2 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {428, 7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16812)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16812, 7184},
|
|
/*h(17799)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17799, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(404)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {404, 7184},
|
|
/*h(29061)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29061, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16788)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16788, 7184},
|
|
/*h(9646)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9646, 7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(436)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 7184},
|
|
/*h(29093)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29093, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16820)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16820, 7184},
|
|
/*h(17807)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17807, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(390)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 390;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21942)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21942, 7193},
|
|
/*h(16774)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16774, 7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_563_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(422)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {422, 7184},
|
|
/*h(1409)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1409, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16806)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16806, 7184},
|
|
/*h(17793)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17793, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(398)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 398;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_589_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16782)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16782, 7184},
|
|
/*h(9640)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9640, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(430)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 430;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16814)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16814, 7184},
|
|
/*h(17801)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17801, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_641_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(406)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {406, 7184},
|
|
/*h(29063)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29063, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_550_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16790)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16790;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29095)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29095, 7189},
|
|
/*h(1425)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1425, 7192},
|
|
/*h(438)=2 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11654)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11654, 7224},
|
|
/*h(16822)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16822, 7184}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_226_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(384)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 384;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21936)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21936, 7194},
|
|
/*h(16768)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16768, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(416)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {416, 7185},
|
|
/*h(21931)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21931, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16800)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(392)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 392;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16776)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16776;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(424)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16808)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16808;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(400)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 400;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16784)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16784;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_689_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(432)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {432, 7185},
|
|
/*h(1419)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1419, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_598_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16816)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16816;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(386)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {386, 7185},
|
|
/*h(5554)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5554, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_299_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16770)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16770, 7185},
|
|
/*h(21938)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21938, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(418)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 418;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16802)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16802, 7185},
|
|
/*h(15815)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15815, 7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(394)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 394;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_260_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16778)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(426)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {426, 7185},
|
|
/*h(1413)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1413, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16810)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16810, 7185},
|
|
/*h(15823)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15823, 7225},
|
|
/*h(17797)=2 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17797, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(402)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 402;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_221_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16786)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(434)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {434, 7185},
|
|
/*h(1421)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1421, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(17805)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17805, 7196},
|
|
/*h(11650)=1 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11650, 7226},
|
|
/*h(16818)=2 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16818, 7185},
|
|
/*h(15831)=3 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15831, 7228}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5553)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5553, 7194},
|
|
/*h(385)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {385, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_565_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16769)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16769;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_501_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(417)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 417;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16801)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16801;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(393)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 393;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_526_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16777)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16777;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1412)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1412, 7191},
|
|
/*h(425)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {425, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15822)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15822, 7224},
|
|
/*h(16809)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16809, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(401)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 401;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_487_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16785)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16785;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1420)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1420, 7191},
|
|
/*h(433)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {433, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(15830)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15830, 7227},
|
|
/*h(16817)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16817, 7185},
|
|
/*h(17804)=2 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17804, 7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(387)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {387, 7185},
|
|
/*h(5555)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5555, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21939)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21939, 7194},
|
|
/*h(16771)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16771, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_665_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(419)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 419;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16803)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11718)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11718, 7224},
|
|
/*h(395)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {395, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_690_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16779)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16779;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_626_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1414)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1414, 7191},
|
|
/*h(427)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {427, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17798)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17798, 7191},
|
|
/*h(16811)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16811, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(403)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 403;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16787)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16787;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_587_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1422)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1422, 7191},
|
|
/*h(435)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {435, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17806)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17806, 7191},
|
|
/*h(16819)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16819, 7185}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4484)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4484, 7186},
|
|
/*h(25999)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25999, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20868)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20868, 7186},
|
|
/*h(26036)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26036, 7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11658)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11658, 7226},
|
|
/*h(4516)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4516, 7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_633_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20900)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20900;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4492)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4492;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20876)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20876, 7186},
|
|
/*h(3542)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3542, 7227}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4524)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4524, 7186},
|
|
/*h(26039)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26039, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_594_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20908)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20908, 7186},
|
|
/*h(21895)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21895, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4500)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4500;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20884)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20884;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_647_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4532)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4532;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20916)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20916;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9654)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9654, 7195},
|
|
/*h(4486)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4486, 7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20870)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4518)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20902)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20902, 7186},
|
|
/*h(21889)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21889, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4494)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20878)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4526)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4526, 7186},
|
|
/*h(5513)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5513, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20910)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4502)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20886)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20886;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4534)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4534, 7186},
|
|
/*h(5521)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5521, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21905)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21905, 7194},
|
|
/*h(15750)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15750, 7224},
|
|
/*h(20918)=2 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20918, 7186}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9648)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9648, 7197},
|
|
/*h(4480)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4480, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20864)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20864;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4512)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20896)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4488)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20872)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4520)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4520, 7187},
|
|
/*h(5507)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5507, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20904)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4496)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4496;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20880)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20880;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4528)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4528, 7187},
|
|
/*h(5515)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5515, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20912)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20912, 7187},
|
|
/*h(21899)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21899, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4482)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4482, 7187},
|
|
/*h(9650)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9650, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_624_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26034)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26034, 7197},
|
|
/*h(20866)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20866, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4514)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4514, 7187},
|
|
/*h(3527)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3527, 7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20898)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4490)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4490;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20874)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4522)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4522, 7187},
|
|
/*h(5509)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5509, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20906)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20906, 7187},
|
|
/*h(21893)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21893, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_638_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4498)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20882)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20882;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4530)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4530, 7187},
|
|
/*h(3543)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 7228}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21901)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21901, 7196},
|
|
/*h(20914)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20914, 7187},
|
|
/*h(15746)=2 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15746, 7226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4481)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4481, 7187},
|
|
/*h(9649)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9649, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20865)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20865, 7187},
|
|
/*h(26033)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26033, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3526)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3526, 7224},
|
|
/*h(4513)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4513, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20897)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4489)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20873)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4521)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4521, 7187},
|
|
/*h(5508)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5508, 7193},
|
|
/*h(3534)=2 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3534, 7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21892)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21892, 7193},
|
|
/*h(20905)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20905, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4497)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4497;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20881)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20881;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5516)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5516, 7193},
|
|
/*h(4529)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4529, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21900)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21900, 7193},
|
|
/*h(20913)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20913, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_449_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9651)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9651, 7197},
|
|
/*h(4483)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4483, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20867)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20867, 7187},
|
|
/*h(26035)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26035, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_294_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4515)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4515;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20899)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20899;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_411_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26006)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26006, 7195},
|
|
/*h(4491)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4491, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20875)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5510)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5510, 7193},
|
|
/*h(4523)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4523, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21894)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21894, 7193},
|
|
/*h(20907)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20907, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4499)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20883)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20883, 7187},
|
|
/*h(13741)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13741, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4531)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4531;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21902)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21902, 7193},
|
|
/*h(20915)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20915, 7187}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_509_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8580)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8580;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7630)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7630, 7224},
|
|
/*h(24964)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24964, 7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8612)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8612, 7188},
|
|
/*h(30127)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30127, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_262_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24996)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8588)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8588;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24972)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24972;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8620)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25004)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8596)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24980)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24980;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8628)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8628, 7188},
|
|
/*h(9615)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9615, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25012)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25012;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8582)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_582_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24966)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24966;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8614)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8614, 7188},
|
|
/*h(9601)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9601, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24998)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8590)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_543_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24974)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_479_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8622)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8622, 7188},
|
|
/*h(9609)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9609, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25006)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8598)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_504_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24982)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7188}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24982;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_440_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8630)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8630, 7188},
|
|
/*h(9617)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9617, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25014)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25014, 7188},
|
|
/*h(26001)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26001, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(389)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {389, 7189},
|
|
/*h(5557)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5557, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16773)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16773, 7189},
|
|
/*h(21941)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21941, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4485)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4485;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3535)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3535, 7225},
|
|
/*h(26037)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26037, 7196},
|
|
/*h(20869)=2 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20869, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13749)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13749, 7196},
|
|
/*h(8581)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8581, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24965)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24965;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12677)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12677, 7189},
|
|
/*h(17845)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17845, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1408)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1408, 7192},
|
|
/*h(421)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {421, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(15818)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15818, 7226},
|
|
/*h(17792)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17792, 7192},
|
|
/*h(16805)=2 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16805, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4517)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4517, 7189},
|
|
/*h(3530)=1 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3530, 7226},
|
|
/*h(26032)=2 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26032, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_367_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21888)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21888, 7194},
|
|
/*h(20901)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20901, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7626)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7626, 7226},
|
|
/*h(8613)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8613, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25984)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25984, 7197},
|
|
/*h(24997)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24997, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11722)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11722, 7226},
|
|
/*h(12709)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12709, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(397)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 397;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16781)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16781;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4493)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4493;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_484_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20877)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20877, 7189},
|
|
/*h(13735)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13735, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_204_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8589)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24973)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24973;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12685)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12685;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29069)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29069;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(429)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17800)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17800, 7192},
|
|
/*h(16813)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16813, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3538)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 7229},
|
|
/*h(4525)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4525, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_328_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21896)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21896, 7194},
|
|
/*h(20909)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20909, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8621)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8621, 7189},
|
|
/*h(9608)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9608, 7197},
|
|
/*h(7634)=2 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7634, 7229}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25005)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11730)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11730, 7229},
|
|
/*h(12717)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12717, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1431)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1431, 7196},
|
|
/*h(29101)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29101, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(405)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 405;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16789)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16789;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4501)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4501;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20885)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20885;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8597)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24981)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12693)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12693;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(437)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 437;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16821)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5520)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5520, 7194},
|
|
/*h(4533)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4533, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20917)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20917;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9616)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9616, 7197},
|
|
/*h(8629)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8629, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26000)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26000, 7197},
|
|
/*h(25013)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25013, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12725)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12725;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29109)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29109;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5559)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5559, 7196},
|
|
/*h(391)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {391, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_362_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9633)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9633, 7197},
|
|
/*h(16775)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16775, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4487)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4487, 7189},
|
|
/*h(9655)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9655, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_687_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20871)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8583)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8583, 7189},
|
|
/*h(13751)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13751, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_316_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(30135)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30135, 7196},
|
|
/*h(24967)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24967, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17847)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17847, 7196},
|
|
/*h(12679)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12679, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17794)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17794, 7192},
|
|
/*h(16807)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16807, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_623_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5506)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5506, 7194},
|
|
/*h(4519)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4519, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20903)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9602)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9602, 7197},
|
|
/*h(8615)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8615, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24999)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_577_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12711)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(399)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 399;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16783)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4495)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_648_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20879)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20879;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8591)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_277_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24975)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_694_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12687)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12687, 7189},
|
|
/*h(5545)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5545, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29071)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1418)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1418, 7192},
|
|
/*h(431)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {431, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16815)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_584_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5514)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5514, 7194},
|
|
/*h(4527)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4527, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20911)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9610)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9610, 7197},
|
|
/*h(8623)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8623, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25994)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25994, 7197},
|
|
/*h(25007)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25007, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_538_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12719)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29103)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29103;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(407)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 407;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_284_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16791)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15826)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15826, 7229},
|
|
/*h(4503)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4503, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_609_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20887)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20887;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1457)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1457, 7192},
|
|
/*h(8599)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8599, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24983)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24983;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12695)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(29079)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29079, 7189},
|
|
/*h(21937)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21937, 7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1426)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1426, 7192},
|
|
/*h(439)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {439, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11655)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11655, 7225},
|
|
/*h(16823)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16823, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5522)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5522, 7194},
|
|
/*h(4535)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4535, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20919)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20919, 7189},
|
|
/*h(21906)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21906, 7194},
|
|
/*h(15751)=2 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15751, 7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9618)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9618, 7197},
|
|
/*h(8631)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8631, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26002)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26002, 7197},
|
|
/*h(25015)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25015, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7559)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7559, 7225},
|
|
/*h(12727)=1 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12727, 7189}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(29111)=0 EVV 0x78 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29111, 7189},
|
|
/*h(1441)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1441, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8576)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8576;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24960)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8608)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8608;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24992)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8584)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8584;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24968)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24968;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_682_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8616)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8616, 7190},
|
|
/*h(9603)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9603, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25000)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25000, 7190},
|
|
/*h(25987)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25987, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8592)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8592, 7190},
|
|
/*h(1450)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1450, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24976)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9611)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9611, 7197},
|
|
/*h(15766)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15766, 7221},
|
|
/*h(8624)=2 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8624, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25008)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25008, 7190},
|
|
/*h(25995)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25995, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8578)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24962)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8610)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8610;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24994)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8586)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8586, 7190},
|
|
/*h(1444)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1444, 7191},
|
|
/*h(30101)=2 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30101, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24970)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8618)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8618, 7190},
|
|
/*h(9605)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9605, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25002)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25002, 7190},
|
|
/*h(25989)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25989, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8594)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24978)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24978, 7190},
|
|
/*h(17836)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17836, 7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8626)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8626, 7190},
|
|
/*h(3458)=1 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3458, 7226},
|
|
/*h(7639)=2 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7639, 7228}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25010)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25010, 7190},
|
|
/*h(25997)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25997, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8577)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8577;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24961)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24961;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7622)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7622, 7224},
|
|
/*h(8609)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8609, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24993)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8585)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8585;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24969)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24969;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_416_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9604)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9604, 7195},
|
|
/*h(8617)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8617, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25988)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25988, 7195},
|
|
/*h(25001)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25001, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_533_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8593)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8593;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3462)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3462, 7224},
|
|
/*h(24977)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24977, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7638)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7638, 7227},
|
|
/*h(8625)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8625, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25996)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25996, 7195},
|
|
/*h(25009)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25009, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8579)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8579;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24963)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8611)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24995)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8587)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8587;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_645_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17829)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17829, 7196},
|
|
/*h(24971)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24971, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8619)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25990)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25990, 7195},
|
|
/*h(25003)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25003, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8595)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8595;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_606_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24979)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24979;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9614)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9614, 7195},
|
|
/*h(8627)=1 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8627, 7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25011)=0 EVV 0x78 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7190}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25011;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17796)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17796;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17828)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17828;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1452)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1452;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_384_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1428)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1428, 7191},
|
|
/*h(30085)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30085, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17812)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17812;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_229_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1460)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1460, 7191},
|
|
/*h(30117)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30117, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17844)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17844;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1446)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1446, 7191},
|
|
/*h(30103)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30103, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17830)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1454)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17838)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_548_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1430)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1430, 7191},
|
|
/*h(30087)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30087, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17814)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1462)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1462, 7191},
|
|
/*h(30119)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30119, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17846)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7191}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1440)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1440;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17824)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17824;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1416)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1416;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1448)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17832)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1424)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17808)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17808;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1456)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17840)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1410)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1410;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1442)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17826)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17826, 7192},
|
|
/*h(11671)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11671, 7222}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17802)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17834)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17834;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17810)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17810;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1458)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17842)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11670)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11670, 7221},
|
|
/*h(17825)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17825, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1417)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1417;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1449)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1449;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17833)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17833;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17809)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17809;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17841)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17841;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7566)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7566, 7224},
|
|
/*h(1411)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1411, 7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17795)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1443)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1443;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17827)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17827;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17803)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1451)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1451;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17835)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1427)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1427;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17811)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17811;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1459)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1459;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17843)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7192}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5540)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5540;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_540_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21924)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5548)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21932)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5524)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5524;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_618_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21908)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5542)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21926)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5518)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5550)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_666_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21934)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5526)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21910)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5558)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7193}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5504)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5504;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5536)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5536;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21920)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21920;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5512)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5544)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5544;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21928)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21904)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5552)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5552;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_531_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21890)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_467_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5538)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21922)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21922;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21898)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_429_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5546)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5546;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21930)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21930;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5505)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5505;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5537)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5537;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21921)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21921;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21897)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21929)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21891)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5539)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21923)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21923;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5547)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5547;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5523)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5523;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21907)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9636)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9636;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26020)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26020;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_377_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9612)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9612, 7195},
|
|
/*h(15767)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15767, 7222}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9644)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26028)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9620)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26004)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9652)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9606)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9638)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26022)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_450_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25998)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26030)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9622)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26038)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13701)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13701;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1445)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1445;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5541)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5541;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21925)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21925;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9637)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9637;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26021)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26021;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13733)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13733;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_482_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5517)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9613)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9613;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7554)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7554, 7226},
|
|
/*h(11735)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11735, 7228},
|
|
/*h(13709)=2 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13709, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30093)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30093;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1453)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1453;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17837)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5549)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5549;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21933)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21933;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9645)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9645;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26029)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26029;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7623)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7623, 7225},
|
|
/*h(30125)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30125, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1429)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17813)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17813;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_443_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5525)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5525;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21909)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3466)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3466, 7226},
|
|
/*h(9621)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9621, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_677_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26005)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7562)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7562, 7226},
|
|
/*h(13717)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13717, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1461)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9653)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9653;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7631)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7631, 7225},
|
|
/*h(30133)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30133, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11666)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11666, 7223},
|
|
/*h(5511)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5511, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15762)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15762, 7223},
|
|
/*h(9607)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9607, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25991)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25991;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13703)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1447)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1447;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17831)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_530_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5543)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21927)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9639)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9639;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26023)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26023;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_321_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1423)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5519)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5519;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_555_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21903)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_601_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13711)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30095)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30095;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1455)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1455;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17839)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17839;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_491_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5551)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21935)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_121_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9647)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26031)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13743)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17815)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5527)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5527;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9623)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9623;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26007)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_562_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13719)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7618)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7618, 7226},
|
|
/*h(1463)=1 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1463, 7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21943)=0 EVV 0x78 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {7196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9600)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9600;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9632)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9632;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_537_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26016)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_653_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25992)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3522)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3522, 7226},
|
|
/*h(26024)=1 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26024, 7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25986)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_97_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9634)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9634, 7197},
|
|
/*h(3479)=1 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 7222}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26018)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9642)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_663_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26026)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_426_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25985)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25985;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26017)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26017;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25993)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9641)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26025)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9635)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9635;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26019)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9643)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9643;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26027)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26027;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9619)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26003)=0 EVV 0x78 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3478)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7221}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7574)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7221}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7575)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7222}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3474)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7223}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7558)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15814)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3470)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11662)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15758)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11726)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3463)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3463;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11719)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3471)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3471;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7567)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11663)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15759)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11727)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11714)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15810)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15810;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15754)=0 EVV 0x78 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11734)=0 EVV 0x78 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7227}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x78_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[696] = {
|
|
/*h(21892)=0 */ {21892, xed3_phash_find_mapevex_map5_opcode0x78_vv2_0_l1},
|
|
/*h(8595)=1 */ {8595, xed3_phash_find_mapevex_map5_opcode0x78_vv2_1_l1},
|
|
/*h(1453)=2 */ {1453, xed3_phash_find_mapevex_map5_opcode0x78_vv2_2_l1},
|
|
/*h(17800)=3 */ {17800, xed3_phash_find_mapevex_map5_opcode0x78_vv2_3_l1},
|
|
/*h(15826)=4 */ {15826, xed3_phash_find_mapevex_map5_opcode0x78_vv2_4_l1},
|
|
/*h(26018)=5 */ {26018, xed3_phash_find_mapevex_map5_opcode0x78_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11734)=7 */ {11734, xed3_phash_find_mapevex_map5_opcode0x78_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21926)=9 */ {21926, xed3_phash_find_mapevex_map5_opcode0x78_vv2_9_l1},
|
|
/*h(9616)=10 */ {9616, xed3_phash_find_mapevex_map5_opcode0x78_vv2_10_l1},
|
|
/*h(24976)=11 */ {24976, xed3_phash_find_mapevex_map5_opcode0x78_vv2_11_l1},
|
|
/*h(17834)=12 */ {17834, xed3_phash_find_mapevex_map5_opcode0x78_vv2_12_l1},
|
|
/*h(5524)=13 */ {5524, xed3_phash_find_mapevex_map5_opcode0x78_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20884)=15 */ {20884, xed3_phash_find_mapevex_map5_opcode0x78_vv2_15_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9650)=19 */ {9650, xed3_phash_find_mapevex_map5_opcode0x78_vv2_19_l1},
|
|
/*h(25997)=20 */ {25997, xed3_phash_find_mapevex_map5_opcode0x78_vv2_20_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5558)=22 */ {5558, xed3_phash_find_mapevex_map5_opcode0x78_vv2_22_l1},
|
|
/*h(390)=23 */ {390, xed3_phash_find_mapevex_map5_opcode0x78_vv2_23_l1},
|
|
/*h(15750)=24 */ {15750, xed3_phash_find_mapevex_map5_opcode0x78_vv2_24_l1},
|
|
/*h(8608)=25 */ {8608, xed3_phash_find_mapevex_map5_opcode0x78_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17813)=27 */ {17813, xed3_phash_find_mapevex_map5_opcode0x78_vv2_27_l1},
|
|
/*h(11658)=28 */ {11658, xed3_phash_find_mapevex_map5_opcode0x78_vv2_28_l1},
|
|
/*h(26031)=29 */ {26031, xed3_phash_find_mapevex_map5_opcode0x78_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7566)=31 */ {7566, xed3_phash_find_mapevex_map5_opcode0x78_vv2_31_l1},
|
|
/*h(424)=32 */ {424, xed3_phash_find_mapevex_map5_opcode0x78_vv2_32_l1},
|
|
/*h(21939)=33 */ {21939, xed3_phash_find_mapevex_map5_opcode0x78_vv2_33_l1},
|
|
/*h(3474)=34 */ {3474, xed3_phash_find_mapevex_map5_opcode0x78_vv2_34_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17847)=36 */ {17847, xed3_phash_find_mapevex_map5_opcode0x78_vv2_36_l1},
|
|
/*h(5537)=37 */ {5537, xed3_phash_find_mapevex_map5_opcode0x78_vv2_37_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20897)=39 */ {20897, xed3_phash_find_mapevex_map5_opcode0x78_vv2_39_l1},
|
|
/*h(8587)=40 */ {8587, xed3_phash_find_mapevex_map5_opcode0x78_vv2_40_l1},
|
|
/*h(1445)=41 */ {1445, xed3_phash_find_mapevex_map5_opcode0x78_vv2_41_l1},
|
|
/*h(15818)=42 */ {15818, xed3_phash_find_mapevex_map5_opcode0x78_vv2_42_l1},
|
|
/*h(4495)=43 */ {4495, xed3_phash_find_mapevex_map5_opcode0x78_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11726)=46 */ {11726, xed3_phash_find_mapevex_map5_opcode0x78_vv2_46_l1},
|
|
/*h(403)=47 */ {403, xed3_phash_find_mapevex_map5_opcode0x78_vv2_47_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7634)=49 */ {7634, xed3_phash_find_mapevex_map5_opcode0x78_vv2_49_l1},
|
|
/*h(24968)=50 */ {24968, xed3_phash_find_mapevex_map5_opcode0x78_vv2_50_l1},
|
|
/*h(11671)=51 */ {11671, xed3_phash_find_mapevex_map5_opcode0x78_vv2_51_l1},
|
|
/*h(5516)=52 */ {5516, xed3_phash_find_mapevex_map5_opcode0x78_vv2_52_l1},
|
|
/*h(3542)=53 */ {3542, xed3_phash_find_mapevex_map5_opcode0x78_vv2_53_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1424)=55 */ {1424, xed3_phash_find_mapevex_map5_opcode0x78_vv2_55_l1},
|
|
/*h(437)=56 */ {437, xed3_phash_find_mapevex_map5_opcode0x78_vv2_56_l1},
|
|
/*h(16784)=57 */ {16784, xed3_phash_find_mapevex_map5_opcode0x78_vv2_57_l1},
|
|
/*h(9642)=58 */ {9642, xed3_phash_find_mapevex_map5_opcode0x78_vv2_58_l1},
|
|
/*h(25989)=59 */ {25989, xed3_phash_find_mapevex_map5_opcode0x78_vv2_59_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5550)=61 */ {5550, xed3_phash_find_mapevex_map5_opcode0x78_vv2_61_l1},
|
|
/*h(21897)=62 */ {21897, xed3_phash_find_mapevex_map5_opcode0x78_vv2_62_l1},
|
|
/*h(20910)=63 */ {20910, xed3_phash_find_mapevex_map5_opcode0x78_vv2_63_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1458)=65 */ {1458, xed3_phash_find_mapevex_map5_opcode0x78_vv2_65_l1},
|
|
/*h(15831)=66 */ {15831, xed3_phash_find_mapevex_map5_opcode0x78_vv2_66_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26023)=68 */ {26023, xed3_phash_find_mapevex_map5_opcode0x78_vv2_68_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7558)=70 */ {7558, xed3_phash_find_mapevex_map5_opcode0x78_vv2_70_l1},
|
|
/*h(21931)=71 */ {21931, xed3_phash_find_mapevex_map5_opcode0x78_vv2_71_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3466)=73 */ {3466, xed3_phash_find_mapevex_map5_opcode0x78_vv2_73_l1},
|
|
/*h(24981)=74 */ {24981, xed3_phash_find_mapevex_map5_opcode0x78_vv2_74_l1},
|
|
/*h(17839)=75 */ {17839, xed3_phash_find_mapevex_map5_opcode0x78_vv2_75_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8579)=79 */ {8579, xed3_phash_find_mapevex_map5_opcode0x78_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15810)=81 */ {15810, xed3_phash_find_mapevex_map5_opcode0x78_vv2_81_l1},
|
|
/*h(9655)=82 */ {9655, xed3_phash_find_mapevex_map5_opcode0x78_vv2_82_l1},
|
|
/*h(26002)=83 */ {26002, xed3_phash_find_mapevex_map5_opcode0x78_vv2_83_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11718)=85 */ {11718, xed3_phash_find_mapevex_map5_opcode0x78_vv2_85_l1},
|
|
/*h(21910)=86 */ {21910, xed3_phash_find_mapevex_map5_opcode0x78_vv2_86_l1},
|
|
/*h(9600)=87 */ {9600, xed3_phash_find_mapevex_map5_opcode0x78_vv2_87_l1},
|
|
/*h(7626)=88 */ {7626, xed3_phash_find_mapevex_map5_opcode0x78_vv2_88_l1},
|
|
/*h(24960)=89 */ {24960, xed3_phash_find_mapevex_map5_opcode0x78_vv2_89_l1},
|
|
/*h(11663)=90 */ {11663, xed3_phash_find_mapevex_map5_opcode0x78_vv2_90_l1},
|
|
/*h(3534)=91 */ {3534, xed3_phash_find_mapevex_map5_opcode0x78_vv2_91_l1},
|
|
/*h(26036)=92 */ {26036, xed3_phash_find_mapevex_map5_opcode0x78_vv2_92_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1416)=94 */ {1416, xed3_phash_find_mapevex_map5_opcode0x78_vv2_94_l1},
|
|
/*h(429)=95 */ {429, xed3_phash_find_mapevex_map5_opcode0x78_vv2_95_l1},
|
|
/*h(16776)=96 */ {16776, xed3_phash_find_mapevex_map5_opcode0x78_vv2_96_l1},
|
|
/*h(3479)=97 */ {3479, xed3_phash_find_mapevex_map5_opcode0x78_vv2_97_l1},
|
|
/*h(24994)=98 */ {24994, xed3_phash_find_mapevex_map5_opcode0x78_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5542)=100 */ {5542, xed3_phash_find_mapevex_map5_opcode0x78_vv2_100_l1},
|
|
/*h(21889)=101 */ {21889, xed3_phash_find_mapevex_map5_opcode0x78_vv2_101_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1450)=103 */ {1450, xed3_phash_find_mapevex_map5_opcode0x78_vv2_103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15823)=105 */ {15823, xed3_phash_find_mapevex_map5_opcode0x78_vv2_105_l1},
|
|
/*h(4500)=106 */ {4500, xed3_phash_find_mapevex_map5_opcode0x78_vv2_106_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21923)=110 */ {21923, xed3_phash_find_mapevex_map5_opcode0x78_vv2_110_l1},
|
|
/*h(9613)=111 */ {9613, xed3_phash_find_mapevex_map5_opcode0x78_vv2_111_l1},
|
|
/*h(7639)=112 */ {7639, xed3_phash_find_mapevex_map5_opcode0x78_vv2_112_l1},
|
|
/*h(24973)=113 */ {24973, xed3_phash_find_mapevex_map5_opcode0x78_vv2_113_l1},
|
|
/*h(17831)=114 */ {17831, xed3_phash_find_mapevex_map5_opcode0x78_vv2_114_l1},
|
|
/*h(5521)=115 */ {5521, xed3_phash_find_mapevex_map5_opcode0x78_vv2_115_l1},
|
|
/*h(20881)=116 */ {20881, xed3_phash_find_mapevex_map5_opcode0x78_vv2_116_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1429)=118 */ {1429, xed3_phash_find_mapevex_map5_opcode0x78_vv2_118_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16789)=120 */ {16789, xed3_phash_find_mapevex_map5_opcode0x78_vv2_120_l1},
|
|
/*h(9647)=121 */ {9647, xed3_phash_find_mapevex_map5_opcode0x78_vv2_121_l1},
|
|
/*h(25994)=122 */ {25994, xed3_phash_find_mapevex_map5_opcode0x78_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5555)=124 */ {5555, xed3_phash_find_mapevex_map5_opcode0x78_vv2_124_l1},
|
|
/*h(21902)=125 */ {21902, xed3_phash_find_mapevex_map5_opcode0x78_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7618)=127 */ {7618, xed3_phash_find_mapevex_map5_opcode0x78_vv2_127_l1},
|
|
/*h(17810)=128 */ {17810, xed3_phash_find_mapevex_map5_opcode0x78_vv2_128_l1},
|
|
/*h(11655)=129 */ {11655, xed3_phash_find_mapevex_map5_opcode0x78_vv2_129_l1},
|
|
/*h(3526)=130 */ {3526, xed3_phash_find_mapevex_map5_opcode0x78_vv2_130_l1},
|
|
/*h(26028)=131 */ {26028, xed3_phash_find_mapevex_map5_opcode0x78_vv2_131_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1408)=133 */ {1408, xed3_phash_find_mapevex_map5_opcode0x78_vv2_133_l1},
|
|
/*h(21936)=134 */ {21936, xed3_phash_find_mapevex_map5_opcode0x78_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3471)=136 */ {3471, xed3_phash_find_mapevex_map5_opcode0x78_vv2_136_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17844)=138 */ {17844, xed3_phash_find_mapevex_map5_opcode0x78_vv2_138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8584)=141 */ {8584, xed3_phash_find_mapevex_map5_opcode0x78_vv2_141_l1},
|
|
/*h(1442)=142 */ {1442, xed3_phash_find_mapevex_map5_opcode0x78_vv2_142_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15815)=144 */ {15815, xed3_phash_find_mapevex_map5_opcode0x78_vv2_144_l1},
|
|
/*h(4492)=145 */ {4492, xed3_phash_find_mapevex_map5_opcode0x78_vv2_145_l1},
|
|
/*h(26007)=146 */ {26007, xed3_phash_find_mapevex_map5_opcode0x78_vv2_146_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(400)=148 */ {400, xed3_phash_find_mapevex_map5_opcode0x78_vv2_148_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9605)=150 */ {9605, xed3_phash_find_mapevex_map5_opcode0x78_vv2_150_l1},
|
|
/*h(7631)=151 */ {7631, xed3_phash_find_mapevex_map5_opcode0x78_vv2_151_l1},
|
|
/*h(24965)=152 */ {24965, xed3_phash_find_mapevex_map5_opcode0x78_vv2_152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5513)=154 */ {5513, xed3_phash_find_mapevex_map5_opcode0x78_vv2_154_l1},
|
|
/*h(20873)=155 */ {20873, xed3_phash_find_mapevex_map5_opcode0x78_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1421)=157 */ {1421, xed3_phash_find_mapevex_map5_opcode0x78_vv2_157_l1},
|
|
/*h(16781)=158 */ {16781, xed3_phash_find_mapevex_map5_opcode0x78_vv2_158_l1},
|
|
/*h(9639)=159 */ {9639, xed3_phash_find_mapevex_map5_opcode0x78_vv2_159_l1},
|
|
/*h(25986)=160 */ {25986, xed3_phash_find_mapevex_map5_opcode0x78_vv2_160_l1},
|
|
/*h(24999)=161 */ {24999, xed3_phash_find_mapevex_map5_opcode0x78_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5547)=163 */ {5547, xed3_phash_find_mapevex_map5_opcode0x78_vv2_163_l1},
|
|
/*h(21894)=164 */ {21894, xed3_phash_find_mapevex_map5_opcode0x78_vv2_164_l1},
|
|
/*h(8597)=165 */ {8597, xed3_phash_find_mapevex_map5_opcode0x78_vv2_165_l1},
|
|
/*h(1455)=166 */ {1455, xed3_phash_find_mapevex_map5_opcode0x78_vv2_166_l1},
|
|
/*h(17802)=167 */ {17802, xed3_phash_find_mapevex_map5_opcode0x78_vv2_167_l1},
|
|
/*h(16815)=168 */ {16815, xed3_phash_find_mapevex_map5_opcode0x78_vv2_168_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26020)=170 */ {26020, xed3_phash_find_mapevex_map5_opcode0x78_vv2_170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21928)=173 */ {21928, xed3_phash_find_mapevex_map5_opcode0x78_vv2_173_l1},
|
|
/*h(9618)=174 */ {9618, xed3_phash_find_mapevex_map5_opcode0x78_vv2_174_l1},
|
|
/*h(3463)=175 */ {3463, xed3_phash_find_mapevex_map5_opcode0x78_vv2_175_l1},
|
|
/*h(17836)=176 */ {17836, xed3_phash_find_mapevex_map5_opcode0x78_vv2_176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5526)=178 */ {5526, xed3_phash_find_mapevex_map5_opcode0x78_vv2_178_l1},
|
|
/*h(20886)=179 */ {20886, xed3_phash_find_mapevex_map5_opcode0x78_vv2_179_l1},
|
|
/*h(8576)=180 */ {8576, xed3_phash_find_mapevex_map5_opcode0x78_vv2_180_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9652)=183 */ {9652, xed3_phash_find_mapevex_map5_opcode0x78_vv2_183_l1},
|
|
/*h(25999)=184 */ {25999, xed3_phash_find_mapevex_map5_opcode0x78_vv2_184_l1},
|
|
/*h(25012)=185 */ {25012, xed3_phash_find_mapevex_map5_opcode0x78_vv2_185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(392)=187 */ {392, xed3_phash_find_mapevex_map5_opcode0x78_vv2_187_l1},
|
|
/*h(21907)=188 */ {21907, xed3_phash_find_mapevex_map5_opcode0x78_vv2_188_l1},
|
|
/*h(8610)=189 */ {8610, xed3_phash_find_mapevex_map5_opcode0x78_vv2_189_l1},
|
|
/*h(7623)=190 */ {7623, xed3_phash_find_mapevex_map5_opcode0x78_vv2_190_l1},
|
|
/*h(17815)=191 */ {17815, xed3_phash_find_mapevex_map5_opcode0x78_vv2_191_l1},
|
|
/*h(5505)=192 */ {5505, xed3_phash_find_mapevex_map5_opcode0x78_vv2_192_l1},
|
|
/*h(4518)=193 */ {4518, xed3_phash_find_mapevex_map5_opcode0x78_vv2_193_l1},
|
|
/*h(26033)=194 */ {26033, xed3_phash_find_mapevex_map5_opcode0x78_vv2_194_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1413)=196 */ {1413, xed3_phash_find_mapevex_map5_opcode0x78_vv2_196_l1},
|
|
/*h(21941)=197 */ {21941, xed3_phash_find_mapevex_map5_opcode0x78_vv2_197_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5539)=202 */ {5539, xed3_phash_find_mapevex_map5_opcode0x78_vv2_202_l1},
|
|
/*h(20899)=203 */ {20899, xed3_phash_find_mapevex_map5_opcode0x78_vv2_203_l1},
|
|
/*h(8589)=204 */ {8589, xed3_phash_find_mapevex_map5_opcode0x78_vv2_204_l1},
|
|
/*h(1447)=205 */ {1447, xed3_phash_find_mapevex_map5_opcode0x78_vv2_205_l1},
|
|
/*h(17794)=206 */ {17794, xed3_phash_find_mapevex_map5_opcode0x78_vv2_206_l1},
|
|
/*h(4497)=207 */ {4497, xed3_phash_find_mapevex_map5_opcode0x78_vv2_207_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(405)=211 */ {405, xed3_phash_find_mapevex_map5_opcode0x78_vv2_211_l1},
|
|
/*h(21920)=212 */ {21920, xed3_phash_find_mapevex_map5_opcode0x78_vv2_212_l1},
|
|
/*h(9610)=213 */ {9610, xed3_phash_find_mapevex_map5_opcode0x78_vv2_213_l1},
|
|
/*h(24970)=214 */ {24970, xed3_phash_find_mapevex_map5_opcode0x78_vv2_214_l1},
|
|
/*h(17828)=215 */ {17828, xed3_phash_find_mapevex_map5_opcode0x78_vv2_215_l1},
|
|
/*h(5518)=216 */ {5518, xed3_phash_find_mapevex_map5_opcode0x78_vv2_216_l1},
|
|
/*h(4531)=217 */ {4531, xed3_phash_find_mapevex_map5_opcode0x78_vv2_217_l1},
|
|
/*h(20878)=218 */ {20878, xed3_phash_find_mapevex_map5_opcode0x78_vv2_218_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1426)=220 */ {1426, xed3_phash_find_mapevex_map5_opcode0x78_vv2_220_l1},
|
|
/*h(16786)=221 */ {16786, xed3_phash_find_mapevex_map5_opcode0x78_vv2_221_l1},
|
|
/*h(9644)=222 */ {9644, xed3_phash_find_mapevex_map5_opcode0x78_vv2_222_l1},
|
|
/*h(25991)=223 */ {25991, xed3_phash_find_mapevex_map5_opcode0x78_vv2_223_l1},
|
|
/*h(25004)=224 */ {25004, xed3_phash_find_mapevex_map5_opcode0x78_vv2_224_l1},
|
|
/*h(5552)=225 */ {5552, xed3_phash_find_mapevex_map5_opcode0x78_vv2_225_l1},
|
|
/*h(384)=226 */ {384, xed3_phash_find_mapevex_map5_opcode0x78_vv2_226_l1},
|
|
/*h(21899)=227 */ {21899, xed3_phash_find_mapevex_map5_opcode0x78_vv2_227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30117)=229 */ {30117, xed3_phash_find_mapevex_map5_opcode0x78_vv2_229_l1},
|
|
/*h(17807)=230 */ {17807, xed3_phash_find_mapevex_map5_opcode0x78_vv2_230_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26025)=232 */ {26025, xed3_phash_find_mapevex_map5_opcode0x78_vv2_232_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(418)=235 */ {418, xed3_phash_find_mapevex_map5_opcode0x78_vv2_235_l1},
|
|
/*h(21933)=236 */ {21933, xed3_phash_find_mapevex_map5_opcode0x78_vv2_236_l1},
|
|
/*h(9623)=237 */ {9623, xed3_phash_find_mapevex_map5_opcode0x78_vv2_237_l1},
|
|
/*h(24983)=238 */ {24983, xed3_phash_find_mapevex_map5_opcode0x78_vv2_238_l1},
|
|
/*h(17841)=239 */ {17841, xed3_phash_find_mapevex_map5_opcode0x78_vv2_239_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13749)=243 */ {13749, xed3_phash_find_mapevex_map5_opcode0x78_vv2_243_l1},
|
|
/*h(29109)=244 */ {29109, xed3_phash_find_mapevex_map5_opcode0x78_vv2_244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4489)=246 */ {4489, xed3_phash_find_mapevex_map5_opcode0x78_vv2_246_l1},
|
|
/*h(26004)=247 */ {26004, xed3_phash_find_mapevex_map5_opcode0x78_vv2_247_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(397)=250 */ {397, xed3_phash_find_mapevex_map5_opcode0x78_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9602)=252 */ {9602, xed3_phash_find_mapevex_map5_opcode0x78_vv2_252_l1},
|
|
/*h(24962)=253 */ {24962, xed3_phash_find_mapevex_map5_opcode0x78_vv2_253_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5510)=255 */ {5510, xed3_phash_find_mapevex_map5_opcode0x78_vv2_255_l1},
|
|
/*h(26038)=256 */ {26038, xed3_phash_find_mapevex_map5_opcode0x78_vv2_256_l1},
|
|
/*h(20870)=257 */ {20870, xed3_phash_find_mapevex_map5_opcode0x78_vv2_257_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1418)=259 */ {1418, xed3_phash_find_mapevex_map5_opcode0x78_vv2_259_l1},
|
|
/*h(16778)=260 */ {16778, xed3_phash_find_mapevex_map5_opcode0x78_vv2_260_l1},
|
|
/*h(9636)=261 */ {9636, xed3_phash_find_mapevex_map5_opcode0x78_vv2_261_l1},
|
|
/*h(24996)=262 */ {24996, xed3_phash_find_mapevex_map5_opcode0x78_vv2_262_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5544)=264 */ {5544, xed3_phash_find_mapevex_map5_opcode0x78_vv2_264_l1},
|
|
/*h(21891)=265 */ {21891, xed3_phash_find_mapevex_map5_opcode0x78_vv2_265_l1},
|
|
/*h(20904)=266 */ {20904, xed3_phash_find_mapevex_map5_opcode0x78_vv2_266_l1},
|
|
/*h(8594)=267 */ {8594, xed3_phash_find_mapevex_map5_opcode0x78_vv2_267_l1},
|
|
/*h(1452)=268 */ {1452, xed3_phash_find_mapevex_map5_opcode0x78_vv2_268_l1},
|
|
/*h(17799)=269 */ {17799, xed3_phash_find_mapevex_map5_opcode0x78_vv2_269_l1},
|
|
/*h(4502)=270 */ {4502, xed3_phash_find_mapevex_map5_opcode0x78_vv2_270_l1},
|
|
/*h(26017)=271 */ {26017, xed3_phash_find_mapevex_map5_opcode0x78_vv2_271_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21925)=275 */ {21925, xed3_phash_find_mapevex_map5_opcode0x78_vv2_275_l1},
|
|
/*h(9615)=276 */ {9615, xed3_phash_find_mapevex_map5_opcode0x78_vv2_276_l1},
|
|
/*h(24975)=277 */ {24975, xed3_phash_find_mapevex_map5_opcode0x78_vv2_277_l1},
|
|
/*h(17833)=278 */ {17833, xed3_phash_find_mapevex_map5_opcode0x78_vv2_278_l1},
|
|
/*h(5523)=279 */ {5523, xed3_phash_find_mapevex_map5_opcode0x78_vv2_279_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13741)=281 */ {13741, xed3_phash_find_mapevex_map5_opcode0x78_vv2_281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1431)=283 */ {1431, xed3_phash_find_mapevex_map5_opcode0x78_vv2_283_l1},
|
|
/*h(16791)=284 */ {16791, xed3_phash_find_mapevex_map5_opcode0x78_vv2_284_l1},
|
|
/*h(9649)=285 */ {9649, xed3_phash_find_mapevex_map5_opcode0x78_vv2_285_l1},
|
|
/*h(25996)=286 */ {25996, xed3_phash_find_mapevex_map5_opcode0x78_vv2_286_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5557)=288 */ {5557, xed3_phash_find_mapevex_map5_opcode0x78_vv2_288_l1},
|
|
/*h(21904)=289 */ {21904, xed3_phash_find_mapevex_map5_opcode0x78_vv2_289_l1},
|
|
/*h(20917)=290 */ {20917, xed3_phash_find_mapevex_map5_opcode0x78_vv2_290_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17812)=293 */ {17812, xed3_phash_find_mapevex_map5_opcode0x78_vv2_293_l1},
|
|
/*h(4515)=294 */ {4515, xed3_phash_find_mapevex_map5_opcode0x78_vv2_294_l1},
|
|
/*h(26030)=295 */ {26030, xed3_phash_find_mapevex_map5_opcode0x78_vv2_295_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1410)=297 */ {1410, xed3_phash_find_mapevex_map5_opcode0x78_vv2_297_l1},
|
|
/*h(423)=298 */ {423, xed3_phash_find_mapevex_map5_opcode0x78_vv2_298_l1},
|
|
/*h(21938)=299 */ {21938, xed3_phash_find_mapevex_map5_opcode0x78_vv2_299_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17846)=302 */ {17846, xed3_phash_find_mapevex_map5_opcode0x78_vv2_302_l1},
|
|
/*h(5536)=303 */ {5536, xed3_phash_find_mapevex_map5_opcode0x78_vv2_303_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20896)=305 */ {20896, xed3_phash_find_mapevex_map5_opcode0x78_vv2_305_l1},
|
|
/*h(30101)=306 */ {30101, xed3_phash_find_mapevex_map5_opcode0x78_vv2_306_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16804)=308 */ {16804, xed3_phash_find_mapevex_map5_opcode0x78_vv2_308_l1},
|
|
/*h(4494)=309 */ {4494, xed3_phash_find_mapevex_map5_opcode0x78_vv2_309_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(402)=312 */ {402, xed3_phash_find_mapevex_map5_opcode0x78_vv2_312_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15762)=314 */ {15762, xed3_phash_find_mapevex_map5_opcode0x78_vv2_314_l1},
|
|
/*h(8620)=315 */ {8620, xed3_phash_find_mapevex_map5_opcode0x78_vv2_315_l1},
|
|
/*h(30135)=316 */ {30135, xed3_phash_find_mapevex_map5_opcode0x78_vv2_316_l1},
|
|
/*h(11670)=317 */ {11670, xed3_phash_find_mapevex_map5_opcode0x78_vv2_317_l1},
|
|
/*h(5515)=318 */ {5515, xed3_phash_find_mapevex_map5_opcode0x78_vv2_318_l1},
|
|
/*h(20875)=319 */ {20875, xed3_phash_find_mapevex_map5_opcode0x78_vv2_319_l1},
|
|
/*h(13733)=320 */ {13733, xed3_phash_find_mapevex_map5_opcode0x78_vv2_320_l1},
|
|
/*h(1423)=321 */ {1423, xed3_phash_find_mapevex_map5_opcode0x78_vv2_321_l1},
|
|
/*h(29093)=322 */ {29093, xed3_phash_find_mapevex_map5_opcode0x78_vv2_322_l1},
|
|
/*h(16783)=323 */ {16783, xed3_phash_find_mapevex_map5_opcode0x78_vv2_323_l1},
|
|
/*h(9641)=324 */ {9641, xed3_phash_find_mapevex_map5_opcode0x78_vv2_324_l1},
|
|
/*h(25988)=325 */ {25988, xed3_phash_find_mapevex_map5_opcode0x78_vv2_325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5549)=327 */ {5549, xed3_phash_find_mapevex_map5_opcode0x78_vv2_327_l1},
|
|
/*h(21896)=328 */ {21896, xed3_phash_find_mapevex_map5_opcode0x78_vv2_328_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1457)=330 */ {1457, xed3_phash_find_mapevex_map5_opcode0x78_vv2_330_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15830)=332 */ {15830, xed3_phash_find_mapevex_map5_opcode0x78_vv2_332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26022)=334 */ {26022, xed3_phash_find_mapevex_map5_opcode0x78_vv2_334_l1},
|
|
/*h(12725)=335 */ {12725, xed3_phash_find_mapevex_map5_opcode0x78_vv2_335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21930)=337 */ {21930, xed3_phash_find_mapevex_map5_opcode0x78_vv2_337_l1},
|
|
/*h(9620)=338 */ {9620, xed3_phash_find_mapevex_map5_opcode0x78_vv2_338_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24980)=340 */ {24980, xed3_phash_find_mapevex_map5_opcode0x78_vv2_340_l1},
|
|
/*h(17838)=341 */ {17838, xed3_phash_find_mapevex_map5_opcode0x78_vv2_341_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8578)=344 */ {8578, xed3_phash_find_mapevex_map5_opcode0x78_vv2_344_l1},
|
|
/*h(30093)=345 */ {30093, xed3_phash_find_mapevex_map5_opcode0x78_vv2_345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9654)=348 */ {9654, xed3_phash_find_mapevex_map5_opcode0x78_vv2_348_l1},
|
|
/*h(26001)=349 */ {26001, xed3_phash_find_mapevex_map5_opcode0x78_vv2_349_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(394)=351 */ {394, xed3_phash_find_mapevex_map5_opcode0x78_vv2_351_l1},
|
|
/*h(21909)=352 */ {21909, xed3_phash_find_mapevex_map5_opcode0x78_vv2_352_l1},
|
|
/*h(15754)=353 */ {15754, xed3_phash_find_mapevex_map5_opcode0x78_vv2_353_l1},
|
|
/*h(30127)=354 */ {30127, xed3_phash_find_mapevex_map5_opcode0x78_vv2_354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11662)=356 */ {11662, xed3_phash_find_mapevex_map5_opcode0x78_vv2_356_l1},
|
|
/*h(5507)=357 */ {5507, xed3_phash_find_mapevex_map5_opcode0x78_vv2_357_l1},
|
|
/*h(26035)=358 */ {26035, xed3_phash_find_mapevex_map5_opcode0x78_vv2_358_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7570)=360 */ {7570, xed3_phash_find_mapevex_map5_opcode0x78_vv2_360_l1},
|
|
/*h(21943)=361 */ {21943, xed3_phash_find_mapevex_map5_opcode0x78_vv2_361_l1},
|
|
/*h(9633)=362 */ {9633, xed3_phash_find_mapevex_map5_opcode0x78_vv2_362_l1},
|
|
/*h(3478)=363 */ {3478, xed3_phash_find_mapevex_map5_opcode0x78_vv2_363_l1},
|
|
/*h(24993)=364 */ {24993, xed3_phash_find_mapevex_map5_opcode0x78_vv2_364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5541)=366 */ {5541, xed3_phash_find_mapevex_map5_opcode0x78_vv2_366_l1},
|
|
/*h(21888)=367 */ {21888, xed3_phash_find_mapevex_map5_opcode0x78_vv2_367_l1},
|
|
/*h(8591)=368 */ {8591, xed3_phash_find_mapevex_map5_opcode0x78_vv2_368_l1},
|
|
/*h(1449)=369 */ {1449, xed3_phash_find_mapevex_map5_opcode0x78_vv2_369_l1},
|
|
/*h(17796)=370 */ {17796, xed3_phash_find_mapevex_map5_opcode0x78_vv2_370_l1},
|
|
/*h(15822)=371 */ {15822, xed3_phash_find_mapevex_map5_opcode0x78_vv2_371_l1},
|
|
/*h(4499)=372 */ {4499, xed3_phash_find_mapevex_map5_opcode0x78_vv2_372_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11730)=374 */ {11730, xed3_phash_find_mapevex_map5_opcode0x78_vv2_374_l1},
|
|
/*h(407)=375 */ {407, xed3_phash_find_mapevex_map5_opcode0x78_vv2_375_l1},
|
|
/*h(21922)=376 */ {21922, xed3_phash_find_mapevex_map5_opcode0x78_vv2_376_l1},
|
|
/*h(15767)=377 */ {15767, xed3_phash_find_mapevex_map5_opcode0x78_vv2_377_l1},
|
|
/*h(7638)=378 */ {7638, xed3_phash_find_mapevex_map5_opcode0x78_vv2_378_l1},
|
|
/*h(24972)=379 */ {24972, xed3_phash_find_mapevex_map5_opcode0x78_vv2_379_l1},
|
|
/*h(17830)=380 */ {17830, xed3_phash_find_mapevex_map5_opcode0x78_vv2_380_l1},
|
|
/*h(5520)=381 */ {5520, xed3_phash_find_mapevex_map5_opcode0x78_vv2_381_l1},
|
|
/*h(20880)=382 */ {20880, xed3_phash_find_mapevex_map5_opcode0x78_vv2_382_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30085)=384 */ {30085, xed3_phash_find_mapevex_map5_opcode0x78_vv2_384_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9646)=386 */ {9646, xed3_phash_find_mapevex_map5_opcode0x78_vv2_386_l1},
|
|
/*h(25993)=387 */ {25993, xed3_phash_find_mapevex_map5_opcode0x78_vv2_387_l1},
|
|
/*h(25006)=388 */ {25006, xed3_phash_find_mapevex_map5_opcode0x78_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5554)=390 */ {5554, xed3_phash_find_mapevex_map5_opcode0x78_vv2_390_l1},
|
|
/*h(15746)=391 */ {15746, xed3_phash_find_mapevex_map5_opcode0x78_vv2_391_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30119)=393 */ {30119, xed3_phash_find_mapevex_map5_opcode0x78_vv2_393_l1},
|
|
/*h(17809)=394 */ {17809, xed3_phash_find_mapevex_map5_opcode0x78_vv2_394_l1},
|
|
/*h(11654)=395 */ {11654, xed3_phash_find_mapevex_map5_opcode0x78_vv2_395_l1},
|
|
/*h(4512)=396 */ {4512, xed3_phash_find_mapevex_map5_opcode0x78_vv2_396_l1},
|
|
/*h(26027)=397 */ {26027, xed3_phash_find_mapevex_map5_opcode0x78_vv2_397_l1},
|
|
/*h(7562)=398 */ {7562, xed3_phash_find_mapevex_map5_opcode0x78_vv2_398_l1},
|
|
/*h(29077)=399 */ {29077, xed3_phash_find_mapevex_map5_opcode0x78_vv2_399_l1},
|
|
/*h(21935)=400 */ {21935, xed3_phash_find_mapevex_map5_opcode0x78_vv2_400_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3470)=402 */ {3470, xed3_phash_find_mapevex_map5_opcode0x78_vv2_402_l1},
|
|
/*h(17843)=403 */ {17843, xed3_phash_find_mapevex_map5_opcode0x78_vv2_403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13751)=407 */ {13751, xed3_phash_find_mapevex_map5_opcode0x78_vv2_407_l1},
|
|
/*h(1441)=408 */ {1441, xed3_phash_find_mapevex_map5_opcode0x78_vv2_408_l1},
|
|
/*h(16801)=409 */ {16801, xed3_phash_find_mapevex_map5_opcode0x78_vv2_409_l1},
|
|
/*h(15814)=410 */ {15814, xed3_phash_find_mapevex_map5_opcode0x78_vv2_410_l1},
|
|
/*h(26006)=411 */ {26006, xed3_phash_find_mapevex_map5_opcode0x78_vv2_411_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11722)=413 */ {11722, xed3_phash_find_mapevex_map5_opcode0x78_vv2_413_l1},
|
|
/*h(399)=414 */ {399, xed3_phash_find_mapevex_map5_opcode0x78_vv2_414_l1},
|
|
/*h(15759)=415 */ {15759, xed3_phash_find_mapevex_map5_opcode0x78_vv2_415_l1},
|
|
/*h(9604)=416 */ {9604, xed3_phash_find_mapevex_map5_opcode0x78_vv2_416_l1},
|
|
/*h(7630)=417 */ {7630, xed3_phash_find_mapevex_map5_opcode0x78_vv2_417_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5512)=419 */ {5512, xed3_phash_find_mapevex_map5_opcode0x78_vv2_419_l1},
|
|
/*h(3538)=420 */ {3538, xed3_phash_find_mapevex_map5_opcode0x78_vv2_420_l1},
|
|
/*h(20872)=421 */ {20872, xed3_phash_find_mapevex_map5_opcode0x78_vv2_421_l1},
|
|
/*h(7575)=422 */ {7575, xed3_phash_find_mapevex_map5_opcode0x78_vv2_422_l1},
|
|
/*h(1420)=423 */ {1420, xed3_phash_find_mapevex_map5_opcode0x78_vv2_423_l1},
|
|
/*h(16780)=424 */ {16780, xed3_phash_find_mapevex_map5_opcode0x78_vv2_424_l1},
|
|
/*h(9638)=425 */ {9638, xed3_phash_find_mapevex_map5_opcode0x78_vv2_425_l1},
|
|
/*h(25985)=426 */ {25985, xed3_phash_find_mapevex_map5_opcode0x78_vv2_426_l1},
|
|
/*h(24998)=427 */ {24998, xed3_phash_find_mapevex_map5_opcode0x78_vv2_427_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5546)=429 */ {5546, xed3_phash_find_mapevex_map5_opcode0x78_vv2_429_l1},
|
|
/*h(21893)=430 */ {21893, xed3_phash_find_mapevex_map5_opcode0x78_vv2_430_l1},
|
|
/*h(8596)=431 */ {8596, xed3_phash_find_mapevex_map5_opcode0x78_vv2_431_l1},
|
|
/*h(1454)=432 */ {1454, xed3_phash_find_mapevex_map5_opcode0x78_vv2_432_l1},
|
|
/*h(17801)=433 */ {17801, xed3_phash_find_mapevex_map5_opcode0x78_vv2_433_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26019)=435 */ {26019, xed3_phash_find_mapevex_map5_opcode0x78_vv2_435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11735)=437 */ {11735, xed3_phash_find_mapevex_map5_opcode0x78_vv2_437_l1},
|
|
/*h(29069)=438 */ {29069, xed3_phash_find_mapevex_map5_opcode0x78_vv2_438_l1},
|
|
/*h(21927)=439 */ {21927, xed3_phash_find_mapevex_map5_opcode0x78_vv2_439_l1},
|
|
/*h(9617)=440 */ {9617, xed3_phash_find_mapevex_map5_opcode0x78_vv2_440_l1},
|
|
/*h(3462)=441 */ {3462, xed3_phash_find_mapevex_map5_opcode0x78_vv2_441_l1},
|
|
/*h(17835)=442 */ {17835, xed3_phash_find_mapevex_map5_opcode0x78_vv2_442_l1},
|
|
/*h(5525)=443 */ {5525, xed3_phash_find_mapevex_map5_opcode0x78_vv2_443_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20885)=445 */ {20885, xed3_phash_find_mapevex_map5_opcode0x78_vv2_445_l1},
|
|
/*h(13743)=446 */ {13743, xed3_phash_find_mapevex_map5_opcode0x78_vv2_446_l1},
|
|
/*h(29103)=447 */ {29103, xed3_phash_find_mapevex_map5_opcode0x78_vv2_447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9651)=449 */ {9651, xed3_phash_find_mapevex_map5_opcode0x78_vv2_449_l1},
|
|
/*h(25998)=450 */ {25998, xed3_phash_find_mapevex_map5_opcode0x78_vv2_450_l1},
|
|
/*h(25011)=451 */ {25011, xed3_phash_find_mapevex_map5_opcode0x78_vv2_451_l1},
|
|
/*h(11714)=452 */ {11714, xed3_phash_find_mapevex_map5_opcode0x78_vv2_452_l1},
|
|
/*h(5559)=453 */ {5559, xed3_phash_find_mapevex_map5_opcode0x78_vv2_453_l1},
|
|
/*h(15751)=454 */ {15751, xed3_phash_find_mapevex_map5_opcode0x78_vv2_454_l1},
|
|
/*h(7622)=455 */ {7622, xed3_phash_find_mapevex_map5_opcode0x78_vv2_455_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17814)=457 */ {17814, xed3_phash_find_mapevex_map5_opcode0x78_vv2_457_l1},
|
|
/*h(5504)=458 */ {5504, xed3_phash_find_mapevex_map5_opcode0x78_vv2_458_l1},
|
|
/*h(3530)=459 */ {3530, xed3_phash_find_mapevex_map5_opcode0x78_vv2_459_l1},
|
|
/*h(20864)=460 */ {20864, xed3_phash_find_mapevex_map5_opcode0x78_vv2_460_l1},
|
|
/*h(7567)=461 */ {7567, xed3_phash_find_mapevex_map5_opcode0x78_vv2_461_l1},
|
|
/*h(1412)=462 */ {1412, xed3_phash_find_mapevex_map5_opcode0x78_vv2_462_l1},
|
|
/*h(21940)=463 */ {21940, xed3_phash_find_mapevex_map5_opcode0x78_vv2_463_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5538)=467 */ {5538, xed3_phash_find_mapevex_map5_opcode0x78_vv2_467_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20898)=469 */ {20898, xed3_phash_find_mapevex_map5_opcode0x78_vv2_469_l1},
|
|
/*h(8588)=470 */ {8588, xed3_phash_find_mapevex_map5_opcode0x78_vv2_470_l1},
|
|
/*h(30103)=471 */ {30103, xed3_phash_find_mapevex_map5_opcode0x78_vv2_471_l1},
|
|
/*h(17793)=472 */ {17793, xed3_phash_find_mapevex_map5_opcode0x78_vv2_472_l1},
|
|
/*h(4496)=473 */ {4496, xed3_phash_find_mapevex_map5_opcode0x78_vv2_473_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13701)=475 */ {13701, xed3_phash_find_mapevex_map5_opcode0x78_vv2_475_l1},
|
|
/*h(11727)=476 */ {11727, xed3_phash_find_mapevex_map5_opcode0x78_vv2_476_l1},
|
|
/*h(29061)=477 */ {29061, xed3_phash_find_mapevex_map5_opcode0x78_vv2_477_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9609)=479 */ {9609, xed3_phash_find_mapevex_map5_opcode0x78_vv2_479_l1},
|
|
/*h(24969)=480 */ {24969, xed3_phash_find_mapevex_map5_opcode0x78_vv2_480_l1},
|
|
/*h(17827)=481 */ {17827, xed3_phash_find_mapevex_map5_opcode0x78_vv2_481_l1},
|
|
/*h(5517)=482 */ {5517, xed3_phash_find_mapevex_map5_opcode0x78_vv2_482_l1},
|
|
/*h(3543)=483 */ {3543, xed3_phash_find_mapevex_map5_opcode0x78_vv2_483_l1},
|
|
/*h(13735)=484 */ {13735, xed3_phash_find_mapevex_map5_opcode0x78_vv2_484_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1425)=486 */ {1425, xed3_phash_find_mapevex_map5_opcode0x78_vv2_486_l1},
|
|
/*h(16785)=487 */ {16785, xed3_phash_find_mapevex_map5_opcode0x78_vv2_487_l1},
|
|
/*h(9643)=488 */ {9643, xed3_phash_find_mapevex_map5_opcode0x78_vv2_488_l1},
|
|
/*h(25990)=489 */ {25990, xed3_phash_find_mapevex_map5_opcode0x78_vv2_489_l1},
|
|
/*h(12693)=490 */ {12693, xed3_phash_find_mapevex_map5_opcode0x78_vv2_490_l1},
|
|
/*h(5551)=491 */ {5551, xed3_phash_find_mapevex_map5_opcode0x78_vv2_491_l1},
|
|
/*h(21898)=492 */ {21898, xed3_phash_find_mapevex_map5_opcode0x78_vv2_492_l1},
|
|
/*h(20911)=493 */ {20911, xed3_phash_find_mapevex_map5_opcode0x78_vv2_493_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1459)=495 */ {1459, xed3_phash_find_mapevex_map5_opcode0x78_vv2_495_l1},
|
|
/*h(17806)=496 */ {17806, xed3_phash_find_mapevex_map5_opcode0x78_vv2_496_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3522)=498 */ {3522, xed3_phash_find_mapevex_map5_opcode0x78_vv2_498_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7559)=500 */ {7559, xed3_phash_find_mapevex_map5_opcode0x78_vv2_500_l1},
|
|
/*h(417)=501 */ {417, xed3_phash_find_mapevex_map5_opcode0x78_vv2_501_l1},
|
|
/*h(21932)=502 */ {21932, xed3_phash_find_mapevex_map5_opcode0x78_vv2_502_l1},
|
|
/*h(9622)=503 */ {9622, xed3_phash_find_mapevex_map5_opcode0x78_vv2_503_l1},
|
|
/*h(24982)=504 */ {24982, xed3_phash_find_mapevex_map5_opcode0x78_vv2_504_l1},
|
|
/*h(17840)=505 */ {17840, xed3_phash_find_mapevex_map5_opcode0x78_vv2_505_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8580)=509 */ {8580, xed3_phash_find_mapevex_map5_opcode0x78_vv2_509_l1},
|
|
/*h(30095)=510 */ {30095, xed3_phash_find_mapevex_map5_opcode0x78_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4488)=512 */ {4488, xed3_phash_find_mapevex_map5_opcode0x78_vv2_512_l1},
|
|
/*h(26003)=513 */ {26003, xed3_phash_find_mapevex_map5_opcode0x78_vv2_513_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11719)=515 */ {11719, xed3_phash_find_mapevex_map5_opcode0x78_vv2_515_l1},
|
|
/*h(21911)=516 */ {21911, xed3_phash_find_mapevex_map5_opcode0x78_vv2_516_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9601)=518 */ {9601, xed3_phash_find_mapevex_map5_opcode0x78_vv2_518_l1},
|
|
/*h(24961)=519 */ {24961, xed3_phash_find_mapevex_map5_opcode0x78_vv2_519_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5509)=521 */ {5509, xed3_phash_find_mapevex_map5_opcode0x78_vv2_521_l1},
|
|
/*h(3535)=522 */ {3535, xed3_phash_find_mapevex_map5_opcode0x78_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1417)=524 */ {1417, xed3_phash_find_mapevex_map5_opcode0x78_vv2_524_l1},
|
|
/*h(430)=525 */ {430, xed3_phash_find_mapevex_map5_opcode0x78_vv2_525_l1},
|
|
/*h(16777)=526 */ {16777, xed3_phash_find_mapevex_map5_opcode0x78_vv2_526_l1},
|
|
/*h(9635)=527 */ {9635, xed3_phash_find_mapevex_map5_opcode0x78_vv2_527_l1},
|
|
/*h(24995)=528 */ {24995, xed3_phash_find_mapevex_map5_opcode0x78_vv2_528_l1},
|
|
/*h(12685)=529 */ {12685, xed3_phash_find_mapevex_map5_opcode0x78_vv2_529_l1},
|
|
/*h(5543)=530 */ {5543, xed3_phash_find_mapevex_map5_opcode0x78_vv2_530_l1},
|
|
/*h(21890)=531 */ {21890, xed3_phash_find_mapevex_map5_opcode0x78_vv2_531_l1},
|
|
/*h(20903)=532 */ {20903, xed3_phash_find_mapevex_map5_opcode0x78_vv2_532_l1},
|
|
/*h(8593)=533 */ {8593, xed3_phash_find_mapevex_map5_opcode0x78_vv2_533_l1},
|
|
/*h(1451)=534 */ {1451, xed3_phash_find_mapevex_map5_opcode0x78_vv2_534_l1},
|
|
/*h(17798)=535 */ {17798, xed3_phash_find_mapevex_map5_opcode0x78_vv2_535_l1},
|
|
/*h(4501)=536 */ {4501, xed3_phash_find_mapevex_map5_opcode0x78_vv2_536_l1},
|
|
/*h(26016)=537 */ {26016, xed3_phash_find_mapevex_map5_opcode0x78_vv2_537_l1},
|
|
/*h(12719)=538 */ {12719, xed3_phash_find_mapevex_map5_opcode0x78_vv2_538_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21924)=540 */ {21924, xed3_phash_find_mapevex_map5_opcode0x78_vv2_540_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9614)=542 */ {9614, xed3_phash_find_mapevex_map5_opcode0x78_vv2_542_l1},
|
|
/*h(24974)=543 */ {24974, xed3_phash_find_mapevex_map5_opcode0x78_vv2_543_l1},
|
|
/*h(17832)=544 */ {17832, xed3_phash_find_mapevex_map5_opcode0x78_vv2_544_l1},
|
|
/*h(5522)=545 */ {5522, xed3_phash_find_mapevex_map5_opcode0x78_vv2_545_l1},
|
|
/*h(20882)=546 */ {20882, xed3_phash_find_mapevex_map5_opcode0x78_vv2_546_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30087)=548 */ {30087, xed3_phash_find_mapevex_map5_opcode0x78_vv2_548_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16790)=550 */ {16790, xed3_phash_find_mapevex_map5_opcode0x78_vv2_550_l1},
|
|
/*h(9648)=551 */ {9648, xed3_phash_find_mapevex_map5_opcode0x78_vv2_551_l1},
|
|
/*h(25995)=552 */ {25995, xed3_phash_find_mapevex_map5_opcode0x78_vv2_552_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5556)=554 */ {5556, xed3_phash_find_mapevex_map5_opcode0x78_vv2_554_l1},
|
|
/*h(21903)=555 */ {21903, xed3_phash_find_mapevex_map5_opcode0x78_vv2_555_l1},
|
|
/*h(20916)=556 */ {20916, xed3_phash_find_mapevex_map5_opcode0x78_vv2_556_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17811)=559 */ {17811, xed3_phash_find_mapevex_map5_opcode0x78_vv2_559_l1},
|
|
/*h(3527)=560 */ {3527, xed3_phash_find_mapevex_map5_opcode0x78_vv2_560_l1},
|
|
/*h(26029)=561 */ {26029, xed3_phash_find_mapevex_map5_opcode0x78_vv2_561_l1},
|
|
/*h(13719)=562 */ {13719, xed3_phash_find_mapevex_map5_opcode0x78_vv2_562_l1},
|
|
/*h(1409)=563 */ {1409, xed3_phash_find_mapevex_map5_opcode0x78_vv2_563_l1},
|
|
/*h(21937)=564 */ {21937, xed3_phash_find_mapevex_map5_opcode0x78_vv2_564_l1},
|
|
/*h(16769)=565 */ {16769, xed3_phash_find_mapevex_map5_opcode0x78_vv2_565_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17845)=568 */ {17845, xed3_phash_find_mapevex_map5_opcode0x78_vv2_568_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8585)=571 */ {8585, xed3_phash_find_mapevex_map5_opcode0x78_vv2_571_l1},
|
|
/*h(1443)=572 */ {1443, xed3_phash_find_mapevex_map5_opcode0x78_vv2_572_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16803)=574 */ {16803, xed3_phash_find_mapevex_map5_opcode0x78_vv2_574_l1},
|
|
/*h(4493)=575 */ {4493, xed3_phash_find_mapevex_map5_opcode0x78_vv2_575_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12711)=577 */ {12711, xed3_phash_find_mapevex_map5_opcode0x78_vv2_577_l1},
|
|
/*h(401)=578 */ {401, xed3_phash_find_mapevex_map5_opcode0x78_vv2_578_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9606)=580 */ {9606, xed3_phash_find_mapevex_map5_opcode0x78_vv2_580_l1},
|
|
/*h(8619)=581 */ {8619, xed3_phash_find_mapevex_map5_opcode0x78_vv2_581_l1},
|
|
/*h(24966)=582 */ {24966, xed3_phash_find_mapevex_map5_opcode0x78_vv2_582_l1},
|
|
/*h(17824)=583 */ {17824, xed3_phash_find_mapevex_map5_opcode0x78_vv2_583_l1},
|
|
/*h(5514)=584 */ {5514, xed3_phash_find_mapevex_map5_opcode0x78_vv2_584_l1},
|
|
/*h(20874)=585 */ {20874, xed3_phash_find_mapevex_map5_opcode0x78_vv2_585_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1422)=587 */ {1422, xed3_phash_find_mapevex_map5_opcode0x78_vv2_587_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9640)=589 */ {9640, xed3_phash_find_mapevex_map5_opcode0x78_vv2_589_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25987)=591 */ {25987, xed3_phash_find_mapevex_map5_opcode0x78_vv2_591_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5548)=593 */ {5548, xed3_phash_find_mapevex_map5_opcode0x78_vv2_593_l1},
|
|
/*h(21895)=594 */ {21895, xed3_phash_find_mapevex_map5_opcode0x78_vv2_594_l1},
|
|
/*h(8598)=595 */ {8598, xed3_phash_find_mapevex_map5_opcode0x78_vv2_595_l1},
|
|
/*h(1456)=596 */ {1456, xed3_phash_find_mapevex_map5_opcode0x78_vv2_596_l1},
|
|
/*h(17803)=597 */ {17803, xed3_phash_find_mapevex_map5_opcode0x78_vv2_597_l1},
|
|
/*h(16816)=598 */ {16816, xed3_phash_find_mapevex_map5_opcode0x78_vv2_598_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26021)=600 */ {26021, xed3_phash_find_mapevex_map5_opcode0x78_vv2_600_l1},
|
|
/*h(13711)=601 */ {13711, xed3_phash_find_mapevex_map5_opcode0x78_vv2_601_l1},
|
|
/*h(29071)=602 */ {29071, xed3_phash_find_mapevex_map5_opcode0x78_vv2_602_l1},
|
|
/*h(21929)=603 */ {21929, xed3_phash_find_mapevex_map5_opcode0x78_vv2_603_l1},
|
|
/*h(9619)=604 */ {9619, xed3_phash_find_mapevex_map5_opcode0x78_vv2_604_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24979)=606 */ {24979, xed3_phash_find_mapevex_map5_opcode0x78_vv2_606_l1},
|
|
/*h(17837)=607 */ {17837, xed3_phash_find_mapevex_map5_opcode0x78_vv2_607_l1},
|
|
/*h(5527)=608 */ {5527, xed3_phash_find_mapevex_map5_opcode0x78_vv2_608_l1},
|
|
/*h(20887)=609 */ {20887, xed3_phash_find_mapevex_map5_opcode0x78_vv2_609_l1},
|
|
/*h(8577)=610 */ {8577, xed3_phash_find_mapevex_map5_opcode0x78_vv2_610_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9653)=613 */ {9653, xed3_phash_find_mapevex_map5_opcode0x78_vv2_613_l1},
|
|
/*h(4485)=614 */ {4485, xed3_phash_find_mapevex_map5_opcode0x78_vv2_614_l1},
|
|
/*h(26000)=615 */ {26000, xed3_phash_find_mapevex_map5_opcode0x78_vv2_615_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(393)=617 */ {393, xed3_phash_find_mapevex_map5_opcode0x78_vv2_617_l1},
|
|
/*h(21908)=618 */ {21908, xed3_phash_find_mapevex_map5_opcode0x78_vv2_618_l1},
|
|
/*h(8611)=619 */ {8611, xed3_phash_find_mapevex_map5_opcode0x78_vv2_619_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5506)=623 */ {5506, xed3_phash_find_mapevex_map5_opcode0x78_vv2_623_l1},
|
|
/*h(26034)=624 */ {26034, xed3_phash_find_mapevex_map5_opcode0x78_vv2_624_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1414)=626 */ {1414, xed3_phash_find_mapevex_map5_opcode0x78_vv2_626_l1},
|
|
/*h(21942)=627 */ {21942, xed3_phash_find_mapevex_map5_opcode0x78_vv2_627_l1},
|
|
/*h(9632)=628 */ {9632, xed3_phash_find_mapevex_map5_opcode0x78_vv2_628_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24992)=630 */ {24992, xed3_phash_find_mapevex_map5_opcode0x78_vv2_630_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5540)=632 */ {5540, xed3_phash_find_mapevex_map5_opcode0x78_vv2_632_l1},
|
|
/*h(20900)=633 */ {20900, xed3_phash_find_mapevex_map5_opcode0x78_vv2_633_l1},
|
|
/*h(8590)=634 */ {8590, xed3_phash_find_mapevex_map5_opcode0x78_vv2_634_l1},
|
|
/*h(1448)=635 */ {1448, xed3_phash_find_mapevex_map5_opcode0x78_vv2_635_l1},
|
|
/*h(17795)=636 */ {17795, xed3_phash_find_mapevex_map5_opcode0x78_vv2_636_l1},
|
|
/*h(16808)=637 */ {16808, xed3_phash_find_mapevex_map5_opcode0x78_vv2_637_l1},
|
|
/*h(4498)=638 */ {4498, xed3_phash_find_mapevex_map5_opcode0x78_vv2_638_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13703)=640 */ {13703, xed3_phash_find_mapevex_map5_opcode0x78_vv2_640_l1},
|
|
/*h(29063)=641 */ {29063, xed3_phash_find_mapevex_map5_opcode0x78_vv2_641_l1},
|
|
/*h(21921)=642 */ {21921, xed3_phash_find_mapevex_map5_opcode0x78_vv2_642_l1},
|
|
/*h(15766)=643 */ {15766, xed3_phash_find_mapevex_map5_opcode0x78_vv2_643_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17829)=645 */ {17829, xed3_phash_find_mapevex_map5_opcode0x78_vv2_645_l1},
|
|
/*h(5519)=646 */ {5519, xed3_phash_find_mapevex_map5_opcode0x78_vv2_646_l1},
|
|
/*h(4532)=647 */ {4532, xed3_phash_find_mapevex_map5_opcode0x78_vv2_647_l1},
|
|
/*h(20879)=648 */ {20879, xed3_phash_find_mapevex_map5_opcode0x78_vv2_648_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1427)=650 */ {1427, xed3_phash_find_mapevex_map5_opcode0x78_vv2_650_l1},
|
|
/*h(16787)=651 */ {16787, xed3_phash_find_mapevex_map5_opcode0x78_vv2_651_l1},
|
|
/*h(9645)=652 */ {9645, xed3_phash_find_mapevex_map5_opcode0x78_vv2_652_l1},
|
|
/*h(25992)=653 */ {25992, xed3_phash_find_mapevex_map5_opcode0x78_vv2_653_l1},
|
|
/*h(25005)=654 */ {25005, xed3_phash_find_mapevex_map5_opcode0x78_vv2_654_l1},
|
|
/*h(12695)=655 */ {12695, xed3_phash_find_mapevex_map5_opcode0x78_vv2_655_l1},
|
|
/*h(5553)=656 */ {5553, xed3_phash_find_mapevex_map5_opcode0x78_vv2_656_l1},
|
|
/*h(21900)=657 */ {21900, xed3_phash_find_mapevex_map5_opcode0x78_vv2_657_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1461)=659 */ {1461, xed3_phash_find_mapevex_map5_opcode0x78_vv2_659_l1},
|
|
/*h(17808)=660 */ {17808, xed3_phash_find_mapevex_map5_opcode0x78_vv2_660_l1},
|
|
/*h(16821)=661 */ {16821, xed3_phash_find_mapevex_map5_opcode0x78_vv2_661_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26026)=663 */ {26026, xed3_phash_find_mapevex_map5_opcode0x78_vv2_663_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(419)=665 */ {419, xed3_phash_find_mapevex_map5_opcode0x78_vv2_665_l1},
|
|
/*h(21934)=666 */ {21934, xed3_phash_find_mapevex_map5_opcode0x78_vv2_666_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17842)=669 */ {17842, xed3_phash_find_mapevex_map5_opcode0x78_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8582)=673 */ {8582, xed3_phash_find_mapevex_map5_opcode0x78_vv2_673_l1},
|
|
/*h(1440)=674 */ {1440, xed3_phash_find_mapevex_map5_opcode0x78_vv2_674_l1},
|
|
/*h(16800)=675 */ {16800, xed3_phash_find_mapevex_map5_opcode0x78_vv2_675_l1},
|
|
/*h(4490)=676 */ {4490, xed3_phash_find_mapevex_map5_opcode0x78_vv2_676_l1},
|
|
/*h(26005)=677 */ {26005, xed3_phash_find_mapevex_map5_opcode0x78_vv2_677_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(398)=680 */ {398, xed3_phash_find_mapevex_map5_opcode0x78_vv2_680_l1},
|
|
/*h(15758)=681 */ {15758, xed3_phash_find_mapevex_map5_opcode0x78_vv2_681_l1},
|
|
/*h(9603)=682 */ {9603, xed3_phash_find_mapevex_map5_opcode0x78_vv2_682_l1},
|
|
/*h(24963)=683 */ {24963, xed3_phash_find_mapevex_map5_opcode0x78_vv2_683_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11666)=685 */ {11666, xed3_phash_find_mapevex_map5_opcode0x78_vv2_685_l1},
|
|
/*h(26039)=686 */ {26039, xed3_phash_find_mapevex_map5_opcode0x78_vv2_686_l1},
|
|
/*h(20871)=687 */ {20871, xed3_phash_find_mapevex_map5_opcode0x78_vv2_687_l1},
|
|
/*h(7574)=688 */ {7574, xed3_phash_find_mapevex_map5_opcode0x78_vv2_688_l1},
|
|
/*h(1419)=689 */ {1419, xed3_phash_find_mapevex_map5_opcode0x78_vv2_689_l1},
|
|
/*h(16779)=690 */ {16779, xed3_phash_find_mapevex_map5_opcode0x78_vv2_690_l1},
|
|
/*h(9637)=691 */ {9637, xed3_phash_find_mapevex_map5_opcode0x78_vv2_691_l1},
|
|
/*h(25984)=692 */ {25984, xed3_phash_find_mapevex_map5_opcode0x78_vv2_692_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5545)=694 */ {5545, xed3_phash_find_mapevex_map5_opcode0x78_vv2_694_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 696ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5556)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5556, 7098},
|
|
/*h(388)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {388, 7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16772)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16772, 7089},
|
|
/*h(21940)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21940, 7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_399_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(420)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {420, 7089},
|
|
/*h(29077)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29077, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16804)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_516_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(396)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {396, 7089},
|
|
/*h(21911)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21911, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16780)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16780;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7570)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7570, 7151},
|
|
/*h(1415)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1415, 7101},
|
|
/*h(428)=2 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {428, 7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16812)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16812, 7089},
|
|
/*h(17799)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17799, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(404)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {404, 7089},
|
|
/*h(29061)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29061, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16788)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16788, 7089},
|
|
/*h(9646)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9646, 7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(436)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 7089},
|
|
/*h(29093)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29093, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16820)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16820, 7089},
|
|
/*h(17807)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17807, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(390)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 390;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21942)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21942, 7098},
|
|
/*h(16774)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16774, 7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_563_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(422)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {422, 7089},
|
|
/*h(1409)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1409, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16806)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16806, 7089},
|
|
/*h(17793)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17793, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(398)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 398;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_589_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16782)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16782, 7089},
|
|
/*h(9640)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9640, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(430)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 430;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16814)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16814, 7089},
|
|
/*h(17801)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17801, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_641_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(406)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {406, 7089},
|
|
/*h(29063)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29063, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_550_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16790)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16790;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29095)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29095, 7094},
|
|
/*h(1425)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1425, 7097},
|
|
/*h(438)=2 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11654)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11654, 7152},
|
|
/*h(16822)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16822, 7089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_226_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(384)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 384;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21936)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21936, 7099},
|
|
/*h(16768)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16768, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(416)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {416, 7090},
|
|
/*h(21931)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21931, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16800)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(392)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 392;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16776)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16776;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(424)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16808)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16808;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(400)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 400;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16784)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16784;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_689_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(432)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {432, 7090},
|
|
/*h(1419)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1419, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_598_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16816)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16816;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(386)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {386, 7090},
|
|
/*h(5554)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5554, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_299_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16770)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16770, 7090},
|
|
/*h(21938)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21938, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(418)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 418;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16802)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16802, 7090},
|
|
/*h(15815)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15815, 7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(394)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 394;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_260_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16778)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(426)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {426, 7090},
|
|
/*h(1413)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1413, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16810)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16810, 7090},
|
|
/*h(15823)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15823, 7153},
|
|
/*h(17797)=2 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17797, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(402)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 402;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_221_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16786)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(434)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {434, 7090},
|
|
/*h(1421)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1421, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(17805)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17805, 7101},
|
|
/*h(11650)=1 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11650, 7154},
|
|
/*h(16818)=2 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16818, 7090},
|
|
/*h(15831)=3 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15831, 7156}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5553)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5553, 7099},
|
|
/*h(385)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {385, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_565_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16769)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16769;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_501_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(417)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 417;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16801)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16801;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(393)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 393;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_526_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16777)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16777;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1412)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1412, 7096},
|
|
/*h(425)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {425, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15822)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15822, 7152},
|
|
/*h(16809)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16809, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(401)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 401;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_487_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16785)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16785;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1420)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1420, 7096},
|
|
/*h(433)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {433, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(15830)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15830, 7155},
|
|
/*h(16817)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16817, 7090},
|
|
/*h(17804)=2 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17804, 7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(387)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {387, 7090},
|
|
/*h(5555)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5555, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21939)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21939, 7099},
|
|
/*h(16771)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16771, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_665_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(419)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 419;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16803)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11718)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11718, 7152},
|
|
/*h(395)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {395, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_690_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16779)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16779;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_626_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1414)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1414, 7096},
|
|
/*h(427)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {427, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17798)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17798, 7096},
|
|
/*h(16811)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16811, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(403)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 403;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16787)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16787;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_587_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1422)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1422, 7096},
|
|
/*h(435)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {435, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17806)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17806, 7096},
|
|
/*h(16819)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {16819, 7090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4484)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4484, 7091},
|
|
/*h(25999)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25999, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20868)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20868, 7091},
|
|
/*h(26036)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26036, 7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11658)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11658, 7154},
|
|
/*h(4516)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4516, 7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_633_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20900)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20900;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4492)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4492;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20876)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20876, 7091},
|
|
/*h(3542)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3542, 7155}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4524)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4524, 7091},
|
|
/*h(26039)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26039, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_594_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20908)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20908, 7091},
|
|
/*h(21895)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21895, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4500)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4500;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20884)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20884;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_647_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4532)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4532;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20916)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20916;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9654)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9654, 7100},
|
|
/*h(4486)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4486, 7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20870)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4518)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20902)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20902, 7091},
|
|
/*h(21889)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21889, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4494)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20878)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4526)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4526, 7091},
|
|
/*h(5513)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5513, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20910)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4502)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20886)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20886;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4534)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4534, 7091},
|
|
/*h(5521)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5521, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21905)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21905, 7099},
|
|
/*h(15750)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15750, 7152},
|
|
/*h(20918)=2 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20918, 7091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9648)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9648, 7102},
|
|
/*h(4480)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4480, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20864)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20864;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4512)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20896)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4488)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20872)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4520)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4520, 7092},
|
|
/*h(5507)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5507, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20904)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4496)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4496;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20880)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20880;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4528)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4528, 7092},
|
|
/*h(5515)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5515, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20912)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20912, 7092},
|
|
/*h(21899)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21899, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4482)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4482, 7092},
|
|
/*h(9650)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9650, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_624_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26034)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26034, 7102},
|
|
/*h(20866)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20866, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4514)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4514, 7092},
|
|
/*h(3527)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3527, 7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20898)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4490)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4490;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20874)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4522)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4522, 7092},
|
|
/*h(5509)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5509, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20906)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20906, 7092},
|
|
/*h(21893)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21893, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_638_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4498)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20882)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20882;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4530)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4530, 7092},
|
|
/*h(3543)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 7156}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21901)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21901, 7101},
|
|
/*h(20914)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20914, 7092},
|
|
/*h(15746)=2 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15746, 7154}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4481)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4481, 7092},
|
|
/*h(9649)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9649, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20865)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20865, 7092},
|
|
/*h(26033)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26033, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3526)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3526, 7152},
|
|
/*h(4513)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4513, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20897)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4489)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20873)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4521)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4521, 7092},
|
|
/*h(5508)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5508, 7098},
|
|
/*h(3534)=2 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3534, 7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21892)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21892, 7098},
|
|
/*h(20905)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20905, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4497)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4497;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20881)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20881;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5516)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5516, 7098},
|
|
/*h(4529)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4529, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21900)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21900, 7098},
|
|
/*h(20913)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20913, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_449_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9651)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9651, 7102},
|
|
/*h(4483)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4483, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20867)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20867, 7092},
|
|
/*h(26035)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26035, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_294_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4515)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4515;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20899)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20899;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_411_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26006)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26006, 7100},
|
|
/*h(4491)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4491, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20875)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5510)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5510, 7098},
|
|
/*h(4523)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {4523, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21894)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21894, 7098},
|
|
/*h(20907)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20907, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4499)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20883)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20883, 7092},
|
|
/*h(13741)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13741, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4531)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4531;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21902)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21902, 7098},
|
|
/*h(20915)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {20915, 7092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_509_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8580)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8580;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7630)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7630, 7152},
|
|
/*h(24964)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24964, 7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8612)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8612, 7093},
|
|
/*h(30127)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30127, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_262_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24996)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8588)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8588;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24972)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24972;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8620)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25004)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8596)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24980)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24980;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8628)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8628, 7093},
|
|
/*h(9615)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9615, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25012)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25012;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8582)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_582_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24966)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24966;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8614)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8614, 7093},
|
|
/*h(9601)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9601, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24998)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8590)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_543_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24974)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_479_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8622)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8622, 7093},
|
|
/*h(9609)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9609, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25006)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8598)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_504_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24982)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24982;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_440_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8630)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8630, 7093},
|
|
/*h(9617)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9617, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25014)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25014, 7093},
|
|
/*h(26001)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26001, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(389)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {389, 7094},
|
|
/*h(5557)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5557, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16773)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16773, 7094},
|
|
/*h(21941)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21941, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4485)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4485;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3535)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3535, 7153},
|
|
/*h(26037)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26037, 7101},
|
|
/*h(20869)=2 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20869, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13749)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13749, 7101},
|
|
/*h(8581)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8581, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24965)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24965;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12677)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12677, 7094},
|
|
/*h(17845)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17845, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1408)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1408, 7097},
|
|
/*h(421)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {421, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(15818)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15818, 7154},
|
|
/*h(17792)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17792, 7097},
|
|
/*h(16805)=2 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16805, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4517)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4517, 7094},
|
|
/*h(3530)=1 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3530, 7154},
|
|
/*h(26032)=2 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26032, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_367_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21888)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21888, 7099},
|
|
/*h(20901)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20901, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7626)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7626, 7154},
|
|
/*h(8613)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8613, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25984)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25984, 7102},
|
|
/*h(24997)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24997, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11722)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11722, 7154},
|
|
/*h(12709)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12709, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(397)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 397;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16781)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16781;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4493)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4493;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_484_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20877)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20877, 7094},
|
|
/*h(13735)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13735, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_204_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8589)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24973)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24973;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12685)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12685;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29069)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29069;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(429)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17800)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17800, 7097},
|
|
/*h(16813)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16813, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3538)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3538, 7157},
|
|
/*h(4525)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4525, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_328_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21896)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21896, 7099},
|
|
/*h(20909)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20909, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8621)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8621, 7094},
|
|
/*h(9608)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9608, 7102},
|
|
/*h(7634)=2 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7634, 7157}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25005)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11730)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11730, 7157},
|
|
/*h(12717)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12717, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1431)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1431, 7101},
|
|
/*h(29101)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29101, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(405)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 405;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16789)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16789;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4501)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4501;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20885)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20885;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8597)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24981)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12693)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12693;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(437)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 437;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16821)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5520)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5520, 7099},
|
|
/*h(4533)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4533, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20917)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20917;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9616)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9616, 7102},
|
|
/*h(8629)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8629, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26000)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26000, 7102},
|
|
/*h(25013)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25013, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12725)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12725;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29109)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29109;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5559)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5559, 7101},
|
|
/*h(391)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {391, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_362_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9633)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9633, 7102},
|
|
/*h(16775)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16775, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4487)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4487, 7094},
|
|
/*h(9655)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9655, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_687_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20871)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8583)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8583, 7094},
|
|
/*h(13751)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13751, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_316_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(30135)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30135, 7101},
|
|
/*h(24967)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24967, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17847)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17847, 7101},
|
|
/*h(12679)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12679, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17794)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17794, 7097},
|
|
/*h(16807)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16807, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_623_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5506)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5506, 7099},
|
|
/*h(4519)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4519, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20903)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9602)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9602, 7102},
|
|
/*h(8615)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8615, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24999)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_577_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12711)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(399)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 399;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16783)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4495)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_648_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20879)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20879;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8591)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_277_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24975)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_694_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12687)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12687, 7094},
|
|
/*h(5545)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5545, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29071)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1418)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1418, 7097},
|
|
/*h(431)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {431, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16815)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_584_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5514)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5514, 7099},
|
|
/*h(4527)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4527, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20911)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9610)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9610, 7102},
|
|
/*h(8623)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8623, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25994)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25994, 7102},
|
|
/*h(25007)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25007, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_538_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12719)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29103)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29103;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(407)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 407;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_284_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16791)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15826)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15826, 7157},
|
|
/*h(4503)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4503, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_609_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20887)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20887;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1457)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1457, 7097},
|
|
/*h(8599)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8599, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24983)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24983;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12695)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(29079)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29079, 7094},
|
|
/*h(21937)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21937, 7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1426)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1426, 7097},
|
|
/*h(439)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {439, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11655)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11655, 7153},
|
|
/*h(16823)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16823, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5522)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {5522, 7099},
|
|
/*h(4535)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4535, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20919)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20919, 7094},
|
|
/*h(21906)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {21906, 7099},
|
|
/*h(15751)=2 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15751, 7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9618)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9618, 7102},
|
|
/*h(8631)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8631, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26002)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26002, 7102},
|
|
/*h(25015)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25015, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7559)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7559, 7153},
|
|
/*h(12727)=1 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12727, 7094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(29111)=0 EVV 0x79 VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29111, 7094},
|
|
/*h(1441)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1441, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8576)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8576;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24960)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8608)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8608;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24992)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8584)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8584;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24968)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24968;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_682_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8616)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8616, 7095},
|
|
/*h(9603)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9603, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25000)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25000, 7095},
|
|
/*h(25987)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25987, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8592)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8592, 7095},
|
|
/*h(1450)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1450, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24976)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9611)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9611, 7102},
|
|
/*h(15766)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15766, 7149},
|
|
/*h(8624)=2 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8624, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25008)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25008, 7095},
|
|
/*h(25995)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {25995, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8578)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24962)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8610)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8610;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24994)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8586)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8586, 7095},
|
|
/*h(1444)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1444, 7096},
|
|
/*h(30101)=2 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30101, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24970)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8618)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8618, 7095},
|
|
/*h(9605)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9605, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25002)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25002, 7095},
|
|
/*h(25989)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25989, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8594)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24978)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24978, 7095},
|
|
/*h(17836)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17836, 7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8626)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8626, 7095},
|
|
/*h(3458)=1 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3458, 7154},
|
|
/*h(7639)=2 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7639, 7156}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25010)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25010, 7095},
|
|
/*h(25997)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25997, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8577)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8577;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24961)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24961;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7622)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7622, 7152},
|
|
/*h(8609)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8609, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24993)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8585)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8585;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24969)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24969;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_416_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9604)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9604, 7100},
|
|
/*h(8617)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8617, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25988)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25988, 7100},
|
|
/*h(25001)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25001, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_533_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8593)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8593;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3462)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3462, 7152},
|
|
/*h(24977)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24977, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7638)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7638, 7155},
|
|
/*h(8625)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8625, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25996)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25996, 7100},
|
|
/*h(25009)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25009, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8579)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8579;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24963)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8611)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24995)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8587)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8587;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_645_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17829)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17829, 7101},
|
|
/*h(24971)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {24971, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8619)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25990)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25990, 7100},
|
|
/*h(25003)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {25003, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8595)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8595;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_606_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24979)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24979;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9614)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9614, 7100},
|
|
/*h(8627)=1 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {8627, 7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25011)=0 EVV 0x79 VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {7095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25011;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17796)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17796;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17828)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17828;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1452)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1452;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_384_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1428)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1428, 7096},
|
|
/*h(30085)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30085, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17812)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17812;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_229_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1460)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1460, 7096},
|
|
/*h(30117)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30117, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17844)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17844;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1446)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1446, 7096},
|
|
/*h(30103)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30103, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17830)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1454)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17838)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_548_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1430)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1430, 7096},
|
|
/*h(30087)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30087, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17814)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1462)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1462, 7096},
|
|
/*h(30119)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30119, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17846)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1440)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1440;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17824)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17824;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1416)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1416;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1448)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17832)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1424)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17808)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17808;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1456)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17840)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1410)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1410;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1442)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17826)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17826, 7097},
|
|
/*h(11671)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11671, 7150}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17802)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17834)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17834;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17810)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17810;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1458)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17842)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11670)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11670, 7149},
|
|
/*h(17825)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {17825, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1417)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1417;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1449)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1449;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17833)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17833;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17809)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17809;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17841)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17841;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7566)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7566, 7152},
|
|
/*h(1411)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {1411, 7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17795)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1443)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1443;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17827)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17827;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17803)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1451)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1451;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17835)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1427)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1427;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17811)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17811;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1459)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1459;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17843)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5540)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5540;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_540_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21924)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5548)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21932)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5524)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5524;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_618_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21908)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5542)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21926)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5518)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5550)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_666_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21934)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5526)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21910)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5558)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7098}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5504)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5504;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5536)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5536;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21920)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21920;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5512)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5544)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5544;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21928)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21904)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5552)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5552;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_531_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21890)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_467_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5538)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21922)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21922;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21898)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_429_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5546)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5546;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21930)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21930;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5505)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5505;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5537)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5537;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21921)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21921;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21897)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21929)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21891)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5539)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21923)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21923;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5547)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5547;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5523)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5523;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21907)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7099}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9636)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9636;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26020)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26020;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_377_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9612)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9612, 7100},
|
|
/*h(15767)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15767, 7150}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9644)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26028)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9620)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26004)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9652)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9606)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9638)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26022)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_450_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25998)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26030)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9622)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26038)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7100}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13701)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13701;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1445)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1445;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5541)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5541;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21925)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21925;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9637)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9637;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26021)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26021;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13733)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13733;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_482_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5517)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9613)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9613;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7554)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7554, 7154},
|
|
/*h(11735)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11735, 7156},
|
|
/*h(13709)=2 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13709, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30093)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30093;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1453)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1453;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17837)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5549)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5549;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21933)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21933;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9645)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9645;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26029)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26029;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7623)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7623, 7153},
|
|
/*h(30125)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30125, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1429)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17813)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17813;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_443_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5525)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5525;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21909)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3466)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3466, 7154},
|
|
/*h(9621)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9621, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_677_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26005)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7562)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7562, 7154},
|
|
/*h(13717)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13717, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1461)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9653)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9653;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7631)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7631, 7153},
|
|
/*h(30133)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30133, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11666)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {11666, 7151},
|
|
/*h(5511)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5511, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15762)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {15762, 7151},
|
|
/*h(9607)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9607, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25991)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25991;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13703)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1447)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1447;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17831)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_530_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5543)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21927)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9639)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9639;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26023)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26023;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_321_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1423)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5519)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5519;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_555_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21903)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_601_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13711)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30095)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30095;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1455)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1455;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17839)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17839;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_491_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5551)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21935)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_121_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9647)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26031)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13743)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17815)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5527)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5527;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9623)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9623;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26007)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_562_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13719)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7618)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7618, 7154},
|
|
/*h(1463)=1 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1463, 7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21943)=0 EVV 0x79 V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7101}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9600)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9600;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9632)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9632;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_537_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26016)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_653_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25992)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3522)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {3522, 7154},
|
|
/*h(26024)=1 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {26024, 7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25986)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_97_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9634)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {9634, 7102},
|
|
/*h(3479)=1 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 7150}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26018)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9642)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_663_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26026)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_426_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25985)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25985;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26017)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26017;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25993)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9641)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26025)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9635)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9635;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26019)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9643)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9643;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26027)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26027;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9619)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26003)=0 EVV 0x79 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7102}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3478)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7149}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7574)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7149}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7575)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7150}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3474)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7151}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7558)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15814)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3470)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11662)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15758)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11726)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7152}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3463)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3463;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11719)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3471)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3471;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7567)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11663)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15759)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11727)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7153}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11714)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7154}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15810)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7154}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15810;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15754)=0 EVV 0x79 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE*/ {7154}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11734)=0 EVV 0x79 VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7155}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x79_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[696] = {
|
|
/*h(21892)=0 */ {21892, xed3_phash_find_mapevex_map5_opcode0x79_vv2_0_l1},
|
|
/*h(8595)=1 */ {8595, xed3_phash_find_mapevex_map5_opcode0x79_vv2_1_l1},
|
|
/*h(1453)=2 */ {1453, xed3_phash_find_mapevex_map5_opcode0x79_vv2_2_l1},
|
|
/*h(17800)=3 */ {17800, xed3_phash_find_mapevex_map5_opcode0x79_vv2_3_l1},
|
|
/*h(15826)=4 */ {15826, xed3_phash_find_mapevex_map5_opcode0x79_vv2_4_l1},
|
|
/*h(26018)=5 */ {26018, xed3_phash_find_mapevex_map5_opcode0x79_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11734)=7 */ {11734, xed3_phash_find_mapevex_map5_opcode0x79_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21926)=9 */ {21926, xed3_phash_find_mapevex_map5_opcode0x79_vv2_9_l1},
|
|
/*h(9616)=10 */ {9616, xed3_phash_find_mapevex_map5_opcode0x79_vv2_10_l1},
|
|
/*h(24976)=11 */ {24976, xed3_phash_find_mapevex_map5_opcode0x79_vv2_11_l1},
|
|
/*h(17834)=12 */ {17834, xed3_phash_find_mapevex_map5_opcode0x79_vv2_12_l1},
|
|
/*h(5524)=13 */ {5524, xed3_phash_find_mapevex_map5_opcode0x79_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20884)=15 */ {20884, xed3_phash_find_mapevex_map5_opcode0x79_vv2_15_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9650)=19 */ {9650, xed3_phash_find_mapevex_map5_opcode0x79_vv2_19_l1},
|
|
/*h(25997)=20 */ {25997, xed3_phash_find_mapevex_map5_opcode0x79_vv2_20_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5558)=22 */ {5558, xed3_phash_find_mapevex_map5_opcode0x79_vv2_22_l1},
|
|
/*h(390)=23 */ {390, xed3_phash_find_mapevex_map5_opcode0x79_vv2_23_l1},
|
|
/*h(15750)=24 */ {15750, xed3_phash_find_mapevex_map5_opcode0x79_vv2_24_l1},
|
|
/*h(8608)=25 */ {8608, xed3_phash_find_mapevex_map5_opcode0x79_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17813)=27 */ {17813, xed3_phash_find_mapevex_map5_opcode0x79_vv2_27_l1},
|
|
/*h(11658)=28 */ {11658, xed3_phash_find_mapevex_map5_opcode0x79_vv2_28_l1},
|
|
/*h(26031)=29 */ {26031, xed3_phash_find_mapevex_map5_opcode0x79_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7566)=31 */ {7566, xed3_phash_find_mapevex_map5_opcode0x79_vv2_31_l1},
|
|
/*h(424)=32 */ {424, xed3_phash_find_mapevex_map5_opcode0x79_vv2_32_l1},
|
|
/*h(21939)=33 */ {21939, xed3_phash_find_mapevex_map5_opcode0x79_vv2_33_l1},
|
|
/*h(3474)=34 */ {3474, xed3_phash_find_mapevex_map5_opcode0x79_vv2_34_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17847)=36 */ {17847, xed3_phash_find_mapevex_map5_opcode0x79_vv2_36_l1},
|
|
/*h(5537)=37 */ {5537, xed3_phash_find_mapevex_map5_opcode0x79_vv2_37_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20897)=39 */ {20897, xed3_phash_find_mapevex_map5_opcode0x79_vv2_39_l1},
|
|
/*h(8587)=40 */ {8587, xed3_phash_find_mapevex_map5_opcode0x79_vv2_40_l1},
|
|
/*h(1445)=41 */ {1445, xed3_phash_find_mapevex_map5_opcode0x79_vv2_41_l1},
|
|
/*h(15818)=42 */ {15818, xed3_phash_find_mapevex_map5_opcode0x79_vv2_42_l1},
|
|
/*h(4495)=43 */ {4495, xed3_phash_find_mapevex_map5_opcode0x79_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11726)=46 */ {11726, xed3_phash_find_mapevex_map5_opcode0x79_vv2_46_l1},
|
|
/*h(403)=47 */ {403, xed3_phash_find_mapevex_map5_opcode0x79_vv2_47_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7634)=49 */ {7634, xed3_phash_find_mapevex_map5_opcode0x79_vv2_49_l1},
|
|
/*h(24968)=50 */ {24968, xed3_phash_find_mapevex_map5_opcode0x79_vv2_50_l1},
|
|
/*h(11671)=51 */ {11671, xed3_phash_find_mapevex_map5_opcode0x79_vv2_51_l1},
|
|
/*h(5516)=52 */ {5516, xed3_phash_find_mapevex_map5_opcode0x79_vv2_52_l1},
|
|
/*h(3542)=53 */ {3542, xed3_phash_find_mapevex_map5_opcode0x79_vv2_53_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1424)=55 */ {1424, xed3_phash_find_mapevex_map5_opcode0x79_vv2_55_l1},
|
|
/*h(437)=56 */ {437, xed3_phash_find_mapevex_map5_opcode0x79_vv2_56_l1},
|
|
/*h(16784)=57 */ {16784, xed3_phash_find_mapevex_map5_opcode0x79_vv2_57_l1},
|
|
/*h(9642)=58 */ {9642, xed3_phash_find_mapevex_map5_opcode0x79_vv2_58_l1},
|
|
/*h(25989)=59 */ {25989, xed3_phash_find_mapevex_map5_opcode0x79_vv2_59_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5550)=61 */ {5550, xed3_phash_find_mapevex_map5_opcode0x79_vv2_61_l1},
|
|
/*h(21897)=62 */ {21897, xed3_phash_find_mapevex_map5_opcode0x79_vv2_62_l1},
|
|
/*h(20910)=63 */ {20910, xed3_phash_find_mapevex_map5_opcode0x79_vv2_63_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1458)=65 */ {1458, xed3_phash_find_mapevex_map5_opcode0x79_vv2_65_l1},
|
|
/*h(15831)=66 */ {15831, xed3_phash_find_mapevex_map5_opcode0x79_vv2_66_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26023)=68 */ {26023, xed3_phash_find_mapevex_map5_opcode0x79_vv2_68_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7558)=70 */ {7558, xed3_phash_find_mapevex_map5_opcode0x79_vv2_70_l1},
|
|
/*h(21931)=71 */ {21931, xed3_phash_find_mapevex_map5_opcode0x79_vv2_71_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3466)=73 */ {3466, xed3_phash_find_mapevex_map5_opcode0x79_vv2_73_l1},
|
|
/*h(24981)=74 */ {24981, xed3_phash_find_mapevex_map5_opcode0x79_vv2_74_l1},
|
|
/*h(17839)=75 */ {17839, xed3_phash_find_mapevex_map5_opcode0x79_vv2_75_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8579)=79 */ {8579, xed3_phash_find_mapevex_map5_opcode0x79_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15810)=81 */ {15810, xed3_phash_find_mapevex_map5_opcode0x79_vv2_81_l1},
|
|
/*h(9655)=82 */ {9655, xed3_phash_find_mapevex_map5_opcode0x79_vv2_82_l1},
|
|
/*h(26002)=83 */ {26002, xed3_phash_find_mapevex_map5_opcode0x79_vv2_83_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11718)=85 */ {11718, xed3_phash_find_mapevex_map5_opcode0x79_vv2_85_l1},
|
|
/*h(21910)=86 */ {21910, xed3_phash_find_mapevex_map5_opcode0x79_vv2_86_l1},
|
|
/*h(9600)=87 */ {9600, xed3_phash_find_mapevex_map5_opcode0x79_vv2_87_l1},
|
|
/*h(7626)=88 */ {7626, xed3_phash_find_mapevex_map5_opcode0x79_vv2_88_l1},
|
|
/*h(24960)=89 */ {24960, xed3_phash_find_mapevex_map5_opcode0x79_vv2_89_l1},
|
|
/*h(11663)=90 */ {11663, xed3_phash_find_mapevex_map5_opcode0x79_vv2_90_l1},
|
|
/*h(3534)=91 */ {3534, xed3_phash_find_mapevex_map5_opcode0x79_vv2_91_l1},
|
|
/*h(26036)=92 */ {26036, xed3_phash_find_mapevex_map5_opcode0x79_vv2_92_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1416)=94 */ {1416, xed3_phash_find_mapevex_map5_opcode0x79_vv2_94_l1},
|
|
/*h(429)=95 */ {429, xed3_phash_find_mapevex_map5_opcode0x79_vv2_95_l1},
|
|
/*h(16776)=96 */ {16776, xed3_phash_find_mapevex_map5_opcode0x79_vv2_96_l1},
|
|
/*h(3479)=97 */ {3479, xed3_phash_find_mapevex_map5_opcode0x79_vv2_97_l1},
|
|
/*h(24994)=98 */ {24994, xed3_phash_find_mapevex_map5_opcode0x79_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5542)=100 */ {5542, xed3_phash_find_mapevex_map5_opcode0x79_vv2_100_l1},
|
|
/*h(21889)=101 */ {21889, xed3_phash_find_mapevex_map5_opcode0x79_vv2_101_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1450)=103 */ {1450, xed3_phash_find_mapevex_map5_opcode0x79_vv2_103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15823)=105 */ {15823, xed3_phash_find_mapevex_map5_opcode0x79_vv2_105_l1},
|
|
/*h(4500)=106 */ {4500, xed3_phash_find_mapevex_map5_opcode0x79_vv2_106_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21923)=110 */ {21923, xed3_phash_find_mapevex_map5_opcode0x79_vv2_110_l1},
|
|
/*h(9613)=111 */ {9613, xed3_phash_find_mapevex_map5_opcode0x79_vv2_111_l1},
|
|
/*h(7639)=112 */ {7639, xed3_phash_find_mapevex_map5_opcode0x79_vv2_112_l1},
|
|
/*h(24973)=113 */ {24973, xed3_phash_find_mapevex_map5_opcode0x79_vv2_113_l1},
|
|
/*h(17831)=114 */ {17831, xed3_phash_find_mapevex_map5_opcode0x79_vv2_114_l1},
|
|
/*h(5521)=115 */ {5521, xed3_phash_find_mapevex_map5_opcode0x79_vv2_115_l1},
|
|
/*h(20881)=116 */ {20881, xed3_phash_find_mapevex_map5_opcode0x79_vv2_116_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1429)=118 */ {1429, xed3_phash_find_mapevex_map5_opcode0x79_vv2_118_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16789)=120 */ {16789, xed3_phash_find_mapevex_map5_opcode0x79_vv2_120_l1},
|
|
/*h(9647)=121 */ {9647, xed3_phash_find_mapevex_map5_opcode0x79_vv2_121_l1},
|
|
/*h(25994)=122 */ {25994, xed3_phash_find_mapevex_map5_opcode0x79_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5555)=124 */ {5555, xed3_phash_find_mapevex_map5_opcode0x79_vv2_124_l1},
|
|
/*h(21902)=125 */ {21902, xed3_phash_find_mapevex_map5_opcode0x79_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7618)=127 */ {7618, xed3_phash_find_mapevex_map5_opcode0x79_vv2_127_l1},
|
|
/*h(17810)=128 */ {17810, xed3_phash_find_mapevex_map5_opcode0x79_vv2_128_l1},
|
|
/*h(11655)=129 */ {11655, xed3_phash_find_mapevex_map5_opcode0x79_vv2_129_l1},
|
|
/*h(3526)=130 */ {3526, xed3_phash_find_mapevex_map5_opcode0x79_vv2_130_l1},
|
|
/*h(26028)=131 */ {26028, xed3_phash_find_mapevex_map5_opcode0x79_vv2_131_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1408)=133 */ {1408, xed3_phash_find_mapevex_map5_opcode0x79_vv2_133_l1},
|
|
/*h(21936)=134 */ {21936, xed3_phash_find_mapevex_map5_opcode0x79_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3471)=136 */ {3471, xed3_phash_find_mapevex_map5_opcode0x79_vv2_136_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17844)=138 */ {17844, xed3_phash_find_mapevex_map5_opcode0x79_vv2_138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8584)=141 */ {8584, xed3_phash_find_mapevex_map5_opcode0x79_vv2_141_l1},
|
|
/*h(1442)=142 */ {1442, xed3_phash_find_mapevex_map5_opcode0x79_vv2_142_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15815)=144 */ {15815, xed3_phash_find_mapevex_map5_opcode0x79_vv2_144_l1},
|
|
/*h(4492)=145 */ {4492, xed3_phash_find_mapevex_map5_opcode0x79_vv2_145_l1},
|
|
/*h(26007)=146 */ {26007, xed3_phash_find_mapevex_map5_opcode0x79_vv2_146_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(400)=148 */ {400, xed3_phash_find_mapevex_map5_opcode0x79_vv2_148_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9605)=150 */ {9605, xed3_phash_find_mapevex_map5_opcode0x79_vv2_150_l1},
|
|
/*h(7631)=151 */ {7631, xed3_phash_find_mapevex_map5_opcode0x79_vv2_151_l1},
|
|
/*h(24965)=152 */ {24965, xed3_phash_find_mapevex_map5_opcode0x79_vv2_152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5513)=154 */ {5513, xed3_phash_find_mapevex_map5_opcode0x79_vv2_154_l1},
|
|
/*h(20873)=155 */ {20873, xed3_phash_find_mapevex_map5_opcode0x79_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1421)=157 */ {1421, xed3_phash_find_mapevex_map5_opcode0x79_vv2_157_l1},
|
|
/*h(16781)=158 */ {16781, xed3_phash_find_mapevex_map5_opcode0x79_vv2_158_l1},
|
|
/*h(9639)=159 */ {9639, xed3_phash_find_mapevex_map5_opcode0x79_vv2_159_l1},
|
|
/*h(25986)=160 */ {25986, xed3_phash_find_mapevex_map5_opcode0x79_vv2_160_l1},
|
|
/*h(24999)=161 */ {24999, xed3_phash_find_mapevex_map5_opcode0x79_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5547)=163 */ {5547, xed3_phash_find_mapevex_map5_opcode0x79_vv2_163_l1},
|
|
/*h(21894)=164 */ {21894, xed3_phash_find_mapevex_map5_opcode0x79_vv2_164_l1},
|
|
/*h(8597)=165 */ {8597, xed3_phash_find_mapevex_map5_opcode0x79_vv2_165_l1},
|
|
/*h(1455)=166 */ {1455, xed3_phash_find_mapevex_map5_opcode0x79_vv2_166_l1},
|
|
/*h(17802)=167 */ {17802, xed3_phash_find_mapevex_map5_opcode0x79_vv2_167_l1},
|
|
/*h(16815)=168 */ {16815, xed3_phash_find_mapevex_map5_opcode0x79_vv2_168_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26020)=170 */ {26020, xed3_phash_find_mapevex_map5_opcode0x79_vv2_170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21928)=173 */ {21928, xed3_phash_find_mapevex_map5_opcode0x79_vv2_173_l1},
|
|
/*h(9618)=174 */ {9618, xed3_phash_find_mapevex_map5_opcode0x79_vv2_174_l1},
|
|
/*h(3463)=175 */ {3463, xed3_phash_find_mapevex_map5_opcode0x79_vv2_175_l1},
|
|
/*h(17836)=176 */ {17836, xed3_phash_find_mapevex_map5_opcode0x79_vv2_176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5526)=178 */ {5526, xed3_phash_find_mapevex_map5_opcode0x79_vv2_178_l1},
|
|
/*h(20886)=179 */ {20886, xed3_phash_find_mapevex_map5_opcode0x79_vv2_179_l1},
|
|
/*h(8576)=180 */ {8576, xed3_phash_find_mapevex_map5_opcode0x79_vv2_180_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9652)=183 */ {9652, xed3_phash_find_mapevex_map5_opcode0x79_vv2_183_l1},
|
|
/*h(25999)=184 */ {25999, xed3_phash_find_mapevex_map5_opcode0x79_vv2_184_l1},
|
|
/*h(25012)=185 */ {25012, xed3_phash_find_mapevex_map5_opcode0x79_vv2_185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(392)=187 */ {392, xed3_phash_find_mapevex_map5_opcode0x79_vv2_187_l1},
|
|
/*h(21907)=188 */ {21907, xed3_phash_find_mapevex_map5_opcode0x79_vv2_188_l1},
|
|
/*h(8610)=189 */ {8610, xed3_phash_find_mapevex_map5_opcode0x79_vv2_189_l1},
|
|
/*h(7623)=190 */ {7623, xed3_phash_find_mapevex_map5_opcode0x79_vv2_190_l1},
|
|
/*h(17815)=191 */ {17815, xed3_phash_find_mapevex_map5_opcode0x79_vv2_191_l1},
|
|
/*h(5505)=192 */ {5505, xed3_phash_find_mapevex_map5_opcode0x79_vv2_192_l1},
|
|
/*h(4518)=193 */ {4518, xed3_phash_find_mapevex_map5_opcode0x79_vv2_193_l1},
|
|
/*h(26033)=194 */ {26033, xed3_phash_find_mapevex_map5_opcode0x79_vv2_194_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1413)=196 */ {1413, xed3_phash_find_mapevex_map5_opcode0x79_vv2_196_l1},
|
|
/*h(21941)=197 */ {21941, xed3_phash_find_mapevex_map5_opcode0x79_vv2_197_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5539)=202 */ {5539, xed3_phash_find_mapevex_map5_opcode0x79_vv2_202_l1},
|
|
/*h(20899)=203 */ {20899, xed3_phash_find_mapevex_map5_opcode0x79_vv2_203_l1},
|
|
/*h(8589)=204 */ {8589, xed3_phash_find_mapevex_map5_opcode0x79_vv2_204_l1},
|
|
/*h(1447)=205 */ {1447, xed3_phash_find_mapevex_map5_opcode0x79_vv2_205_l1},
|
|
/*h(17794)=206 */ {17794, xed3_phash_find_mapevex_map5_opcode0x79_vv2_206_l1},
|
|
/*h(4497)=207 */ {4497, xed3_phash_find_mapevex_map5_opcode0x79_vv2_207_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(405)=211 */ {405, xed3_phash_find_mapevex_map5_opcode0x79_vv2_211_l1},
|
|
/*h(21920)=212 */ {21920, xed3_phash_find_mapevex_map5_opcode0x79_vv2_212_l1},
|
|
/*h(9610)=213 */ {9610, xed3_phash_find_mapevex_map5_opcode0x79_vv2_213_l1},
|
|
/*h(24970)=214 */ {24970, xed3_phash_find_mapevex_map5_opcode0x79_vv2_214_l1},
|
|
/*h(17828)=215 */ {17828, xed3_phash_find_mapevex_map5_opcode0x79_vv2_215_l1},
|
|
/*h(5518)=216 */ {5518, xed3_phash_find_mapevex_map5_opcode0x79_vv2_216_l1},
|
|
/*h(4531)=217 */ {4531, xed3_phash_find_mapevex_map5_opcode0x79_vv2_217_l1},
|
|
/*h(20878)=218 */ {20878, xed3_phash_find_mapevex_map5_opcode0x79_vv2_218_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1426)=220 */ {1426, xed3_phash_find_mapevex_map5_opcode0x79_vv2_220_l1},
|
|
/*h(16786)=221 */ {16786, xed3_phash_find_mapevex_map5_opcode0x79_vv2_221_l1},
|
|
/*h(9644)=222 */ {9644, xed3_phash_find_mapevex_map5_opcode0x79_vv2_222_l1},
|
|
/*h(25991)=223 */ {25991, xed3_phash_find_mapevex_map5_opcode0x79_vv2_223_l1},
|
|
/*h(25004)=224 */ {25004, xed3_phash_find_mapevex_map5_opcode0x79_vv2_224_l1},
|
|
/*h(5552)=225 */ {5552, xed3_phash_find_mapevex_map5_opcode0x79_vv2_225_l1},
|
|
/*h(384)=226 */ {384, xed3_phash_find_mapevex_map5_opcode0x79_vv2_226_l1},
|
|
/*h(21899)=227 */ {21899, xed3_phash_find_mapevex_map5_opcode0x79_vv2_227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30117)=229 */ {30117, xed3_phash_find_mapevex_map5_opcode0x79_vv2_229_l1},
|
|
/*h(17807)=230 */ {17807, xed3_phash_find_mapevex_map5_opcode0x79_vv2_230_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26025)=232 */ {26025, xed3_phash_find_mapevex_map5_opcode0x79_vv2_232_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(418)=235 */ {418, xed3_phash_find_mapevex_map5_opcode0x79_vv2_235_l1},
|
|
/*h(21933)=236 */ {21933, xed3_phash_find_mapevex_map5_opcode0x79_vv2_236_l1},
|
|
/*h(9623)=237 */ {9623, xed3_phash_find_mapevex_map5_opcode0x79_vv2_237_l1},
|
|
/*h(24983)=238 */ {24983, xed3_phash_find_mapevex_map5_opcode0x79_vv2_238_l1},
|
|
/*h(17841)=239 */ {17841, xed3_phash_find_mapevex_map5_opcode0x79_vv2_239_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13749)=243 */ {13749, xed3_phash_find_mapevex_map5_opcode0x79_vv2_243_l1},
|
|
/*h(29109)=244 */ {29109, xed3_phash_find_mapevex_map5_opcode0x79_vv2_244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4489)=246 */ {4489, xed3_phash_find_mapevex_map5_opcode0x79_vv2_246_l1},
|
|
/*h(26004)=247 */ {26004, xed3_phash_find_mapevex_map5_opcode0x79_vv2_247_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(397)=250 */ {397, xed3_phash_find_mapevex_map5_opcode0x79_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9602)=252 */ {9602, xed3_phash_find_mapevex_map5_opcode0x79_vv2_252_l1},
|
|
/*h(24962)=253 */ {24962, xed3_phash_find_mapevex_map5_opcode0x79_vv2_253_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5510)=255 */ {5510, xed3_phash_find_mapevex_map5_opcode0x79_vv2_255_l1},
|
|
/*h(26038)=256 */ {26038, xed3_phash_find_mapevex_map5_opcode0x79_vv2_256_l1},
|
|
/*h(20870)=257 */ {20870, xed3_phash_find_mapevex_map5_opcode0x79_vv2_257_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1418)=259 */ {1418, xed3_phash_find_mapevex_map5_opcode0x79_vv2_259_l1},
|
|
/*h(16778)=260 */ {16778, xed3_phash_find_mapevex_map5_opcode0x79_vv2_260_l1},
|
|
/*h(9636)=261 */ {9636, xed3_phash_find_mapevex_map5_opcode0x79_vv2_261_l1},
|
|
/*h(24996)=262 */ {24996, xed3_phash_find_mapevex_map5_opcode0x79_vv2_262_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5544)=264 */ {5544, xed3_phash_find_mapevex_map5_opcode0x79_vv2_264_l1},
|
|
/*h(21891)=265 */ {21891, xed3_phash_find_mapevex_map5_opcode0x79_vv2_265_l1},
|
|
/*h(20904)=266 */ {20904, xed3_phash_find_mapevex_map5_opcode0x79_vv2_266_l1},
|
|
/*h(8594)=267 */ {8594, xed3_phash_find_mapevex_map5_opcode0x79_vv2_267_l1},
|
|
/*h(1452)=268 */ {1452, xed3_phash_find_mapevex_map5_opcode0x79_vv2_268_l1},
|
|
/*h(17799)=269 */ {17799, xed3_phash_find_mapevex_map5_opcode0x79_vv2_269_l1},
|
|
/*h(4502)=270 */ {4502, xed3_phash_find_mapevex_map5_opcode0x79_vv2_270_l1},
|
|
/*h(26017)=271 */ {26017, xed3_phash_find_mapevex_map5_opcode0x79_vv2_271_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21925)=275 */ {21925, xed3_phash_find_mapevex_map5_opcode0x79_vv2_275_l1},
|
|
/*h(9615)=276 */ {9615, xed3_phash_find_mapevex_map5_opcode0x79_vv2_276_l1},
|
|
/*h(24975)=277 */ {24975, xed3_phash_find_mapevex_map5_opcode0x79_vv2_277_l1},
|
|
/*h(17833)=278 */ {17833, xed3_phash_find_mapevex_map5_opcode0x79_vv2_278_l1},
|
|
/*h(5523)=279 */ {5523, xed3_phash_find_mapevex_map5_opcode0x79_vv2_279_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13741)=281 */ {13741, xed3_phash_find_mapevex_map5_opcode0x79_vv2_281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1431)=283 */ {1431, xed3_phash_find_mapevex_map5_opcode0x79_vv2_283_l1},
|
|
/*h(16791)=284 */ {16791, xed3_phash_find_mapevex_map5_opcode0x79_vv2_284_l1},
|
|
/*h(9649)=285 */ {9649, xed3_phash_find_mapevex_map5_opcode0x79_vv2_285_l1},
|
|
/*h(25996)=286 */ {25996, xed3_phash_find_mapevex_map5_opcode0x79_vv2_286_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5557)=288 */ {5557, xed3_phash_find_mapevex_map5_opcode0x79_vv2_288_l1},
|
|
/*h(21904)=289 */ {21904, xed3_phash_find_mapevex_map5_opcode0x79_vv2_289_l1},
|
|
/*h(20917)=290 */ {20917, xed3_phash_find_mapevex_map5_opcode0x79_vv2_290_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17812)=293 */ {17812, xed3_phash_find_mapevex_map5_opcode0x79_vv2_293_l1},
|
|
/*h(4515)=294 */ {4515, xed3_phash_find_mapevex_map5_opcode0x79_vv2_294_l1},
|
|
/*h(26030)=295 */ {26030, xed3_phash_find_mapevex_map5_opcode0x79_vv2_295_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1410)=297 */ {1410, xed3_phash_find_mapevex_map5_opcode0x79_vv2_297_l1},
|
|
/*h(423)=298 */ {423, xed3_phash_find_mapevex_map5_opcode0x79_vv2_298_l1},
|
|
/*h(21938)=299 */ {21938, xed3_phash_find_mapevex_map5_opcode0x79_vv2_299_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17846)=302 */ {17846, xed3_phash_find_mapevex_map5_opcode0x79_vv2_302_l1},
|
|
/*h(5536)=303 */ {5536, xed3_phash_find_mapevex_map5_opcode0x79_vv2_303_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20896)=305 */ {20896, xed3_phash_find_mapevex_map5_opcode0x79_vv2_305_l1},
|
|
/*h(30101)=306 */ {30101, xed3_phash_find_mapevex_map5_opcode0x79_vv2_306_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16804)=308 */ {16804, xed3_phash_find_mapevex_map5_opcode0x79_vv2_308_l1},
|
|
/*h(4494)=309 */ {4494, xed3_phash_find_mapevex_map5_opcode0x79_vv2_309_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(402)=312 */ {402, xed3_phash_find_mapevex_map5_opcode0x79_vv2_312_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15762)=314 */ {15762, xed3_phash_find_mapevex_map5_opcode0x79_vv2_314_l1},
|
|
/*h(8620)=315 */ {8620, xed3_phash_find_mapevex_map5_opcode0x79_vv2_315_l1},
|
|
/*h(30135)=316 */ {30135, xed3_phash_find_mapevex_map5_opcode0x79_vv2_316_l1},
|
|
/*h(11670)=317 */ {11670, xed3_phash_find_mapevex_map5_opcode0x79_vv2_317_l1},
|
|
/*h(5515)=318 */ {5515, xed3_phash_find_mapevex_map5_opcode0x79_vv2_318_l1},
|
|
/*h(20875)=319 */ {20875, xed3_phash_find_mapevex_map5_opcode0x79_vv2_319_l1},
|
|
/*h(13733)=320 */ {13733, xed3_phash_find_mapevex_map5_opcode0x79_vv2_320_l1},
|
|
/*h(1423)=321 */ {1423, xed3_phash_find_mapevex_map5_opcode0x79_vv2_321_l1},
|
|
/*h(29093)=322 */ {29093, xed3_phash_find_mapevex_map5_opcode0x79_vv2_322_l1},
|
|
/*h(16783)=323 */ {16783, xed3_phash_find_mapevex_map5_opcode0x79_vv2_323_l1},
|
|
/*h(9641)=324 */ {9641, xed3_phash_find_mapevex_map5_opcode0x79_vv2_324_l1},
|
|
/*h(25988)=325 */ {25988, xed3_phash_find_mapevex_map5_opcode0x79_vv2_325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5549)=327 */ {5549, xed3_phash_find_mapevex_map5_opcode0x79_vv2_327_l1},
|
|
/*h(21896)=328 */ {21896, xed3_phash_find_mapevex_map5_opcode0x79_vv2_328_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1457)=330 */ {1457, xed3_phash_find_mapevex_map5_opcode0x79_vv2_330_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15830)=332 */ {15830, xed3_phash_find_mapevex_map5_opcode0x79_vv2_332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26022)=334 */ {26022, xed3_phash_find_mapevex_map5_opcode0x79_vv2_334_l1},
|
|
/*h(12725)=335 */ {12725, xed3_phash_find_mapevex_map5_opcode0x79_vv2_335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21930)=337 */ {21930, xed3_phash_find_mapevex_map5_opcode0x79_vv2_337_l1},
|
|
/*h(9620)=338 */ {9620, xed3_phash_find_mapevex_map5_opcode0x79_vv2_338_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24980)=340 */ {24980, xed3_phash_find_mapevex_map5_opcode0x79_vv2_340_l1},
|
|
/*h(17838)=341 */ {17838, xed3_phash_find_mapevex_map5_opcode0x79_vv2_341_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8578)=344 */ {8578, xed3_phash_find_mapevex_map5_opcode0x79_vv2_344_l1},
|
|
/*h(30093)=345 */ {30093, xed3_phash_find_mapevex_map5_opcode0x79_vv2_345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9654)=348 */ {9654, xed3_phash_find_mapevex_map5_opcode0x79_vv2_348_l1},
|
|
/*h(26001)=349 */ {26001, xed3_phash_find_mapevex_map5_opcode0x79_vv2_349_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(394)=351 */ {394, xed3_phash_find_mapevex_map5_opcode0x79_vv2_351_l1},
|
|
/*h(21909)=352 */ {21909, xed3_phash_find_mapevex_map5_opcode0x79_vv2_352_l1},
|
|
/*h(15754)=353 */ {15754, xed3_phash_find_mapevex_map5_opcode0x79_vv2_353_l1},
|
|
/*h(30127)=354 */ {30127, xed3_phash_find_mapevex_map5_opcode0x79_vv2_354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11662)=356 */ {11662, xed3_phash_find_mapevex_map5_opcode0x79_vv2_356_l1},
|
|
/*h(5507)=357 */ {5507, xed3_phash_find_mapevex_map5_opcode0x79_vv2_357_l1},
|
|
/*h(26035)=358 */ {26035, xed3_phash_find_mapevex_map5_opcode0x79_vv2_358_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7570)=360 */ {7570, xed3_phash_find_mapevex_map5_opcode0x79_vv2_360_l1},
|
|
/*h(21943)=361 */ {21943, xed3_phash_find_mapevex_map5_opcode0x79_vv2_361_l1},
|
|
/*h(9633)=362 */ {9633, xed3_phash_find_mapevex_map5_opcode0x79_vv2_362_l1},
|
|
/*h(3478)=363 */ {3478, xed3_phash_find_mapevex_map5_opcode0x79_vv2_363_l1},
|
|
/*h(24993)=364 */ {24993, xed3_phash_find_mapevex_map5_opcode0x79_vv2_364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5541)=366 */ {5541, xed3_phash_find_mapevex_map5_opcode0x79_vv2_366_l1},
|
|
/*h(21888)=367 */ {21888, xed3_phash_find_mapevex_map5_opcode0x79_vv2_367_l1},
|
|
/*h(8591)=368 */ {8591, xed3_phash_find_mapevex_map5_opcode0x79_vv2_368_l1},
|
|
/*h(1449)=369 */ {1449, xed3_phash_find_mapevex_map5_opcode0x79_vv2_369_l1},
|
|
/*h(17796)=370 */ {17796, xed3_phash_find_mapevex_map5_opcode0x79_vv2_370_l1},
|
|
/*h(15822)=371 */ {15822, xed3_phash_find_mapevex_map5_opcode0x79_vv2_371_l1},
|
|
/*h(4499)=372 */ {4499, xed3_phash_find_mapevex_map5_opcode0x79_vv2_372_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11730)=374 */ {11730, xed3_phash_find_mapevex_map5_opcode0x79_vv2_374_l1},
|
|
/*h(407)=375 */ {407, xed3_phash_find_mapevex_map5_opcode0x79_vv2_375_l1},
|
|
/*h(21922)=376 */ {21922, xed3_phash_find_mapevex_map5_opcode0x79_vv2_376_l1},
|
|
/*h(15767)=377 */ {15767, xed3_phash_find_mapevex_map5_opcode0x79_vv2_377_l1},
|
|
/*h(7638)=378 */ {7638, xed3_phash_find_mapevex_map5_opcode0x79_vv2_378_l1},
|
|
/*h(24972)=379 */ {24972, xed3_phash_find_mapevex_map5_opcode0x79_vv2_379_l1},
|
|
/*h(17830)=380 */ {17830, xed3_phash_find_mapevex_map5_opcode0x79_vv2_380_l1},
|
|
/*h(5520)=381 */ {5520, xed3_phash_find_mapevex_map5_opcode0x79_vv2_381_l1},
|
|
/*h(20880)=382 */ {20880, xed3_phash_find_mapevex_map5_opcode0x79_vv2_382_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30085)=384 */ {30085, xed3_phash_find_mapevex_map5_opcode0x79_vv2_384_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9646)=386 */ {9646, xed3_phash_find_mapevex_map5_opcode0x79_vv2_386_l1},
|
|
/*h(25993)=387 */ {25993, xed3_phash_find_mapevex_map5_opcode0x79_vv2_387_l1},
|
|
/*h(25006)=388 */ {25006, xed3_phash_find_mapevex_map5_opcode0x79_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5554)=390 */ {5554, xed3_phash_find_mapevex_map5_opcode0x79_vv2_390_l1},
|
|
/*h(15746)=391 */ {15746, xed3_phash_find_mapevex_map5_opcode0x79_vv2_391_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30119)=393 */ {30119, xed3_phash_find_mapevex_map5_opcode0x79_vv2_393_l1},
|
|
/*h(17809)=394 */ {17809, xed3_phash_find_mapevex_map5_opcode0x79_vv2_394_l1},
|
|
/*h(11654)=395 */ {11654, xed3_phash_find_mapevex_map5_opcode0x79_vv2_395_l1},
|
|
/*h(4512)=396 */ {4512, xed3_phash_find_mapevex_map5_opcode0x79_vv2_396_l1},
|
|
/*h(26027)=397 */ {26027, xed3_phash_find_mapevex_map5_opcode0x79_vv2_397_l1},
|
|
/*h(7562)=398 */ {7562, xed3_phash_find_mapevex_map5_opcode0x79_vv2_398_l1},
|
|
/*h(29077)=399 */ {29077, xed3_phash_find_mapevex_map5_opcode0x79_vv2_399_l1},
|
|
/*h(21935)=400 */ {21935, xed3_phash_find_mapevex_map5_opcode0x79_vv2_400_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3470)=402 */ {3470, xed3_phash_find_mapevex_map5_opcode0x79_vv2_402_l1},
|
|
/*h(17843)=403 */ {17843, xed3_phash_find_mapevex_map5_opcode0x79_vv2_403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13751)=407 */ {13751, xed3_phash_find_mapevex_map5_opcode0x79_vv2_407_l1},
|
|
/*h(1441)=408 */ {1441, xed3_phash_find_mapevex_map5_opcode0x79_vv2_408_l1},
|
|
/*h(16801)=409 */ {16801, xed3_phash_find_mapevex_map5_opcode0x79_vv2_409_l1},
|
|
/*h(15814)=410 */ {15814, xed3_phash_find_mapevex_map5_opcode0x79_vv2_410_l1},
|
|
/*h(26006)=411 */ {26006, xed3_phash_find_mapevex_map5_opcode0x79_vv2_411_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11722)=413 */ {11722, xed3_phash_find_mapevex_map5_opcode0x79_vv2_413_l1},
|
|
/*h(399)=414 */ {399, xed3_phash_find_mapevex_map5_opcode0x79_vv2_414_l1},
|
|
/*h(15759)=415 */ {15759, xed3_phash_find_mapevex_map5_opcode0x79_vv2_415_l1},
|
|
/*h(9604)=416 */ {9604, xed3_phash_find_mapevex_map5_opcode0x79_vv2_416_l1},
|
|
/*h(7630)=417 */ {7630, xed3_phash_find_mapevex_map5_opcode0x79_vv2_417_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5512)=419 */ {5512, xed3_phash_find_mapevex_map5_opcode0x79_vv2_419_l1},
|
|
/*h(3538)=420 */ {3538, xed3_phash_find_mapevex_map5_opcode0x79_vv2_420_l1},
|
|
/*h(20872)=421 */ {20872, xed3_phash_find_mapevex_map5_opcode0x79_vv2_421_l1},
|
|
/*h(7575)=422 */ {7575, xed3_phash_find_mapevex_map5_opcode0x79_vv2_422_l1},
|
|
/*h(1420)=423 */ {1420, xed3_phash_find_mapevex_map5_opcode0x79_vv2_423_l1},
|
|
/*h(16780)=424 */ {16780, xed3_phash_find_mapevex_map5_opcode0x79_vv2_424_l1},
|
|
/*h(9638)=425 */ {9638, xed3_phash_find_mapevex_map5_opcode0x79_vv2_425_l1},
|
|
/*h(25985)=426 */ {25985, xed3_phash_find_mapevex_map5_opcode0x79_vv2_426_l1},
|
|
/*h(24998)=427 */ {24998, xed3_phash_find_mapevex_map5_opcode0x79_vv2_427_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5546)=429 */ {5546, xed3_phash_find_mapevex_map5_opcode0x79_vv2_429_l1},
|
|
/*h(21893)=430 */ {21893, xed3_phash_find_mapevex_map5_opcode0x79_vv2_430_l1},
|
|
/*h(8596)=431 */ {8596, xed3_phash_find_mapevex_map5_opcode0x79_vv2_431_l1},
|
|
/*h(1454)=432 */ {1454, xed3_phash_find_mapevex_map5_opcode0x79_vv2_432_l1},
|
|
/*h(17801)=433 */ {17801, xed3_phash_find_mapevex_map5_opcode0x79_vv2_433_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26019)=435 */ {26019, xed3_phash_find_mapevex_map5_opcode0x79_vv2_435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11735)=437 */ {11735, xed3_phash_find_mapevex_map5_opcode0x79_vv2_437_l1},
|
|
/*h(29069)=438 */ {29069, xed3_phash_find_mapevex_map5_opcode0x79_vv2_438_l1},
|
|
/*h(21927)=439 */ {21927, xed3_phash_find_mapevex_map5_opcode0x79_vv2_439_l1},
|
|
/*h(9617)=440 */ {9617, xed3_phash_find_mapevex_map5_opcode0x79_vv2_440_l1},
|
|
/*h(3462)=441 */ {3462, xed3_phash_find_mapevex_map5_opcode0x79_vv2_441_l1},
|
|
/*h(17835)=442 */ {17835, xed3_phash_find_mapevex_map5_opcode0x79_vv2_442_l1},
|
|
/*h(5525)=443 */ {5525, xed3_phash_find_mapevex_map5_opcode0x79_vv2_443_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20885)=445 */ {20885, xed3_phash_find_mapevex_map5_opcode0x79_vv2_445_l1},
|
|
/*h(13743)=446 */ {13743, xed3_phash_find_mapevex_map5_opcode0x79_vv2_446_l1},
|
|
/*h(29103)=447 */ {29103, xed3_phash_find_mapevex_map5_opcode0x79_vv2_447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9651)=449 */ {9651, xed3_phash_find_mapevex_map5_opcode0x79_vv2_449_l1},
|
|
/*h(25998)=450 */ {25998, xed3_phash_find_mapevex_map5_opcode0x79_vv2_450_l1},
|
|
/*h(25011)=451 */ {25011, xed3_phash_find_mapevex_map5_opcode0x79_vv2_451_l1},
|
|
/*h(11714)=452 */ {11714, xed3_phash_find_mapevex_map5_opcode0x79_vv2_452_l1},
|
|
/*h(5559)=453 */ {5559, xed3_phash_find_mapevex_map5_opcode0x79_vv2_453_l1},
|
|
/*h(15751)=454 */ {15751, xed3_phash_find_mapevex_map5_opcode0x79_vv2_454_l1},
|
|
/*h(7622)=455 */ {7622, xed3_phash_find_mapevex_map5_opcode0x79_vv2_455_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17814)=457 */ {17814, xed3_phash_find_mapevex_map5_opcode0x79_vv2_457_l1},
|
|
/*h(5504)=458 */ {5504, xed3_phash_find_mapevex_map5_opcode0x79_vv2_458_l1},
|
|
/*h(3530)=459 */ {3530, xed3_phash_find_mapevex_map5_opcode0x79_vv2_459_l1},
|
|
/*h(20864)=460 */ {20864, xed3_phash_find_mapevex_map5_opcode0x79_vv2_460_l1},
|
|
/*h(7567)=461 */ {7567, xed3_phash_find_mapevex_map5_opcode0x79_vv2_461_l1},
|
|
/*h(1412)=462 */ {1412, xed3_phash_find_mapevex_map5_opcode0x79_vv2_462_l1},
|
|
/*h(21940)=463 */ {21940, xed3_phash_find_mapevex_map5_opcode0x79_vv2_463_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5538)=467 */ {5538, xed3_phash_find_mapevex_map5_opcode0x79_vv2_467_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20898)=469 */ {20898, xed3_phash_find_mapevex_map5_opcode0x79_vv2_469_l1},
|
|
/*h(8588)=470 */ {8588, xed3_phash_find_mapevex_map5_opcode0x79_vv2_470_l1},
|
|
/*h(30103)=471 */ {30103, xed3_phash_find_mapevex_map5_opcode0x79_vv2_471_l1},
|
|
/*h(17793)=472 */ {17793, xed3_phash_find_mapevex_map5_opcode0x79_vv2_472_l1},
|
|
/*h(4496)=473 */ {4496, xed3_phash_find_mapevex_map5_opcode0x79_vv2_473_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13701)=475 */ {13701, xed3_phash_find_mapevex_map5_opcode0x79_vv2_475_l1},
|
|
/*h(11727)=476 */ {11727, xed3_phash_find_mapevex_map5_opcode0x79_vv2_476_l1},
|
|
/*h(29061)=477 */ {29061, xed3_phash_find_mapevex_map5_opcode0x79_vv2_477_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9609)=479 */ {9609, xed3_phash_find_mapevex_map5_opcode0x79_vv2_479_l1},
|
|
/*h(24969)=480 */ {24969, xed3_phash_find_mapevex_map5_opcode0x79_vv2_480_l1},
|
|
/*h(17827)=481 */ {17827, xed3_phash_find_mapevex_map5_opcode0x79_vv2_481_l1},
|
|
/*h(5517)=482 */ {5517, xed3_phash_find_mapevex_map5_opcode0x79_vv2_482_l1},
|
|
/*h(3543)=483 */ {3543, xed3_phash_find_mapevex_map5_opcode0x79_vv2_483_l1},
|
|
/*h(13735)=484 */ {13735, xed3_phash_find_mapevex_map5_opcode0x79_vv2_484_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1425)=486 */ {1425, xed3_phash_find_mapevex_map5_opcode0x79_vv2_486_l1},
|
|
/*h(16785)=487 */ {16785, xed3_phash_find_mapevex_map5_opcode0x79_vv2_487_l1},
|
|
/*h(9643)=488 */ {9643, xed3_phash_find_mapevex_map5_opcode0x79_vv2_488_l1},
|
|
/*h(25990)=489 */ {25990, xed3_phash_find_mapevex_map5_opcode0x79_vv2_489_l1},
|
|
/*h(12693)=490 */ {12693, xed3_phash_find_mapevex_map5_opcode0x79_vv2_490_l1},
|
|
/*h(5551)=491 */ {5551, xed3_phash_find_mapevex_map5_opcode0x79_vv2_491_l1},
|
|
/*h(21898)=492 */ {21898, xed3_phash_find_mapevex_map5_opcode0x79_vv2_492_l1},
|
|
/*h(20911)=493 */ {20911, xed3_phash_find_mapevex_map5_opcode0x79_vv2_493_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1459)=495 */ {1459, xed3_phash_find_mapevex_map5_opcode0x79_vv2_495_l1},
|
|
/*h(17806)=496 */ {17806, xed3_phash_find_mapevex_map5_opcode0x79_vv2_496_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3522)=498 */ {3522, xed3_phash_find_mapevex_map5_opcode0x79_vv2_498_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7559)=500 */ {7559, xed3_phash_find_mapevex_map5_opcode0x79_vv2_500_l1},
|
|
/*h(417)=501 */ {417, xed3_phash_find_mapevex_map5_opcode0x79_vv2_501_l1},
|
|
/*h(21932)=502 */ {21932, xed3_phash_find_mapevex_map5_opcode0x79_vv2_502_l1},
|
|
/*h(9622)=503 */ {9622, xed3_phash_find_mapevex_map5_opcode0x79_vv2_503_l1},
|
|
/*h(24982)=504 */ {24982, xed3_phash_find_mapevex_map5_opcode0x79_vv2_504_l1},
|
|
/*h(17840)=505 */ {17840, xed3_phash_find_mapevex_map5_opcode0x79_vv2_505_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8580)=509 */ {8580, xed3_phash_find_mapevex_map5_opcode0x79_vv2_509_l1},
|
|
/*h(30095)=510 */ {30095, xed3_phash_find_mapevex_map5_opcode0x79_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4488)=512 */ {4488, xed3_phash_find_mapevex_map5_opcode0x79_vv2_512_l1},
|
|
/*h(26003)=513 */ {26003, xed3_phash_find_mapevex_map5_opcode0x79_vv2_513_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11719)=515 */ {11719, xed3_phash_find_mapevex_map5_opcode0x79_vv2_515_l1},
|
|
/*h(21911)=516 */ {21911, xed3_phash_find_mapevex_map5_opcode0x79_vv2_516_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9601)=518 */ {9601, xed3_phash_find_mapevex_map5_opcode0x79_vv2_518_l1},
|
|
/*h(24961)=519 */ {24961, xed3_phash_find_mapevex_map5_opcode0x79_vv2_519_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5509)=521 */ {5509, xed3_phash_find_mapevex_map5_opcode0x79_vv2_521_l1},
|
|
/*h(3535)=522 */ {3535, xed3_phash_find_mapevex_map5_opcode0x79_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1417)=524 */ {1417, xed3_phash_find_mapevex_map5_opcode0x79_vv2_524_l1},
|
|
/*h(430)=525 */ {430, xed3_phash_find_mapevex_map5_opcode0x79_vv2_525_l1},
|
|
/*h(16777)=526 */ {16777, xed3_phash_find_mapevex_map5_opcode0x79_vv2_526_l1},
|
|
/*h(9635)=527 */ {9635, xed3_phash_find_mapevex_map5_opcode0x79_vv2_527_l1},
|
|
/*h(24995)=528 */ {24995, xed3_phash_find_mapevex_map5_opcode0x79_vv2_528_l1},
|
|
/*h(12685)=529 */ {12685, xed3_phash_find_mapevex_map5_opcode0x79_vv2_529_l1},
|
|
/*h(5543)=530 */ {5543, xed3_phash_find_mapevex_map5_opcode0x79_vv2_530_l1},
|
|
/*h(21890)=531 */ {21890, xed3_phash_find_mapevex_map5_opcode0x79_vv2_531_l1},
|
|
/*h(20903)=532 */ {20903, xed3_phash_find_mapevex_map5_opcode0x79_vv2_532_l1},
|
|
/*h(8593)=533 */ {8593, xed3_phash_find_mapevex_map5_opcode0x79_vv2_533_l1},
|
|
/*h(1451)=534 */ {1451, xed3_phash_find_mapevex_map5_opcode0x79_vv2_534_l1},
|
|
/*h(17798)=535 */ {17798, xed3_phash_find_mapevex_map5_opcode0x79_vv2_535_l1},
|
|
/*h(4501)=536 */ {4501, xed3_phash_find_mapevex_map5_opcode0x79_vv2_536_l1},
|
|
/*h(26016)=537 */ {26016, xed3_phash_find_mapevex_map5_opcode0x79_vv2_537_l1},
|
|
/*h(12719)=538 */ {12719, xed3_phash_find_mapevex_map5_opcode0x79_vv2_538_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21924)=540 */ {21924, xed3_phash_find_mapevex_map5_opcode0x79_vv2_540_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9614)=542 */ {9614, xed3_phash_find_mapevex_map5_opcode0x79_vv2_542_l1},
|
|
/*h(24974)=543 */ {24974, xed3_phash_find_mapevex_map5_opcode0x79_vv2_543_l1},
|
|
/*h(17832)=544 */ {17832, xed3_phash_find_mapevex_map5_opcode0x79_vv2_544_l1},
|
|
/*h(5522)=545 */ {5522, xed3_phash_find_mapevex_map5_opcode0x79_vv2_545_l1},
|
|
/*h(20882)=546 */ {20882, xed3_phash_find_mapevex_map5_opcode0x79_vv2_546_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30087)=548 */ {30087, xed3_phash_find_mapevex_map5_opcode0x79_vv2_548_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16790)=550 */ {16790, xed3_phash_find_mapevex_map5_opcode0x79_vv2_550_l1},
|
|
/*h(9648)=551 */ {9648, xed3_phash_find_mapevex_map5_opcode0x79_vv2_551_l1},
|
|
/*h(25995)=552 */ {25995, xed3_phash_find_mapevex_map5_opcode0x79_vv2_552_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5556)=554 */ {5556, xed3_phash_find_mapevex_map5_opcode0x79_vv2_554_l1},
|
|
/*h(21903)=555 */ {21903, xed3_phash_find_mapevex_map5_opcode0x79_vv2_555_l1},
|
|
/*h(20916)=556 */ {20916, xed3_phash_find_mapevex_map5_opcode0x79_vv2_556_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17811)=559 */ {17811, xed3_phash_find_mapevex_map5_opcode0x79_vv2_559_l1},
|
|
/*h(3527)=560 */ {3527, xed3_phash_find_mapevex_map5_opcode0x79_vv2_560_l1},
|
|
/*h(26029)=561 */ {26029, xed3_phash_find_mapevex_map5_opcode0x79_vv2_561_l1},
|
|
/*h(13719)=562 */ {13719, xed3_phash_find_mapevex_map5_opcode0x79_vv2_562_l1},
|
|
/*h(1409)=563 */ {1409, xed3_phash_find_mapevex_map5_opcode0x79_vv2_563_l1},
|
|
/*h(21937)=564 */ {21937, xed3_phash_find_mapevex_map5_opcode0x79_vv2_564_l1},
|
|
/*h(16769)=565 */ {16769, xed3_phash_find_mapevex_map5_opcode0x79_vv2_565_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17845)=568 */ {17845, xed3_phash_find_mapevex_map5_opcode0x79_vv2_568_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8585)=571 */ {8585, xed3_phash_find_mapevex_map5_opcode0x79_vv2_571_l1},
|
|
/*h(1443)=572 */ {1443, xed3_phash_find_mapevex_map5_opcode0x79_vv2_572_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16803)=574 */ {16803, xed3_phash_find_mapevex_map5_opcode0x79_vv2_574_l1},
|
|
/*h(4493)=575 */ {4493, xed3_phash_find_mapevex_map5_opcode0x79_vv2_575_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12711)=577 */ {12711, xed3_phash_find_mapevex_map5_opcode0x79_vv2_577_l1},
|
|
/*h(401)=578 */ {401, xed3_phash_find_mapevex_map5_opcode0x79_vv2_578_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9606)=580 */ {9606, xed3_phash_find_mapevex_map5_opcode0x79_vv2_580_l1},
|
|
/*h(8619)=581 */ {8619, xed3_phash_find_mapevex_map5_opcode0x79_vv2_581_l1},
|
|
/*h(24966)=582 */ {24966, xed3_phash_find_mapevex_map5_opcode0x79_vv2_582_l1},
|
|
/*h(17824)=583 */ {17824, xed3_phash_find_mapevex_map5_opcode0x79_vv2_583_l1},
|
|
/*h(5514)=584 */ {5514, xed3_phash_find_mapevex_map5_opcode0x79_vv2_584_l1},
|
|
/*h(20874)=585 */ {20874, xed3_phash_find_mapevex_map5_opcode0x79_vv2_585_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1422)=587 */ {1422, xed3_phash_find_mapevex_map5_opcode0x79_vv2_587_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9640)=589 */ {9640, xed3_phash_find_mapevex_map5_opcode0x79_vv2_589_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25987)=591 */ {25987, xed3_phash_find_mapevex_map5_opcode0x79_vv2_591_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5548)=593 */ {5548, xed3_phash_find_mapevex_map5_opcode0x79_vv2_593_l1},
|
|
/*h(21895)=594 */ {21895, xed3_phash_find_mapevex_map5_opcode0x79_vv2_594_l1},
|
|
/*h(8598)=595 */ {8598, xed3_phash_find_mapevex_map5_opcode0x79_vv2_595_l1},
|
|
/*h(1456)=596 */ {1456, xed3_phash_find_mapevex_map5_opcode0x79_vv2_596_l1},
|
|
/*h(17803)=597 */ {17803, xed3_phash_find_mapevex_map5_opcode0x79_vv2_597_l1},
|
|
/*h(16816)=598 */ {16816, xed3_phash_find_mapevex_map5_opcode0x79_vv2_598_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26021)=600 */ {26021, xed3_phash_find_mapevex_map5_opcode0x79_vv2_600_l1},
|
|
/*h(13711)=601 */ {13711, xed3_phash_find_mapevex_map5_opcode0x79_vv2_601_l1},
|
|
/*h(29071)=602 */ {29071, xed3_phash_find_mapevex_map5_opcode0x79_vv2_602_l1},
|
|
/*h(21929)=603 */ {21929, xed3_phash_find_mapevex_map5_opcode0x79_vv2_603_l1},
|
|
/*h(9619)=604 */ {9619, xed3_phash_find_mapevex_map5_opcode0x79_vv2_604_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24979)=606 */ {24979, xed3_phash_find_mapevex_map5_opcode0x79_vv2_606_l1},
|
|
/*h(17837)=607 */ {17837, xed3_phash_find_mapevex_map5_opcode0x79_vv2_607_l1},
|
|
/*h(5527)=608 */ {5527, xed3_phash_find_mapevex_map5_opcode0x79_vv2_608_l1},
|
|
/*h(20887)=609 */ {20887, xed3_phash_find_mapevex_map5_opcode0x79_vv2_609_l1},
|
|
/*h(8577)=610 */ {8577, xed3_phash_find_mapevex_map5_opcode0x79_vv2_610_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9653)=613 */ {9653, xed3_phash_find_mapevex_map5_opcode0x79_vv2_613_l1},
|
|
/*h(4485)=614 */ {4485, xed3_phash_find_mapevex_map5_opcode0x79_vv2_614_l1},
|
|
/*h(26000)=615 */ {26000, xed3_phash_find_mapevex_map5_opcode0x79_vv2_615_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(393)=617 */ {393, xed3_phash_find_mapevex_map5_opcode0x79_vv2_617_l1},
|
|
/*h(21908)=618 */ {21908, xed3_phash_find_mapevex_map5_opcode0x79_vv2_618_l1},
|
|
/*h(8611)=619 */ {8611, xed3_phash_find_mapevex_map5_opcode0x79_vv2_619_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5506)=623 */ {5506, xed3_phash_find_mapevex_map5_opcode0x79_vv2_623_l1},
|
|
/*h(26034)=624 */ {26034, xed3_phash_find_mapevex_map5_opcode0x79_vv2_624_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1414)=626 */ {1414, xed3_phash_find_mapevex_map5_opcode0x79_vv2_626_l1},
|
|
/*h(21942)=627 */ {21942, xed3_phash_find_mapevex_map5_opcode0x79_vv2_627_l1},
|
|
/*h(9632)=628 */ {9632, xed3_phash_find_mapevex_map5_opcode0x79_vv2_628_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24992)=630 */ {24992, xed3_phash_find_mapevex_map5_opcode0x79_vv2_630_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5540)=632 */ {5540, xed3_phash_find_mapevex_map5_opcode0x79_vv2_632_l1},
|
|
/*h(20900)=633 */ {20900, xed3_phash_find_mapevex_map5_opcode0x79_vv2_633_l1},
|
|
/*h(8590)=634 */ {8590, xed3_phash_find_mapevex_map5_opcode0x79_vv2_634_l1},
|
|
/*h(1448)=635 */ {1448, xed3_phash_find_mapevex_map5_opcode0x79_vv2_635_l1},
|
|
/*h(17795)=636 */ {17795, xed3_phash_find_mapevex_map5_opcode0x79_vv2_636_l1},
|
|
/*h(16808)=637 */ {16808, xed3_phash_find_mapevex_map5_opcode0x79_vv2_637_l1},
|
|
/*h(4498)=638 */ {4498, xed3_phash_find_mapevex_map5_opcode0x79_vv2_638_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13703)=640 */ {13703, xed3_phash_find_mapevex_map5_opcode0x79_vv2_640_l1},
|
|
/*h(29063)=641 */ {29063, xed3_phash_find_mapevex_map5_opcode0x79_vv2_641_l1},
|
|
/*h(21921)=642 */ {21921, xed3_phash_find_mapevex_map5_opcode0x79_vv2_642_l1},
|
|
/*h(15766)=643 */ {15766, xed3_phash_find_mapevex_map5_opcode0x79_vv2_643_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17829)=645 */ {17829, xed3_phash_find_mapevex_map5_opcode0x79_vv2_645_l1},
|
|
/*h(5519)=646 */ {5519, xed3_phash_find_mapevex_map5_opcode0x79_vv2_646_l1},
|
|
/*h(4532)=647 */ {4532, xed3_phash_find_mapevex_map5_opcode0x79_vv2_647_l1},
|
|
/*h(20879)=648 */ {20879, xed3_phash_find_mapevex_map5_opcode0x79_vv2_648_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1427)=650 */ {1427, xed3_phash_find_mapevex_map5_opcode0x79_vv2_650_l1},
|
|
/*h(16787)=651 */ {16787, xed3_phash_find_mapevex_map5_opcode0x79_vv2_651_l1},
|
|
/*h(9645)=652 */ {9645, xed3_phash_find_mapevex_map5_opcode0x79_vv2_652_l1},
|
|
/*h(25992)=653 */ {25992, xed3_phash_find_mapevex_map5_opcode0x79_vv2_653_l1},
|
|
/*h(25005)=654 */ {25005, xed3_phash_find_mapevex_map5_opcode0x79_vv2_654_l1},
|
|
/*h(12695)=655 */ {12695, xed3_phash_find_mapevex_map5_opcode0x79_vv2_655_l1},
|
|
/*h(5553)=656 */ {5553, xed3_phash_find_mapevex_map5_opcode0x79_vv2_656_l1},
|
|
/*h(21900)=657 */ {21900, xed3_phash_find_mapevex_map5_opcode0x79_vv2_657_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1461)=659 */ {1461, xed3_phash_find_mapevex_map5_opcode0x79_vv2_659_l1},
|
|
/*h(17808)=660 */ {17808, xed3_phash_find_mapevex_map5_opcode0x79_vv2_660_l1},
|
|
/*h(16821)=661 */ {16821, xed3_phash_find_mapevex_map5_opcode0x79_vv2_661_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26026)=663 */ {26026, xed3_phash_find_mapevex_map5_opcode0x79_vv2_663_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(419)=665 */ {419, xed3_phash_find_mapevex_map5_opcode0x79_vv2_665_l1},
|
|
/*h(21934)=666 */ {21934, xed3_phash_find_mapevex_map5_opcode0x79_vv2_666_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17842)=669 */ {17842, xed3_phash_find_mapevex_map5_opcode0x79_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8582)=673 */ {8582, xed3_phash_find_mapevex_map5_opcode0x79_vv2_673_l1},
|
|
/*h(1440)=674 */ {1440, xed3_phash_find_mapevex_map5_opcode0x79_vv2_674_l1},
|
|
/*h(16800)=675 */ {16800, xed3_phash_find_mapevex_map5_opcode0x79_vv2_675_l1},
|
|
/*h(4490)=676 */ {4490, xed3_phash_find_mapevex_map5_opcode0x79_vv2_676_l1},
|
|
/*h(26005)=677 */ {26005, xed3_phash_find_mapevex_map5_opcode0x79_vv2_677_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(398)=680 */ {398, xed3_phash_find_mapevex_map5_opcode0x79_vv2_680_l1},
|
|
/*h(15758)=681 */ {15758, xed3_phash_find_mapevex_map5_opcode0x79_vv2_681_l1},
|
|
/*h(9603)=682 */ {9603, xed3_phash_find_mapevex_map5_opcode0x79_vv2_682_l1},
|
|
/*h(24963)=683 */ {24963, xed3_phash_find_mapevex_map5_opcode0x79_vv2_683_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11666)=685 */ {11666, xed3_phash_find_mapevex_map5_opcode0x79_vv2_685_l1},
|
|
/*h(26039)=686 */ {26039, xed3_phash_find_mapevex_map5_opcode0x79_vv2_686_l1},
|
|
/*h(20871)=687 */ {20871, xed3_phash_find_mapevex_map5_opcode0x79_vv2_687_l1},
|
|
/*h(7574)=688 */ {7574, xed3_phash_find_mapevex_map5_opcode0x79_vv2_688_l1},
|
|
/*h(1419)=689 */ {1419, xed3_phash_find_mapevex_map5_opcode0x79_vv2_689_l1},
|
|
/*h(16779)=690 */ {16779, xed3_phash_find_mapevex_map5_opcode0x79_vv2_690_l1},
|
|
/*h(9637)=691 */ {9637, xed3_phash_find_mapevex_map5_opcode0x79_vv2_691_l1},
|
|
/*h(25984)=692 */ {25984, xed3_phash_find_mapevex_map5_opcode0x79_vv2_692_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5545)=694 */ {5545, xed3_phash_find_mapevex_map5_opcode0x79_vv2_694_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 696ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[78] = {
|
|
/*h(158)=0 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {158, 7237},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(159)=3 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {159, 7242},
|
|
/*h(923)=4 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {923, 7235},
|
|
/*h(344)=5 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {344, 7180},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=8 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {345, 7180},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=11 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7179},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=14 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 7182},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(927)=16 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {927, 7242},
|
|
/*h(664)=17 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {664, 7236},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(665)=20 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {665, 7236},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(666)=23 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {666, 7234},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(667)=26 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {667, 7235},
|
|
/*h(88)=27 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {88, 7178},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(668)=29 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {668, 7243},
|
|
/*h(89)=30 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {89, 7178},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(669)=32 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {669, 7243},
|
|
/*h(90)=33 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7177},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(670)=35 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {670, 7241},
|
|
/*h(91)=36 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 7182},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(671)=38 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {671, 7242},
|
|
/*h(408)=39 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {408, 7233},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(409)=42 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {409, 7233},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(410)=45 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {410, 7232},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(411)=48 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {411, 7235},
|
|
/*h(859)=49 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 7182},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(412)=51 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {412, 7240},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(413)=54 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {413, 7240},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(414)=57 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {414, 7239},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(415)=60 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {415, 7242},
|
|
/*h(152)=61 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {152, 7231},
|
|
/*h(600)=62 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {600, 7183},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(153)=64 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {153, 7231},
|
|
/*h(601)=65 EVV 0x7A V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {601, 7183},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(154)=67 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {154, 7230},
|
|
/*h(602)=68 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7181},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(155)=70 EVV 0x7A VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {155, 7235},
|
|
/*h(603)=71 EVV 0x7A V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 7182},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(156)=73 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {156, 7238},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(157)=76 EVV 0x7A VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {157, 7238},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 79) % 78);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(708)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {708, 7082},
|
|
/*h(6863)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6863, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_367_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5706)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5706, 7249},
|
|
/*h(15055)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15055, 7087},
|
|
/*h(8900)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8900, 7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(716)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {716, 7082},
|
|
/*h(3910)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3910, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2753)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2753, 7085},
|
|
/*h(1766)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1766, 7247},
|
|
/*h(8908)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8908, 7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3918)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3918, 7247},
|
|
/*h(724)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {724, 7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8916)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8916, 7082},
|
|
/*h(2761)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2761, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_588_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(710)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {710, 7082},
|
|
/*h(5878)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {5878, 7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_540_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3734)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {3734, 7244},
|
|
/*h(8902)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8902, 7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_547_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(718)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_499_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8910)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_507_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(726)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {7082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8918)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8918, 7082},
|
|
/*h(2763)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2763, 7085},
|
|
/*h(3750)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3750, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((9*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(704)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {704, 7083},
|
|
/*h(8079)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8079, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8896)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3906)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3906, 7249},
|
|
/*h(712)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {712, 7083},
|
|
/*h(8087)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {8087, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_713_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8904)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8904, 7083},
|
|
/*h(5710)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5710, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_720_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_672_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5718)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {5718, 7244},
|
|
/*h(8912)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8912, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(706)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3730)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3730, 7246},
|
|
/*h(7911)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7911, 7248},
|
|
/*h(8898)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8898, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8906)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8906, 7083},
|
|
/*h(7919)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7919, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(722)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {722, 7083},
|
|
/*h(5890)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5890, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3746)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3746, 7249},
|
|
/*h(7927)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7927, 7251},
|
|
/*h(8914)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8914, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(705)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 705;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7910)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7910, 7247},
|
|
/*h(5703)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5703, 7248},
|
|
/*h(8897)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8897, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(713)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 713;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5711)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5711, 7248},
|
|
/*h(8905)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8905, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(721)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 721;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8913)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {8913, 7083},
|
|
/*h(7926)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7926, 7250},
|
|
/*h(2758)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2758, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_695_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8082)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8082, 7246},
|
|
/*h(707)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {707, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_647_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8899)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8899;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1702)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1702, 7247},
|
|
/*h(715)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {715, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_606_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8907)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1710)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1710, 7247},
|
|
/*h(723)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {723, 7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_565_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8915)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8915;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2756)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2756, 7084},
|
|
/*h(8911)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8911, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7754)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7754, 7249},
|
|
/*h(10948)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10948, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5958)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5958, 7247},
|
|
/*h(2764)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2764, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(10956)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10956, 7084},
|
|
/*h(3814)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3814, 7247},
|
|
/*h(4801)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4801, 7088},
|
|
/*h(1607)=3 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1607, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((7*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2772)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2772, 7084},
|
|
/*h(5966)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5966, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4809)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4809, 7088},
|
|
/*h(1615)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1615, 7248},
|
|
/*h(10964)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10964, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10950)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10950, 7084},
|
|
/*h(5782)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {5782, 7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2766)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1986)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1986, 7249},
|
|
/*h(10958)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10958, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2774)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5798)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5798, 7247},
|
|
/*h(4811)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4811, 7088},
|
|
/*h(10966)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10966, 7084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_607_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2752)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10944)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10944;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2760)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2760, 7085},
|
|
/*h(5954)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5954, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7758)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7758, 7247},
|
|
/*h(10952)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10952, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2768)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2768;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7766)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7766, 7244},
|
|
/*h(10960)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10960, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2754)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2754, 7085},
|
|
/*h(1767)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1767, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5778)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5778, 7246},
|
|
/*h(10946)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10946, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2762)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2762, 7085},
|
|
/*h(1775)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1775, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10954)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10954;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_698_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1783)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {1783, 7251},
|
|
/*h(7938)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7938, 7249},
|
|
/*h(2770)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2770, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_650_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10962)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10962, 7085},
|
|
/*h(5794)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5794, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7751)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7751, 7248},
|
|
/*h(10945)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10945, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10953)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10953, 7085},
|
|
/*h(7759)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7759, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1782)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {1782, 7250},
|
|
/*h(2769)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2769, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4806)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4806, 7086},
|
|
/*h(10961)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10961, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2755)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10947)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10947;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_411_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1606)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1606, 7247},
|
|
/*h(10955)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10955, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3758)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3758, 7247},
|
|
/*h(2771)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {2771, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1991)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1991, 7248},
|
|
/*h(10963)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {10963, 7085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10959)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10959, 7087},
|
|
/*h(4804)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4804, 7086},
|
|
/*h(1610)=2 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1610, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_709_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12996)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4812)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4812, 7086},
|
|
/*h(8006)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8006, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5862)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5862, 7247},
|
|
/*h(3655)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3655, 7248},
|
|
/*h(13004)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13004, 7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4820)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4820, 7086},
|
|
/*h(8014)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8014, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13012)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13012, 7086},
|
|
/*h(3663)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3663, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7830)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7830, 7244},
|
|
/*h(12998)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {12998, 7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4814)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4034)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {4034, 7249},
|
|
/*h(13006)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13006, 7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4822)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {7086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13014)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13014, 7086},
|
|
/*h(7846)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7846, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(709)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 709;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7914)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7914, 7249},
|
|
/*h(8901)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8901, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1770)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1770, 7249},
|
|
/*h(2757)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {2757, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_625_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10949)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10949;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3818)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3818, 7249},
|
|
/*h(4805)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4805, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12997)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5866)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5866, 7249},
|
|
/*h(6853)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6853, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15045)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15045;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(717)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {717, 7087},
|
|
/*h(3911)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3911, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7922)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7922, 7252},
|
|
/*h(8909)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8909, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2765)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {2765, 7087},
|
|
/*h(1778)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1778, 7252},
|
|
/*h(5959)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5959, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10957)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10957;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8007)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8007, 7248},
|
|
/*h(3826)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3826, 7252},
|
|
/*h(4813)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4813, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_389_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13005)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5874)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {5874, 7252},
|
|
/*h(6861)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6861, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15053)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15053;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(725)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 725;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1542)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1542, 7247},
|
|
/*h(8917)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8917, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2773)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2773;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_543_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3590)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3590, 7247},
|
|
/*h(10965)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10965, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4821)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5638)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5638, 7247},
|
|
/*h(13013)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13013, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6869)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6869;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7686)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7686, 7247},
|
|
/*h(15061)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15061, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8086)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {8086, 7244},
|
|
/*h(711)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {711, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3735)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {3735, 7245},
|
|
/*h(8903)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8903, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2759)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1602)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1602, 7249},
|
|
/*h(10951)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10951, 7087},
|
|
/*h(5783)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {5783, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4807)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(12999)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12999, 7087},
|
|
/*h(7831)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7831, 7245},
|
|
/*h(3650)=2 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3650, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6855)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6855, 7087},
|
|
/*h(1687)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1687, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5698)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5698, 7249},
|
|
/*h(15047)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15047, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(719)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2767)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2767;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4815)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3658)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3658, 7249},
|
|
/*h(13007)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13007, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(1714)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1714, 7252},
|
|
/*h(5895)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5895, 7248},
|
|
/*h(727)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {727, 7087},
|
|
/*h(8102)=3 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8102, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((11*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8919)=0 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8919, 7087},
|
|
/*h(3751)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3751, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3762)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3762, 7252},
|
|
/*h(2775)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {2775, 7087},
|
|
/*h(7943)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7943, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5799)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5799, 7248},
|
|
/*h(1618)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1618, 7246},
|
|
/*h(10967)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10967, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_569_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5810)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {5810, 7252},
|
|
/*h(4823)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4823, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3666)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3666, 7246},
|
|
/*h(13015)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13015, 7087},
|
|
/*h(7847)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7847, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7858)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7858, 7252},
|
|
/*h(1703)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1703, 7248},
|
|
/*h(6871)=2 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6871, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_326_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5714)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5714, 7246},
|
|
/*h(15063)=1 EVV 0x7B V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15063, 7087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4800)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12992)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1614)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1614, 7247},
|
|
/*h(8002)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8002, 7249},
|
|
/*h(4808)=2 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4808, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13000)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1622)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {1622, 7244},
|
|
/*h(4816)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4816, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_282_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13008)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13008;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4802)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4802, 7088},
|
|
/*h(3815)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3815, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1671)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1671, 7248},
|
|
/*h(12994)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {12994, 7088},
|
|
/*h(7826)=2 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7826, 7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4810)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4810, 7088},
|
|
/*h(3823)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3823, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13002)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4818)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4818, 7088},
|
|
/*h(3831)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {3831, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7842)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7842, 7249},
|
|
/*h(13010)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {13010, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12993)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13001)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13001;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3830)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {3830, 7250},
|
|
/*h(4817)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4817, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1686)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {1686, 7244},
|
|
/*h(13009)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {13009, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4803)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12995)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3654)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3654, 7247},
|
|
/*h(13003)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {13003, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5806)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5806, 7247},
|
|
/*h(4819)=1 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {4819, 7088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13011)=0 EVV 0x7B V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_QUARTER()*/ {13011, 7088},
|
|
/*h(4039)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4039, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_656_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1558)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3606)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5654)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7702)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1814)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_620_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3862)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5910)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7958)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_162_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1942)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3990)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6038)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3670)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1878)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3926)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {3926, 7244},
|
|
/*h(1719)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {1719, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5974)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {5974, 7244},
|
|
/*h(3767)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {3767, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8022)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {8022, 7244},
|
|
/*h(5815)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {5815, 7251},
|
|
/*h(1634)=2 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1634, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1750)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3798)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5846)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_556_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7894)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_568_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2006)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4054)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4054;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6102)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6102;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_715_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8150)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0*/ {7244}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8150;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7714)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7714, 7249},
|
|
/*h(1559)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1559, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3607)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3607;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5655)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_523_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7703)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7970)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7970, 7249},
|
|
/*h(1815)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1815, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3863)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1730)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1730, 7249},
|
|
/*h(5911)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {5911, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3778)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3778, 7249},
|
|
/*h(7959)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7959, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8098)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8098, 7249},
|
|
/*h(1943)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1943, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3991)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3991;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1858)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1858, 7249},
|
|
/*h(6039)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {6039, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7778)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7778, 7249},
|
|
/*h(1623)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1623, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_587_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3671)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1538)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1538, 7249},
|
|
/*h(5719)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {5719, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3586)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3586, 7249},
|
|
/*h(7767)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7767, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_209_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4086)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {4086, 7250},
|
|
/*h(1879)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1879, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6134)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {6134, 7250},
|
|
/*h(3927)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {3927, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1794)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1794, 7249},
|
|
/*h(8182)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {8182, 7250},
|
|
/*h(5975)=2 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {5975, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3842)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3842, 7249},
|
|
/*h(8023)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {8023, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7906)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7906, 7249},
|
|
/*h(1751)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {1751, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3799)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1666)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1666, 7249},
|
|
/*h(5847)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {5847, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3714)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3714, 7249},
|
|
/*h(7895)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7895, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2007)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4055)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4055;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1922)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1922, 7249},
|
|
/*h(6103)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {6103, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3970)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3970, 7249},
|
|
/*h(8151)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0 mode64 ZEROING=0 MASK=0*/ {8151, 7245}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1554)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1554;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3602)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5650)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {5650, 7246},
|
|
/*h(1846)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {1846, 7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7698)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7698, 7246},
|
|
/*h(3894)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {3894, 7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1810)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1810, 7246},
|
|
/*h(5991)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5991, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3858)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3858, 7246},
|
|
/*h(8039)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8039, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5906)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_616_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7954)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7954;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1682)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1682, 7246},
|
|
/*h(5863)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5863, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_548_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1938)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1938, 7246},
|
|
/*h(6119)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6119, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3986)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3986, 7246},
|
|
/*h(8167)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8167, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6034)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6034;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7762)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1874)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1874, 7246},
|
|
/*h(6055)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6055, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3922)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3922, 7246},
|
|
/*h(8103)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8103, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5970)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8018)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8018, 7246},
|
|
/*h(1863)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1863, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1746)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_600_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3794)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5842)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7890)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2002)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {2002, 7246},
|
|
/*h(3599)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3599, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4050)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {4050, 7246},
|
|
/*h(5647)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5647, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_564_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6098)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {6098, 7246},
|
|
/*h(7695)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7695, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8146)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 mode64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7246}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8146;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1798)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_701_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3846)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3846, 7247},
|
|
/*h(1639)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1639, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_506_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5894)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5894, 7247},
|
|
/*h(3687)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3687, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_311_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7942)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7942, 7247},
|
|
/*h(5735)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5735, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_85_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1670)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3718)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5766)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7814)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1926)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3974)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6022)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8070)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8070;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5702)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7750)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_570_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1862)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_491_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1734)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3782)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3782;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5830)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_638_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7878)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_649_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1990)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4038)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {4038, 7247},
|
|
/*h(1831)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1831, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6086)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {6086, 7247},
|
|
/*h(3879)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3879, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8134)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8134, 7247},
|
|
/*h(5927)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5927, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1574)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3622)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5670)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5670, 7247},
|
|
/*h(1866)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1866, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7718)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7718, 7247},
|
|
/*h(3914)=1 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3914, 7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1830)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_538_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3878)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5926)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7974)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1958)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4006)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {4006, 7247},
|
|
/*h(1799)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1799, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6054)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {6054, 7247},
|
|
/*h(3847)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3847, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1638)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3686)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_590_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5734)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7782)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7782;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1894)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3942)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_17_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5990)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_554_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8038)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2022)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4070)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4070;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6118)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6118;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_633_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8166)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8166;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_697_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1550)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3598)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5646)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7694)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1806)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1806;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3854)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3854, 7247},
|
|
/*h(1647)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1647, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5902)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5902, 7247},
|
|
/*h(3695)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3695, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7950)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7950, 7247},
|
|
/*h(5743)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5743, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1678)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3726)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5774)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7822)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1934)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3982)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3982;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6030)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_350_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8078)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8078;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3662)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1870)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_450_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1742)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1742;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3790)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3790;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5838)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_597_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7886)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7886;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1998)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4046)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {4046, 7247},
|
|
/*h(1839)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1839, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6094)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {6094, 7247},
|
|
/*h(3887)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3887, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8142)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8142, 7247},
|
|
/*h(5935)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5935, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1582)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3630)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3630;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5678)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7726)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_692_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1838)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3886)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {3886, 7247},
|
|
/*h(1679)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1679, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5934)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {5934, 7247},
|
|
/*h(3727)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3727, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7982)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7982, 7247},
|
|
/*h(5775)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5775, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7854)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7854;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1966)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1966;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4014)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4014;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6062)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6062;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8110)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8110;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1646)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3694)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5742)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5742;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7790)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7790;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1902)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3950)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5998)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8046)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8046;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_287_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8162)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8162, 7249},
|
|
/*h(1774)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {1774, 7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3822)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_629_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5870)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7918)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7918;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2030)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {7247}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4078)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {4078, 7247},
|
|
/*h(1871)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1871, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6126)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {6126, 7247},
|
|
/*h(3919)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3919, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8174)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0*/ {8174, 7247},
|
|
/*h(5967)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5967, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1543)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1994)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1994, 7249},
|
|
/*h(3591)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3591, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4042)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {4042, 7249},
|
|
/*h(5639)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5639, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6090)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {6090, 7249},
|
|
/*h(7687)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7687, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3719)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1586)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1586, 7252},
|
|
/*h(5767)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5767, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_684_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3634)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3634, 7252},
|
|
/*h(7815)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7815, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1927)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3975)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1842)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1842, 7252},
|
|
/*h(6023)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6023, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3890)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3890, 7252},
|
|
/*h(8071)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8071, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1735)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3783)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1650)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1650, 7252},
|
|
/*h(5831)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5831, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3698)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3698, 7252},
|
|
/*h(7879)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7879, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1906)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {1906, 7252},
|
|
/*h(6087)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6087, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_517_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3954)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {3954, 7252},
|
|
/*h(8135)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8135, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1575)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2026)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {2026, 7249},
|
|
/*h(3623)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3623, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4074)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {4074, 7249},
|
|
/*h(5671)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5671, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6122)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {6122, 7249},
|
|
/*h(7719)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7719, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_601_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7975)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1959)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4007)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7783)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8050)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {8050, 7252},
|
|
/*h(1895)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1895, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_664_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3943)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8178)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {8178, 7252},
|
|
/*h(2023)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {2023, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4071)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1551)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1807)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3855)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3855;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5903)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_723_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7951)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_644_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7823)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7823;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1935)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3983)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3983;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6031)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8015)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8015;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1743)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3791)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5839)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5839;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7887)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7887;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1999)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4047)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4047;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6095)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6095;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8143)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8143;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_254_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1583)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1583;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2034)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {2034, 7252},
|
|
/*h(3631)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3631, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4082)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {4082, 7252},
|
|
/*h(5679)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5679, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_401_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6130)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {6130, 7252},
|
|
/*h(7727)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7727, 7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7983)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7983;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_333_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1711)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3759)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_675_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5807)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7855)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7855;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1967)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4015)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4015;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6063)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6063;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_639_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8111)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8111;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7791)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1903)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_623_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3951)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_428_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5999)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_233_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8047)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8047;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5871)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2031)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4079)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4079;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_508_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6127)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6127;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8175)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7248}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8175;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5634)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5634;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_539_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7682)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5762)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7810)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7810;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6018)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8066)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7746)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7746, 7249},
|
|
/*h(1591)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {1591, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_487_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5826)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7874)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6082)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6082;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8130)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8130, 7249},
|
|
/*h(1975)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {1975, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_229_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1570)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1570, 7249},
|
|
/*h(5751)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {5751, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3618)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3618, 7249},
|
|
/*h(7799)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7799, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5666)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1826)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1826, 7249},
|
|
/*h(6007)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {6007, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3874)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3874, 7249},
|
|
/*h(8055)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {8055, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_730_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5922)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5922;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1698)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1698, 7249},
|
|
/*h(5879)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {5879, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_467_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1954)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1954, 7249},
|
|
/*h(6135)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {6135, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4002)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {4002, 7249},
|
|
/*h(8183)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {8183, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6050)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6050;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3682)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3682, 7249},
|
|
/*h(7863)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7863, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_245_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5730)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1890)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1890, 7249},
|
|
/*h(6071)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {6071, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3938)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3938, 7249},
|
|
/*h(8119)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {8119, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5986)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8034)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8034;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_714_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1762)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {1762, 7249},
|
|
/*h(5943)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {5943, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3810)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {3810, 7249},
|
|
/*h(7991)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7991, 7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5858)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5858;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2018)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_677_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4066)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_482_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6114)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6114;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1546)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1546;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3594)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_693_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5642)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7690)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1802)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3850)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5898)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7946)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7946;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_431_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1674)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1674;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3722)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5770)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5770;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7818)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7818;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1930)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1930;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3978)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3978;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6026)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8074)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8074;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5962)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_331_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8010)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8010;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1738)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_641_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3786)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5834)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5834;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_251_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7882)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7882;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8138)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8138;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1578)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3626)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_530_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5674)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5674;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7722)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1834)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1834;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3882)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3882;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_689_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5930)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5930;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7978)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7978;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1706)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3754)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_609_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5802)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7850)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1962)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4010)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4010;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6058)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6058;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8106)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8106;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1642)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_399_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3690)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_204_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5738)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7786)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1898)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_557_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3946)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3946;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_362_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5994)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8042)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {8042, 7249},
|
|
/*h(1654)=1 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {1654, 7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8170)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {7249}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8170;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1590)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3638)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5686)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7734)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_262_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5942)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7990)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1718)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3766)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5814)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_719_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7862)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_731_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1974)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4022)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6070)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6070;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8118)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8118;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_704_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3702)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5750)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7798)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1910)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3958)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6006)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8054)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8054;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2038)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0*/ {7250}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3639)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3639;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5687)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7735)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1847)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1847;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3895)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4023)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4023;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1655)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3703)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1911)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3959)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2039)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2039;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4087)=0 EVV 0x7B VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1 mode64 ZEROING=0 MASK=0*/ {7251}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4087;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5682)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_294_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7730)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5938)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5938;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7986)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_385_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1970)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4018)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6066)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8114)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8114;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5746)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7794)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6002)=0 EVV 0x7B VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W1 mode64 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {7252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[732] = {
|
|
/*h(5778)=0 */ {5778, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_0_l1},
|
|
/*h(1830)=1 */ {1830, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_1_l1},
|
|
/*h(5634)=2 */ {5634, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_2_l1},
|
|
/*h(1686)=3 */ {1686, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_3_l1},
|
|
/*h(8074)=4 */ {8074, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_4_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1542)=6 */ {1542, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_6_l1},
|
|
/*h(1775)=7 */ {1775, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_7_l1},
|
|
/*h(3982)=8 */ {3982, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_8_l1},
|
|
/*h(7786)=9 */ {7786, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_9_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4071)=11 */ {4071, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_11_l1},
|
|
/*h(3694)=12 */ {3694, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_12_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6134)=14 */ {6134, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_14_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3783)=16 */ {3783, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_16_l1},
|
|
/*h(5990)=17 */ {5990, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_17_l1},
|
|
/*h(3639)=18 */ {3639, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_18_l1},
|
|
/*h(5846)=19 */ {5846, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_19_l1},
|
|
/*h(1898)=20 */ {1898, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_20_l1},
|
|
/*h(5702)=21 */ {5702, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_21_l1},
|
|
/*h(8896)=22 */ {8896, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_22_l1},
|
|
/*h(5935)=23 */ {5935, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_23_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1610)=25 */ {1610, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5647)=27 */ {5647, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_27_l1},
|
|
/*h(7854)=28 */ {7854, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_28_l1},
|
|
/*h(3906)=29 */ {3906, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3762)=32 */ {3762, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_32_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7799)=34 */ {7799, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_34_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6058)=36 */ {6058, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1966)=40 */ {1966, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_40_l1},
|
|
/*h(5770)=41 */ {5770, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_41_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13001)=43 */ {13001, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_43_l1},
|
|
/*h(1678)=44 */ {1678, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_44_l1},
|
|
/*h(8066)=45 */ {8066, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_45_l1},
|
|
/*h(1911)=46 */ {1911, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_46_l1},
|
|
/*h(7922)=47 */ {7922, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_47_l1},
|
|
/*h(1767)=48 */ {1767, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_48_l1},
|
|
/*h(3974)=49 */ {3974, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_49_l1},
|
|
/*h(7778)=50 */ {7778, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_50_l1},
|
|
/*h(3830)=51 */ {3830, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_51_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3686)=53 */ {3686, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_53_l1},
|
|
/*h(725)=54 */ {725, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_54_l1},
|
|
/*h(3919)=55 */ {3919, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2034)=59 */ {2034, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_59_l1},
|
|
/*h(5838)=60 */ {5838, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_60_l1},
|
|
/*h(6071)=61 */ {6071, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_61_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1746)=63 */ {1746, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_63_l1},
|
|
/*h(5927)=64 */ {5927, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1602)=66 */ {1602, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_66_l1},
|
|
/*h(7990)=67 */ {7990, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_67_l1},
|
|
/*h(4042)=68 */ {4042, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_68_l1},
|
|
/*h(7846)=69 */ {7846, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_69_l1},
|
|
/*h(8079)=70 */ {8079, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_70_l1},
|
|
/*h(7702)=71 */ {7702, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_71_l1},
|
|
/*h(3754)=72 */ {3754, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_72_l1},
|
|
/*h(2767)=73 */ {2767, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_73_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7791)=75 */ {7791, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_75_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6050)=77 */ {6050, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5906)=79 */ {5906, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_79_l1},
|
|
/*h(1958)=80 */ {1958, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_80_l1},
|
|
/*h(5762)=81 */ {5762, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_81_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1814)=83 */ {1814, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_83_l1},
|
|
/*h(12993)=84 */ {12993, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_84_l1},
|
|
/*h(1670)=85 */ {1670, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_85_l1},
|
|
/*h(1903)=86 */ {1903, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7914)=88 */ {7914, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_88_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1615)=91 */ {1615, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_91_l1},
|
|
/*h(3822)=92 */ {3822, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_92_l1},
|
|
/*h(4055)=93 */ {4055, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_93_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3911)=95 */ {3911, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_95_l1},
|
|
/*h(6118)=96 */ {6118, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_96_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3767)=98 */ {3767, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2026)=100 */ {2026, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_100_l1},
|
|
/*h(5830)=101 */ {5830, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_101_l1},
|
|
/*h(6063)=102 */ {6063, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_102_l1},
|
|
/*h(5686)=103 */ {5686, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_103_l1},
|
|
/*h(1738)=104 */ {1738, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_104_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5775)=107 */ {5775, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_107_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4034)=109 */ {4034, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_109_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3890)=111 */ {3890, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_111_l1},
|
|
/*h(7694)=112 */ {7694, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_112_l1},
|
|
/*h(7927)=113 */ {7927, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_113_l1},
|
|
/*h(2759)=114 */ {2759, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_114_l1},
|
|
/*h(3602)=115 */ {3602, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_115_l1},
|
|
/*h(7783)=116 */ {7783, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_116_l1},
|
|
/*h(4822)=117 */ {4822, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_117_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5898)=120 */ {5898, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1806)=123 */ {1806, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_123_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2039)=125 */ {2039, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8050)=127 */ {8050, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7906)=129 */ {7906, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_129_l1},
|
|
/*h(3958)=130 */ {3958, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_130_l1},
|
|
/*h(7762)=131 */ {7762, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_131_l1},
|
|
/*h(1607)=132 */ {1607, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4047)=134 */ {4047, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_134_l1},
|
|
/*h(3670)=135 */ {3670, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_135_l1},
|
|
/*h(709)=136 */ {709, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_136_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3759)=138 */ {3759, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_138_l1},
|
|
/*h(5966)=139 */ {5966, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_139_l1},
|
|
/*h(2018)=140 */ {2018, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_140_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6055)=143 */ {6055, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_143_l1},
|
|
/*h(5678)=144 */ {5678, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_144_l1},
|
|
/*h(1730)=145 */ {1730, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_145_l1},
|
|
/*h(8118)=146 */ {8118, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_146_l1},
|
|
/*h(1586)=147 */ {1586, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_147_l1},
|
|
/*h(7974)=148 */ {7974, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_148_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7830)=150 */ {7830, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_150_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3882)=152 */ {3882, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_152_l1},
|
|
/*h(7686)=153 */ {7686, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_153_l1},
|
|
/*h(7919)=154 */ {7919, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3594)=156 */ {3594, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_156_l1},
|
|
/*h(4814)=157 */ {4814, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_157_l1},
|
|
/*h(6034)=158 */ {6034, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_158_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5890)=161 */ {5890, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_161_l1},
|
|
/*h(1942)=162 */ {1942, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_162_l1},
|
|
/*h(5746)=163 */ {5746, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_163_l1},
|
|
/*h(1798)=164 */ {1798, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_164_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2031)=166 */ {2031, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_166_l1},
|
|
/*h(1654)=167 */ {1654, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1743)=170 */ {1743, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_170_l1},
|
|
/*h(3950)=171 */ {3950, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_171_l1},
|
|
/*h(7754)=172 */ {7754, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_172_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4039)=175 */ {4039, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_175_l1},
|
|
/*h(3662)=176 */ {3662, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_176_l1},
|
|
/*h(3895)=177 */ {3895, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_177_l1},
|
|
/*h(6102)=178 */ {6102, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_178_l1},
|
|
/*h(3751)=179 */ {3751, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_179_l1},
|
|
/*h(5958)=180 */ {5958, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_180_l1},
|
|
/*h(3607)=181 */ {3607, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_181_l1},
|
|
/*h(5814)=182 */ {5814, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_182_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1866)=184 */ {1866, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5903)=186 */ {5903, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_186_l1},
|
|
/*h(8110)=187 */ {8110, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_187_l1},
|
|
/*h(1578)=188 */ {1578, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_188_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4018)=190 */ {4018, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_190_l1},
|
|
/*h(7822)=191 */ {7822, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_191_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8055)=193 */ {8055, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_193_l1},
|
|
/*h(15053)=194 */ {15053, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_194_l1},
|
|
/*h(7911)=195 */ {7911, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_195_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3586)=197 */ {3586, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_197_l1},
|
|
/*h(4806)=198 */ {4806, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_198_l1},
|
|
/*h(6026)=199 */ {6026, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_199_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6869)=201 */ {6869, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_201_l1},
|
|
/*h(714)=202 */ {714, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_202_l1},
|
|
/*h(1934)=203 */ {1934, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_203_l1},
|
|
/*h(5738)=204 */ {5738, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_204_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8178)=206 */ {8178, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_206_l1},
|
|
/*h(1646)=207 */ {1646, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_207_l1},
|
|
/*h(8034)=208 */ {8034, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_208_l1},
|
|
/*h(4086)=209 */ {4086, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_209_l1},
|
|
/*h(7890)=210 */ {7890, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_210_l1},
|
|
/*h(1735)=211 */ {1735, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_211_l1},
|
|
/*h(3942)=212 */ {3942, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_212_l1},
|
|
/*h(1591)=213 */ {1591, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_213_l1},
|
|
/*h(3798)=214 */ {3798, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_214_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3654)=216 */ {3654, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_216_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3887)=218 */ {3887, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_218_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8911)=220 */ {8911, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3599)=222 */ {3599, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_222_l1},
|
|
/*h(5806)=223 */ {5806, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_223_l1},
|
|
/*h(1858)=224 */ {1858, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_224_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1714)=227 */ {1714, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5751)=229 */ {5751, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_229_l1},
|
|
/*h(7958)=230 */ {7958, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_230_l1},
|
|
/*h(4010)=231 */ {4010, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_231_l1},
|
|
/*h(7814)=232 */ {7814, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_232_l1},
|
|
/*h(8047)=233 */ {8047, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_233_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15045)=235 */ {15045, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_235_l1},
|
|
/*h(3722)=236 */ {3722, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_236_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7759)=238 */ {7759, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_238_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6018)=240 */ {6018, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_240_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5874)=242 */ {5874, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_242_l1},
|
|
/*h(706)=243 */ {706, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_243_l1},
|
|
/*h(1926)=244 */ {1926, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_244_l1},
|
|
/*h(5730)=245 */ {5730, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_245_l1},
|
|
/*h(1782)=246 */ {1782, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_246_l1},
|
|
/*h(8170)=247 */ {8170, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_247_l1},
|
|
/*h(1638)=248 */ {1638, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_248_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1871)=250 */ {1871, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_250_l1},
|
|
/*h(7882)=251 */ {7882, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_251_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1583)=254 */ {1583, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_254_l1},
|
|
/*h(3790)=255 */ {3790, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_255_l1},
|
|
/*h(4023)=256 */ {4023, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_256_l1},
|
|
/*h(12995)=257 */ {12995, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_257_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3879)=259 */ {3879, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3735)=261 */ {3735, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_261_l1},
|
|
/*h(5942)=262 */ {5942, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_262_l1},
|
|
/*h(1994)=263 */ {1994, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_263_l1},
|
|
/*h(5798)=264 */ {5798, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_264_l1},
|
|
/*h(6031)=265 */ {6031, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_265_l1},
|
|
/*h(5654)=266 */ {5654, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_266_l1},
|
|
/*h(1706)=267 */ {1706, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_267_l1},
|
|
/*h(719)=268 */ {719, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_268_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5743)=270 */ {5743, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_270_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8183)=272 */ {8183, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_272_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8039)=274 */ {8039, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_274_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3714)=276 */ {3714, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7751)=279 */ {7751, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_279_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13008)=282 */ {13008, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_282_l1},
|
|
/*h(5866)=283 */ {5866, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2761)=286 */ {2761, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_286_l1},
|
|
/*h(8162)=287 */ {8162, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_287_l1},
|
|
/*h(2007)=288 */ {2007, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_288_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1863)=290 */ {1863, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_290_l1},
|
|
/*h(4070)=291 */ {4070, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_291_l1},
|
|
/*h(7874)=292 */ {7874, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_292_l1},
|
|
/*h(1719)=293 */ {1719, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_293_l1},
|
|
/*h(7730)=294 */ {7730, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_294_l1},
|
|
/*h(1575)=295 */ {1575, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_295_l1},
|
|
/*h(3782)=296 */ {3782, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_296_l1},
|
|
/*h(4015)=297 */ {4015, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_297_l1},
|
|
/*h(3638)=298 */ {3638, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_298_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3727)=302 */ {3727, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_302_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1986)=304 */ {1986, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_304_l1},
|
|
/*h(4803)=305 */ {4803, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_305_l1},
|
|
/*h(1842)=306 */ {1842, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_306_l1},
|
|
/*h(5646)=307 */ {5646, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_307_l1},
|
|
/*h(5879)=308 */ {5879, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_308_l1},
|
|
/*h(8086)=309 */ {8086, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_309_l1},
|
|
/*h(1554)=310 */ {1554, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_310_l1},
|
|
/*h(5735)=311 */ {5735, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_311_l1},
|
|
/*h(2774)=312 */ {2774, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_312_l1},
|
|
/*h(8175)=313 */ {8175, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_313_l1},
|
|
/*h(7798)=314 */ {7798, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_314_l1},
|
|
/*h(3850)=315 */ {3850, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7887)=317 */ {7887, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_317_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6002)=322 */ {6002, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_322_l1},
|
|
/*h(13000)=323 */ {13000, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_323_l1},
|
|
/*h(5858)=324 */ {5858, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_324_l1},
|
|
/*h(1910)=325 */ {1910, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_325_l1},
|
|
/*h(5714)=326 */ {5714, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_326_l1},
|
|
/*h(1766)=327 */ {1766, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_327_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1999)=329 */ {1999, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_329_l1},
|
|
/*h(1622)=330 */ {1622, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_330_l1},
|
|
/*h(8010)=331 */ {8010, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_331_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1711)=333 */ {1711, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_333_l1},
|
|
/*h(3918)=334 */ {3918, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_334_l1},
|
|
/*h(7722)=335 */ {7722, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4007)=338 */ {4007, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_338_l1},
|
|
/*h(3630)=339 */ {3630, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_339_l1},
|
|
/*h(3863)=340 */ {3863, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_340_l1},
|
|
/*h(6070)=341 */ {6070, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_341_l1},
|
|
/*h(3719)=342 */ {3719, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_342_l1},
|
|
/*h(5926)=343 */ {5926, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_343_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5782)=345 */ {5782, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1834)=347 */ {1834, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_347_l1},
|
|
/*h(5638)=348 */ {5638, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_348_l1},
|
|
/*h(5871)=349 */ {5871, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_349_l1},
|
|
/*h(8078)=350 */ {8078, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_350_l1},
|
|
/*h(1546)=351 */ {1546, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_351_l1},
|
|
/*h(2766)=352 */ {2766, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_352_l1},
|
|
/*h(8167)=353 */ {8167, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_353_l1},
|
|
/*h(7790)=354 */ {7790, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3842)=356 */ {3842, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_356_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3698)=358 */ {3698, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_358_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7735)=360 */ {7735, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_360_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5994)=362 */ {5994, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_362_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12992)=364 */ {12992, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1902)=366 */ {1902, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_366_l1},
|
|
/*h(5706)=367 */ {5706, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_367_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8146)=369 */ {8146, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_369_l1},
|
|
/*h(1991)=370 */ {1991, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_370_l1},
|
|
/*h(8002)=371 */ {8002, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_371_l1},
|
|
/*h(1847)=372 */ {1847, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_372_l1},
|
|
/*h(4054)=373 */ {4054, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_373_l1},
|
|
/*h(7858)=374 */ {7858, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_374_l1},
|
|
/*h(3910)=375 */ {3910, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_375_l1},
|
|
/*h(7714)=376 */ {7714, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_376_l1},
|
|
/*h(3766)=377 */ {3766, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_377_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3622)=379 */ {3622, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_379_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3855)=381 */ {3855, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_381_l1},
|
|
/*h(6062)=382 */ {6062, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_382_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1970)=385 */ {1970, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_385_l1},
|
|
/*h(5774)=386 */ {5774, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_386_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6007)=388 */ {6007, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_388_l1},
|
|
/*h(13005)=389 */ {13005, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_389_l1},
|
|
/*h(5863)=390 */ {5863, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_390_l1},
|
|
/*h(8070)=391 */ {8070, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_391_l1},
|
|
/*h(1538)=392 */ {1538, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_392_l1},
|
|
/*h(7926)=393 */ {7926, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_393_l1},
|
|
/*h(3978)=394 */ {3978, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_394_l1},
|
|
/*h(7782)=395 */ {7782, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_395_l1},
|
|
/*h(4821)=396 */ {4821, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_396_l1},
|
|
/*h(8015)=397 */ {8015, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_397_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3690)=399 */ {3690, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_399_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6130)=401 */ {6130, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_401_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5986)=403 */ {5986, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_403_l1},
|
|
/*h(2038)=404 */ {2038, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_404_l1},
|
|
/*h(5842)=405 */ {5842, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_405_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1894)=407 */ {1894, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_407_l1},
|
|
/*h(5698)=408 */ {5698, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_408_l1},
|
|
/*h(1750)=409 */ {1750, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_409_l1},
|
|
/*h(8138)=410 */ {8138, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_410_l1},
|
|
/*h(1606)=411 */ {1606, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_411_l1},
|
|
/*h(4800)=412 */ {4800, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_412_l1},
|
|
/*h(1839)=413 */ {1839, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_413_l1},
|
|
/*h(7850)=414 */ {7850, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_414_l1},
|
|
/*h(6863)=415 */ {6863, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1551)=417 */ {1551, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_417_l1},
|
|
/*h(3758)=418 */ {3758, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_418_l1},
|
|
/*h(3991)=419 */ {3991, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_419_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3847)=422 */ {3847, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_422_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3703)=424 */ {3703, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_424_l1},
|
|
/*h(5910)=425 */ {5910, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_425_l1},
|
|
/*h(1962)=426 */ {1962, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_426_l1},
|
|
/*h(5766)=427 */ {5766, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_427_l1},
|
|
/*h(5999)=428 */ {5999, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_428_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12997)=430 */ {12997, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_430_l1},
|
|
/*h(1674)=431 */ {1674, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_431_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5711)=433 */ {5711, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_433_l1},
|
|
/*h(7918)=434 */ {7918, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_434_l1},
|
|
/*h(3970)=435 */ {3970, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3826)=437 */ {3826, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_437_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7863)=440 */ {7863, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_440_l1},
|
|
/*h(721)=441 */ {721, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_441_l1},
|
|
/*h(6122)=442 */ {6122, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2030)=445 */ {2030, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_445_l1},
|
|
/*h(5834)=446 */ {5834, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_446_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1742)=450 */ {1742, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_450_l1},
|
|
/*h(1975)=451 */ {1975, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_451_l1},
|
|
/*h(10947)=452 */ {10947, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_452_l1},
|
|
/*h(7986)=453 */ {7986, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_453_l1},
|
|
/*h(1831)=454 */ {1831, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_454_l1},
|
|
/*h(7842)=455 */ {7842, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_455_l1},
|
|
/*h(1687)=456 */ {1687, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_456_l1},
|
|
/*h(3894)=457 */ {3894, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_457_l1},
|
|
/*h(1543)=458 */ {1543, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_458_l1},
|
|
/*h(3750)=459 */ {3750, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_459_l1},
|
|
/*h(3983)=460 */ {3983, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_460_l1},
|
|
/*h(3606)=461 */ {3606, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_461_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3695)=465 */ {3695, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_465_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6135)=467 */ {6135, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_467_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5991)=469 */ {5991, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_469_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1666)=471 */ {1666, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_471_l1},
|
|
/*h(8054)=472 */ {8054, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_472_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5703)=474 */ {5703, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_474_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8143)=476 */ {8143, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_476_l1},
|
|
/*h(7766)=477 */ {7766, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_477_l1},
|
|
/*h(3818)=478 */ {3818, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_478_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7855)=480 */ {7855, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_480_l1},
|
|
/*h(713)=481 */ {713, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_481_l1},
|
|
/*h(6114)=482 */ {6114, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_482_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5970)=485 */ {5970, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_485_l1},
|
|
/*h(2022)=486 */ {2022, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_486_l1},
|
|
/*h(5826)=487 */ {5826, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_487_l1},
|
|
/*h(1878)=488 */ {1878, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_488_l1},
|
|
/*h(5682)=489 */ {5682, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_489_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1734)=491 */ {1734, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_491_l1},
|
|
/*h(1967)=492 */ {1967, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_492_l1},
|
|
/*h(1590)=493 */ {1590, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_493_l1},
|
|
/*h(7978)=494 */ {7978, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_494_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13002)=496 */ {13002, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_496_l1},
|
|
/*h(1679)=497 */ {1679, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_497_l1},
|
|
/*h(7690)=498 */ {7690, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_498_l1},
|
|
/*h(8910)=499 */ {8910, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_499_l1},
|
|
/*h(2755)=500 */ {2755, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_500_l1},
|
|
/*h(3975)=501 */ {3975, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_501_l1},
|
|
/*h(3598)=502 */ {3598, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_502_l1},
|
|
/*h(3831)=503 */ {3831, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_503_l1},
|
|
/*h(6038)=504 */ {6038, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_504_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3687)=506 */ {3687, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_506_l1},
|
|
/*h(726)=507 */ {726, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_507_l1},
|
|
/*h(6127)=508 */ {6127, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_508_l1},
|
|
/*h(5750)=509 */ {5750, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_509_l1},
|
|
/*h(1802)=510 */ {1802, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5839)=512 */ {5839, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_512_l1},
|
|
/*h(8046)=513 */ {8046, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_513_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3954)=517 */ {3954, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_517_l1},
|
|
/*h(7758)=518 */ {7758, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_518_l1},
|
|
/*h(7991)=519 */ {7991, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_519_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7847)=521 */ {7847, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_521_l1},
|
|
/*h(705)=522 */ {705, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_522_l1},
|
|
/*h(7703)=523 */ {7703, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_523_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2768)=525 */ {2768, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_525_l1},
|
|
/*h(5962)=526 */ {5962, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_526_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1870)=529 */ {1870, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_529_l1},
|
|
/*h(5674)=530 */ {5674, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_530_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8114)=532 */ {8114, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_532_l1},
|
|
/*h(1959)=533 */ {1959, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_533_l1},
|
|
/*h(1582)=534 */ {1582, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_534_l1},
|
|
/*h(7970)=535 */ {7970, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_535_l1},
|
|
/*h(4022)=536 */ {4022, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_536_l1},
|
|
/*h(1671)=537 */ {1671, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_537_l1},
|
|
/*h(3878)=538 */ {3878, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_538_l1},
|
|
/*h(7682)=539 */ {7682, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_539_l1},
|
|
/*h(3734)=540 */ {3734, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_540_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3590)=543 */ {3590, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_543_l1},
|
|
/*h(3823)=544 */ {3823, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_544_l1},
|
|
/*h(6030)=545 */ {6030, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_545_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(718)=547 */ {718, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_547_l1},
|
|
/*h(6119)=548 */ {6119, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_548_l1},
|
|
/*h(5742)=549 */ {5742, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_549_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8182)=551 */ {8182, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_551_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1650)=553 */ {1650, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_553_l1},
|
|
/*h(8038)=554 */ {8038, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_554_l1},
|
|
/*h(5687)=555 */ {5687, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_555_l1},
|
|
/*h(7894)=556 */ {7894, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_556_l1},
|
|
/*h(3946)=557 */ {3946, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_557_l1},
|
|
/*h(7750)=558 */ {7750, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_558_l1},
|
|
/*h(10944)=559 */ {10944, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_559_l1},
|
|
/*h(7983)=560 */ {7983, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_560_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3658)=562 */ {3658, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_562_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7695)=564 */ {7695, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_564_l1},
|
|
/*h(8915)=565 */ {8915, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_565_l1},
|
|
/*h(5954)=566 */ {5954, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_566_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2006)=568 */ {2006, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_568_l1},
|
|
/*h(5810)=569 */ {5810, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_569_l1},
|
|
/*h(1862)=570 */ {1862, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_570_l1},
|
|
/*h(5666)=571 */ {5666, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_571_l1},
|
|
/*h(1718)=572 */ {1718, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_572_l1},
|
|
/*h(8106)=573 */ {8106, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_573_l1},
|
|
/*h(1574)=574 */ {1574, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_574_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1807)=576 */ {1807, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_576_l1},
|
|
/*h(4014)=577 */ {4014, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_577_l1},
|
|
/*h(7818)=578 */ {7818, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_578_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3726)=581 */ {3726, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_581_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3959)=583 */ {3959, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_583_l1},
|
|
/*h(10957)=584 */ {10957, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_584_l1},
|
|
/*h(3815)=585 */ {3815, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_585_l1},
|
|
/*h(6022)=586 */ {6022, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_586_l1},
|
|
/*h(3671)=587 */ {3671, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_587_l1},
|
|
/*h(5878)=588 */ {5878, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_588_l1},
|
|
/*h(1930)=589 */ {1930, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_589_l1},
|
|
/*h(5734)=590 */ {5734, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_590_l1},
|
|
/*h(2773)=591 */ {2773, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_591_l1},
|
|
/*h(5967)=592 */ {5967, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_592_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1642)=594 */ {1642, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_594_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4082)=596 */ {4082, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_596_l1},
|
|
/*h(7886)=597 */ {7886, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_597_l1},
|
|
/*h(8119)=598 */ {8119, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_598_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3794)=600 */ {3794, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_600_l1},
|
|
/*h(7975)=601 */ {7975, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_601_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3650)=603 */ {3650, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_603_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6090)=605 */ {6090, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_605_l1},
|
|
/*h(8907)=606 */ {8907, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_606_l1},
|
|
/*h(2752)=607 */ {2752, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_607_l1},
|
|
/*h(1998)=608 */ {1998, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_608_l1},
|
|
/*h(5802)=609 */ {5802, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_609_l1},
|
|
/*h(4815)=610 */ {4815, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_610_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1710)=613 */ {1710, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_613_l1},
|
|
/*h(8098)=614 */ {8098, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_614_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7954)=616 */ {7954, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_616_l1},
|
|
/*h(1799)=617 */ {1799, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_617_l1},
|
|
/*h(7810)=618 */ {7810, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_618_l1},
|
|
/*h(1655)=619 */ {1655, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_619_l1},
|
|
/*h(3862)=620 */ {3862, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_620_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3718)=622 */ {3718, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_622_l1},
|
|
/*h(3951)=623 */ {3951, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_623_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10949)=625 */ {10949, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_625_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3663)=628 */ {3663, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_628_l1},
|
|
/*h(5870)=629 */ {5870, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_629_l1},
|
|
/*h(1922)=630 */ {1922, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_630_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1778)=632 */ {1778, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_632_l1},
|
|
/*h(8166)=633 */ {8166, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_633_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5815)=635 */ {5815, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_635_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4074)=637 */ {4074, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_637_l1},
|
|
/*h(7878)=638 */ {7878, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_638_l1},
|
|
/*h(8111)=639 */ {8111, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_639_l1},
|
|
/*h(7734)=640 */ {7734, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_640_l1},
|
|
/*h(3786)=641 */ {3786, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_641_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7823)=644 */ {7823, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_644_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6082)=646 */ {6082, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_646_l1},
|
|
/*h(8899)=647 */ {8899, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_647_l1},
|
|
/*h(5938)=648 */ {5938, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_648_l1},
|
|
/*h(1990)=649 */ {1990, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_649_l1},
|
|
/*h(5794)=650 */ {5794, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_650_l1},
|
|
/*h(4807)=651 */ {4807, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_651_l1},
|
|
/*h(1846)=652 */ {1846, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_652_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1702)=654 */ {1702, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_654_l1},
|
|
/*h(1935)=655 */ {1935, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_655_l1},
|
|
/*h(1558)=656 */ {1558, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_656_l1},
|
|
/*h(7946)=657 */ {7946, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_657_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1647)=660 */ {1647, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_660_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4087)=662 */ {4087, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_662_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3943)=664 */ {3943, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_664_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3799)=666 */ {3799, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_666_l1},
|
|
/*h(6006)=667 */ {6006, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_667_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3655)=669 */ {3655, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6095)=671 */ {6095, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_671_l1},
|
|
/*h(5718)=672 */ {5718, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_672_l1},
|
|
/*h(1770)=673 */ {1770, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_673_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5807)=675 */ {5807, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_675_l1},
|
|
/*h(8014)=676 */ {8014, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_676_l1},
|
|
/*h(4066)=677 */ {4066, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_677_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8103)=680 */ {8103, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_680_l1},
|
|
/*h(7726)=681 */ {7726, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_681_l1},
|
|
/*h(3778)=682 */ {3778, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_682_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3634)=684 */ {3634, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_684_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5930)=689 */ {5930, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_689_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10954)=691 */ {10954, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_691_l1},
|
|
/*h(1838)=692 */ {1838, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_692_l1},
|
|
/*h(5642)=693 */ {5642, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_693_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8082)=695 */ {8082, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_695_l1},
|
|
/*h(1927)=696 */ {1927, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_696_l1},
|
|
/*h(1550)=697 */ {1550, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_697_l1},
|
|
/*h(1783)=698 */ {1783, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_698_l1},
|
|
/*h(3990)=699 */ {3990, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_699_l1},
|
|
/*h(7794)=700 */ {7794, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_700_l1},
|
|
/*h(1639)=701 */ {1639, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_701_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4079)=703 */ {4079, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_703_l1},
|
|
/*h(3702)=704 */ {3702, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_704_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3791)=707 */ {3791, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_707_l1},
|
|
/*h(5998)=708 */ {5998, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_708_l1},
|
|
/*h(12996)=709 */ {12996, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_709_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1906)=712 */ {1906, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_712_l1},
|
|
/*h(5710)=713 */ {5710, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_713_l1},
|
|
/*h(5943)=714 */ {5943, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_714_l1},
|
|
/*h(8150)=715 */ {8150, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_715_l1},
|
|
/*h(5799)=716 */ {5799, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_716_l1},
|
|
/*h(8006)=717 */ {8006, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_717_l1},
|
|
/*h(5655)=718 */ {5655, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_718_l1},
|
|
/*h(7862)=719 */ {7862, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_719_l1},
|
|
/*h(720)=720 */ {720, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_720_l1},
|
|
/*h(3914)=721 */ {3914, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_721_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7951)=723 */ {7951, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_723_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3626)=725 */ {3626, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_725_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6066)=727 */ {6066, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_727_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5922)=730 */ {5922, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_730_l1},
|
|
/*h(1974)=731 */ {1974, xed3_phash_find_mapevex_map5_opcode0x7b_vv2_731_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 732ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[26] = {
|
|
/*h(601)=0 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {601, 7211},
|
|
/*h(538)=1 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 7202},
|
|
/*h(603)=2 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 7210},
|
|
/*h(344)=3 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {344, 7208},
|
|
/*h(281)=4 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {281, 7201},
|
|
/*h(346)=5 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7207},
|
|
/*h(283)=6 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {283, 7203},
|
|
/*h(24)=7 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {24, 7199},
|
|
/*h(89)=8 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {89, 7206},
|
|
/*h(26)=9 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 7198},
|
|
/*h(91)=10 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 7210},
|
|
/*h(859)=11 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 7210},
|
|
/*h(600)=12 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {600, 7211},
|
|
/*h(537)=13 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {537, 7204},
|
|
/*h(602)=14 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7209},
|
|
/*h(539)=15 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {539, 7203},
|
|
/*h(280)=16 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {280, 7201},
|
|
/*h(345)=17 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {345, 7208},
|
|
/*h(282)=18 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 7200},
|
|
/*h(347)=19 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 7210},
|
|
/*h(88)=20 EVV 0x7C V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {88, 7206},
|
|
/*h(25)=21 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {25, 7199},
|
|
/*h(90)=22 EVV 0x7C V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7205},
|
|
/*h(27)=23 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {27, 7203},
|
|
/*h(795)=24 EVV 0x7C VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {795, 7203},
|
|
/*h(536)=25 EVV 0x7C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {536, 7204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((14*key % 277) % 26);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[59] = {
|
|
/*h(472)=0 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {472, 7263},
|
|
/*h(728)=1 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {728, 7266},
|
|
/*h(217)=2 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {217, 7261},
|
|
/*h(473)=3 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {473, 7263},
|
|
/*h(729)=4 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {729, 7266},
|
|
/*h(218)=5 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 7260},
|
|
/*h(474)=6 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 7262},
|
|
/*h(730)=7 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 7264},
|
|
/*h(219)=8 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {219, 7265},
|
|
/*h(475)=9 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {475, 7265},
|
|
/*h(731)=10 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {731, 7265},
|
|
/*h(987)=11 EVV 0x7D VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {987, 7265},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=13 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {24, 7104},
|
|
/*h(280)=14 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {280, 7106},
|
|
/*h(536)=15 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {536, 7109},
|
|
/*h(25)=16 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {25, 7104},
|
|
/*h(281)=17 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {281, 7106},
|
|
/*h(537)=18 EVV 0x7D VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {537, 7109},
|
|
/*h(26)=19 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 7103},
|
|
/*h(282)=20 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 7105},
|
|
/*h(538)=21 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 7107},
|
|
/*h(27)=22 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {27, 7108},
|
|
/*h(283)=23 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {283, 7108},
|
|
/*h(539)=24 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {539, 7108},
|
|
/*h(795)=25 EVV 0x7D VNP MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {795, 7108},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=28 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {88, 7111},
|
|
/*h(344)=29 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {344, 7113},
|
|
/*h(600)=30 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {600, 7116},
|
|
/*h(89)=31 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {89, 7111},
|
|
/*h(345)=32 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {345, 7113},
|
|
/*h(601)=33 EVV 0x7D V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {601, 7116},
|
|
/*h(90)=34 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7110},
|
|
/*h(346)=35 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7112},
|
|
/*h(602)=36 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7114},
|
|
/*h(91)=37 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {91, 7115},
|
|
/*h(347)=38 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {347, 7115},
|
|
/*h(603)=39 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {603, 7115},
|
|
/*h(859)=40 EVV 0x7D V66 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {859, 7115},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(152)=43 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {152, 7254},
|
|
/*h(408)=44 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {408, 7256},
|
|
/*h(664)=45 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {664, 7259},
|
|
/*h(153)=46 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {153, 7254},
|
|
/*h(409)=47 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {409, 7256},
|
|
/*h(665)=48 EVV 0x7D VF2 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {665, 7259},
|
|
/*h(154)=49 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {154, 7253},
|
|
/*h(410)=50 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {410, 7255},
|
|
/*h(666)=51 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {666, 7257},
|
|
/*h(155)=52 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {155, 7258},
|
|
/*h(411)=53 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {411, 7258},
|
|
/*h(667)=54 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {667, 7258},
|
|
/*h(923)=55 EVV 0x7D VF2 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {923, 7258},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=58 EVV 0x7D VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {216, 7261}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 59);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map5_opcode0x7e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(94)=0 EVV 0x7E V66 MAP5 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0*/ {94, 7533},
|
|
/*h(90)=1 EVV 0x7E V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_GPR_WRITER_STORE()*/ {90, 7534}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x13_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[218] = {
|
|
/*h(0)=0 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {0, 7148},
|
|
/*h(539)=1 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {539, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(787)=3 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {787, 7147},
|
|
/*h(88)=4 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {88, 7076},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(89)=9 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {89, 7076},
|
|
/*h(2)=10 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {2, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=14 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7075},
|
|
/*h(3)=15 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {3, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=19 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 7080},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(48)=22 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {48, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(296)=24 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {296, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(544)=26 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {544, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(792)=28 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {792, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(50)=32 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {50, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(298)=34 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {298, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(546)=36 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {546, 7146},
|
|
/*h(51)=37 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {51, 7147},
|
|
/*h(794)=38 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {794, 7146},
|
|
/*h(299)=39 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {299, 7147},
|
|
/*h(8)=40 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7148},
|
|
/*h(547)=41 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {547, 7147},
|
|
/*h(256)=42 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {256, 7148},
|
|
/*h(795)=43 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {795, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=46 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {344, 7078},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=50 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7146},
|
|
/*h(345)=51 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {345, 7078},
|
|
/*h(258)=52 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {258, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=55 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {11, 7147},
|
|
/*h(346)=56 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7077},
|
|
/*h(259)=57 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {259, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(347)=61 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 7080},
|
|
/*h(56)=62 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {56, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(304)=64 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {304, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(552)=66 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {552, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(800)=68 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {800, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=72 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {58, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(306)=74 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {306, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(554)=76 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {554, 7146},
|
|
/*h(59)=77 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {59, 7147},
|
|
/*h(802)=78 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {802, 7146},
|
|
/*h(307)=79 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {307, 7147},
|
|
/*h(16)=80 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {16, 7148},
|
|
/*h(555)=81 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {555, 7147},
|
|
/*h(264)=82 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {264, 7148},
|
|
/*h(803)=83 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {803, 7147},
|
|
/*h(512)=84 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {512, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=88 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {600, 7081},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(18)=90 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {18, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(266)=92 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {266, 7146},
|
|
/*h(601)=93 EVV 0x13 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_HALF()*/ {601, 7081},
|
|
/*h(514)=94 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {514, 7146},
|
|
/*h(19)=95 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {19, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(267)=97 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {267, 7147},
|
|
/*h(602)=98 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7079},
|
|
/*h(515)=99 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {515, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=103 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 7080},
|
|
/*h(312)=104 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {312, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(560)=106 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {560, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(808)=108 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {808, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(314)=114 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {314, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(562)=116 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {562, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(810)=118 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {810, 7146},
|
|
/*h(315)=119 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {315, 7147},
|
|
/*h(24)=120 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {24, 7148},
|
|
/*h(563)=121 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {563, 7147},
|
|
/*h(272)=122 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {272, 7148},
|
|
/*h(811)=123 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {811, 7147},
|
|
/*h(520)=124 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {520, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(768)=126 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {768, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=130 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(274)=132 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {274, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(522)=134 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {522, 7146},
|
|
/*h(27)=135 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {27, 7147},
|
|
/*h(770)=136 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {770, 7146},
|
|
/*h(275)=137 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {275, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(523)=139 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {523, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(771)=141 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {771, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(859)=145 EVV 0x13 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 7080},
|
|
/*h(568)=146 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {568, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(816)=148 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {816, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(570)=156 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {570, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(818)=158 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {818, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(32)=160 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {32, 7148},
|
|
/*h(571)=161 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {571, 7147},
|
|
/*h(280)=162 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {280, 7148},
|
|
/*h(819)=163 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {819, 7147},
|
|
/*h(528)=164 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {528, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(776)=166 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {776, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(34)=170 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {34, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(282)=172 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {282, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(530)=174 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {530, 7146},
|
|
/*h(35)=175 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {35, 7147},
|
|
/*h(778)=176 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {778, 7146},
|
|
/*h(283)=177 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {283, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(531)=179 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {531, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(779)=181 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {779, 7147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(824)=188 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {824, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(826)=198 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {826, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=200 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {40, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(288)=202 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {288, 7148},
|
|
/*h(827)=203 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {827, 7147},
|
|
/*h(536)=204 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {536, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(784)=206 EVV 0x13 VNP MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {784, 7148},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=210 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {42, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(290)=212 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {290, 7146},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(538)=214 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {538, 7146},
|
|
/*h(43)=215 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {43, 7147},
|
|
/*h(786)=216 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {786, 7146},
|
|
/*h(291)=217 EVV 0x13 VNP MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {291, 7147}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 619) % 218);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x2c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7585},
|
|
/*h(11)=1 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7586},
|
|
/*h(43)=2 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7586},
|
|
/*h(75)=3 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7586},
|
|
/*h(107)=4 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7586},
|
|
/*h(8)=5 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7582},
|
|
/*h(40)=6 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7584},
|
|
/*h(72)=7 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7587},
|
|
/*h(9)=8 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7582},
|
|
/*h(41)=9 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7584},
|
|
/*h(73)=10 EVV 0x2C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7587},
|
|
/*h(10)=11 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7581},
|
|
/*h(42)=12 EVV 0x2C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7583}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x2d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x2D V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7588},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x2D V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7589},
|
|
/*h(8)=4 EVV 0x2D V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7590}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x42_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(91)=0 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 7492},
|
|
/*h(347)=1 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 7492},
|
|
/*h(603)=2 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 7492},
|
|
/*h(859)=3 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 7492},
|
|
/*h(88)=4 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {88, 7488},
|
|
/*h(344)=5 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {344, 7490},
|
|
/*h(600)=6 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {600, 7493},
|
|
/*h(89)=7 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {89, 7488},
|
|
/*h(345)=8 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {345, 7490},
|
|
/*h(601)=9 EVV 0x42 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {601, 7493},
|
|
/*h(90)=10 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7487},
|
|
/*h(346)=11 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7489},
|
|
/*h(602)=12 EVV 0x42 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7491}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x43_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x43 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7494},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x43 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {11, 7495},
|
|
/*h(8)=4 EVV 0x43 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7496}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(89)=0 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {89, 7546},
|
|
/*h(602)=1 EVV 0x4C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7549},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=3 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {345, 7548},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=6 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {88, 7546},
|
|
/*h(601)=7 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {601, 7550},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {344, 7548},
|
|
/*h(90)=11 EVV 0x4C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7545},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=14 EVV 0x4C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {600, 7550},
|
|
/*h(346)=15 EVV 0x4C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7547},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10)=0 EVV 0x4D V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7551},
|
|
/*h(8)=1 EVV 0x4D V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7552}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(89)=0 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {89, 7574},
|
|
/*h(602)=1 EVV 0x4E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 7577},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=3 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {345, 7576},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=6 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {88, 7574},
|
|
/*h(601)=7 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {601, 7578},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=10 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {344, 7576},
|
|
/*h(90)=11 EVV 0x4E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 7573},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(600)=14 EVV 0x4E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_16_BITS() NELEM_FULL()*/ {600, 7578},
|
|
/*h(346)=15 EVV 0x4E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 7575},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x4f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10)=0 EVV 0x4F V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7579},
|
|
/*h(8)=1 EVV 0x4F V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7580}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x56_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[47] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(16)=1 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {16, 7278},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(48)=3 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {48, 7280},
|
|
/*h(17)=4 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {17, 7278},
|
|
/*h(80)=5 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {80, 7283},
|
|
/*h(49)=6 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {49, 7280},
|
|
/*h(18)=7 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {18, 7277},
|
|
/*h(81)=8 EVV 0x56 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {81, 7283},
|
|
/*h(50)=9 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {50, 7279},
|
|
/*h(19)=10 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {19, 7282},
|
|
/*h(82)=11 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {82, 7281},
|
|
/*h(51)=12 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {51, 7282},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(83)=14 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {83, 7282},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(115)=16 EVV 0x56 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {115, 7282},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=25 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {24, 7328},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=27 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {56, 7330},
|
|
/*h(25)=28 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {25, 7328},
|
|
/*h(88)=29 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 7333},
|
|
/*h(57)=30 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {57, 7330},
|
|
/*h(26)=31 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {26, 7327},
|
|
/*h(89)=32 EVV 0x56 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 7333},
|
|
/*h(58)=33 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {58, 7329},
|
|
/*h(27)=34 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {27, 7332},
|
|
/*h(90)=35 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {90, 7331},
|
|
/*h(59)=36 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {59, 7332},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {91, 7332},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=40 EVV 0x56 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {123, 7332},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 47);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x57_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(26)=0 EVV 0x57 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7334},
|
|
/*h(18)=1 EVV 0x57 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {18, 7284},
|
|
/*h(27)=2 EVV 0x57 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7335},
|
|
/*h(19)=3 EVV 0x57 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {19, 7285},
|
|
/*h(24)=4 EVV 0x57 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 7336},
|
|
/*h(16)=5 EVV 0x57 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {16, 7286}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = ((8*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x96_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7341},
|
|
/*h(11)=1 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7342},
|
|
/*h(43)=2 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7342},
|
|
/*h(75)=3 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7342},
|
|
/*h(107)=4 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7342},
|
|
/*h(8)=5 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7338},
|
|
/*h(40)=6 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7340},
|
|
/*h(72)=7 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7343},
|
|
/*h(9)=8 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7338},
|
|
/*h(41)=9 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7340},
|
|
/*h(73)=10 EVV 0x96 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7343},
|
|
/*h(10)=11 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7337},
|
|
/*h(42)=12 EVV 0x96 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7339}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x97_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7392},
|
|
/*h(11)=1 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7393},
|
|
/*h(43)=2 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7393},
|
|
/*h(75)=3 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7393},
|
|
/*h(107)=4 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7393},
|
|
/*h(8)=5 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7389},
|
|
/*h(40)=6 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7391},
|
|
/*h(72)=7 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7394},
|
|
/*h(9)=8 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7389},
|
|
/*h(41)=9 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7391},
|
|
/*h(73)=10 EVV 0x97 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7394},
|
|
/*h(10)=11 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7388},
|
|
/*h(42)=12 EVV 0x97 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x98_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7301},
|
|
/*h(11)=1 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7302},
|
|
/*h(43)=2 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7302},
|
|
/*h(75)=3 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7302},
|
|
/*h(107)=4 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7302},
|
|
/*h(8)=5 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7298},
|
|
/*h(40)=6 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7300},
|
|
/*h(72)=7 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7303},
|
|
/*h(9)=8 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7298},
|
|
/*h(41)=9 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7300},
|
|
/*h(73)=10 EVV 0x98 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7303},
|
|
/*h(10)=11 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7297},
|
|
/*h(42)=12 EVV 0x98 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7299}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x99_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x99 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7304},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x99 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7305},
|
|
/*h(8)=4 EVV 0x99 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7306}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7362},
|
|
/*h(11)=1 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7363},
|
|
/*h(43)=2 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7363},
|
|
/*h(75)=3 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7363},
|
|
/*h(107)=4 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7363},
|
|
/*h(8)=5 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7359},
|
|
/*h(40)=6 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7361},
|
|
/*h(72)=7 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7364},
|
|
/*h(9)=8 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7359},
|
|
/*h(41)=9 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7361},
|
|
/*h(73)=10 EVV 0x9A V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7364},
|
|
/*h(10)=11 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7358},
|
|
/*h(42)=12 EVV 0x9A V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x9B V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7365},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x9B V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7366},
|
|
/*h(8)=4 EVV 0x9B V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7367}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7423},
|
|
/*h(11)=1 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7424},
|
|
/*h(43)=2 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7424},
|
|
/*h(75)=3 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7424},
|
|
/*h(107)=4 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7424},
|
|
/*h(8)=5 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7420},
|
|
/*h(40)=6 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7422},
|
|
/*h(72)=7 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7425},
|
|
/*h(9)=8 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7420},
|
|
/*h(41)=9 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7422},
|
|
/*h(73)=10 EVV 0x9C V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7425},
|
|
/*h(10)=11 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7419},
|
|
/*h(42)=12 EVV 0x9C V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7421}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x9D V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7426},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x9D V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7427},
|
|
/*h(8)=4 EVV 0x9D V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7428}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7453},
|
|
/*h(11)=1 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7454},
|
|
/*h(43)=2 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7454},
|
|
/*h(75)=3 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7454},
|
|
/*h(107)=4 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7454},
|
|
/*h(8)=5 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7450},
|
|
/*h(40)=6 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7452},
|
|
/*h(72)=7 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7455},
|
|
/*h(9)=8 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7450},
|
|
/*h(41)=9 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7452},
|
|
/*h(73)=10 EVV 0x9E V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7455},
|
|
/*h(10)=11 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7449},
|
|
/*h(42)=12 EVV 0x9E V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7451}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0x9f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0x9F V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7456},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0x9F V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7457},
|
|
/*h(8)=4 EVV 0x9F V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7458}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7348},
|
|
/*h(11)=1 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7349},
|
|
/*h(43)=2 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7349},
|
|
/*h(75)=3 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7349},
|
|
/*h(107)=4 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7349},
|
|
/*h(8)=5 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7345},
|
|
/*h(40)=6 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7347},
|
|
/*h(72)=7 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7350},
|
|
/*h(9)=8 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7345},
|
|
/*h(41)=9 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7347},
|
|
/*h(73)=10 EVV 0xA6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7350},
|
|
/*h(10)=11 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7344},
|
|
/*h(42)=12 EVV 0xA6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7346}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7399},
|
|
/*h(11)=1 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7400},
|
|
/*h(43)=2 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7400},
|
|
/*h(75)=3 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7400},
|
|
/*h(107)=4 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7400},
|
|
/*h(8)=5 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7396},
|
|
/*h(40)=6 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7398},
|
|
/*h(72)=7 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7401},
|
|
/*h(9)=8 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7396},
|
|
/*h(41)=9 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7398},
|
|
/*h(73)=10 EVV 0xA7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7401},
|
|
/*h(10)=11 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7395},
|
|
/*h(42)=12 EVV 0xA7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7397}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7311},
|
|
/*h(11)=1 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7312},
|
|
/*h(43)=2 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7312},
|
|
/*h(75)=3 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7312},
|
|
/*h(107)=4 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7312},
|
|
/*h(8)=5 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7308},
|
|
/*h(40)=6 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7310},
|
|
/*h(72)=7 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7313},
|
|
/*h(9)=8 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7308},
|
|
/*h(41)=9 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7310},
|
|
/*h(73)=10 EVV 0xA8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7313},
|
|
/*h(10)=11 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7307},
|
|
/*h(42)=12 EVV 0xA8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xa9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xA9 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7314},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xA9 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7315},
|
|
/*h(8)=4 EVV 0xA9 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7316}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xaa_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7372},
|
|
/*h(11)=1 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7373},
|
|
/*h(43)=2 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7373},
|
|
/*h(75)=3 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7373},
|
|
/*h(107)=4 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7373},
|
|
/*h(8)=5 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7369},
|
|
/*h(40)=6 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7371},
|
|
/*h(72)=7 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7374},
|
|
/*h(9)=8 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7369},
|
|
/*h(41)=9 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7371},
|
|
/*h(73)=10 EVV 0xAA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7374},
|
|
/*h(10)=11 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7368},
|
|
/*h(42)=12 EVV 0xAA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7370}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xab_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xAB V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7375},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xAB V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7376},
|
|
/*h(8)=4 EVV 0xAB V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7377}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xac_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7433},
|
|
/*h(11)=1 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7434},
|
|
/*h(43)=2 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7434},
|
|
/*h(75)=3 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7434},
|
|
/*h(107)=4 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7434},
|
|
/*h(8)=5 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7430},
|
|
/*h(40)=6 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7432},
|
|
/*h(72)=7 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7435},
|
|
/*h(9)=8 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7430},
|
|
/*h(41)=9 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7432},
|
|
/*h(73)=10 EVV 0xAC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7435},
|
|
/*h(10)=11 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7429},
|
|
/*h(42)=12 EVV 0xAC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7431}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xad_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xAD V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7436},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xAD V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7437},
|
|
/*h(8)=4 EVV 0xAD V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7438}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xae_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7463},
|
|
/*h(11)=1 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7464},
|
|
/*h(43)=2 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7464},
|
|
/*h(75)=3 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7464},
|
|
/*h(107)=4 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7464},
|
|
/*h(8)=5 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7460},
|
|
/*h(40)=6 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7462},
|
|
/*h(72)=7 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7465},
|
|
/*h(9)=8 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7460},
|
|
/*h(41)=9 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7462},
|
|
/*h(73)=10 EVV 0xAE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7465},
|
|
/*h(10)=11 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7459},
|
|
/*h(42)=12 EVV 0xAE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7461}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xaf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xAF V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7466},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xAF V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7467},
|
|
/*h(8)=4 EVV 0xAF V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7468}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7355},
|
|
/*h(11)=1 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7356},
|
|
/*h(43)=2 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7356},
|
|
/*h(75)=3 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7356},
|
|
/*h(107)=4 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7356},
|
|
/*h(8)=5 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7352},
|
|
/*h(40)=6 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7354},
|
|
/*h(72)=7 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7357},
|
|
/*h(9)=8 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7352},
|
|
/*h(41)=9 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7354},
|
|
/*h(73)=10 EVV 0xB6 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7357},
|
|
/*h(10)=11 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7351},
|
|
/*h(42)=12 EVV 0xB6 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7353}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7406},
|
|
/*h(11)=1 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7407},
|
|
/*h(43)=2 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7407},
|
|
/*h(75)=3 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7407},
|
|
/*h(107)=4 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7407},
|
|
/*h(8)=5 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7403},
|
|
/*h(40)=6 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7405},
|
|
/*h(72)=7 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7408},
|
|
/*h(9)=8 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7403},
|
|
/*h(41)=9 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7405},
|
|
/*h(73)=10 EVV 0xB7 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7408},
|
|
/*h(10)=11 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7402},
|
|
/*h(42)=12 EVV 0xB7 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7404}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7321},
|
|
/*h(11)=1 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7322},
|
|
/*h(43)=2 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7322},
|
|
/*h(75)=3 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7322},
|
|
/*h(107)=4 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7322},
|
|
/*h(8)=5 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7318},
|
|
/*h(40)=6 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7320},
|
|
/*h(72)=7 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7323},
|
|
/*h(9)=8 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7318},
|
|
/*h(41)=9 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7320},
|
|
/*h(73)=10 EVV 0xB8 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7323},
|
|
/*h(10)=11 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7317},
|
|
/*h(42)=12 EVV 0xB8 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7319}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xb9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xB9 V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7324},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xB9 V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7325},
|
|
/*h(8)=4 EVV 0xB9 V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7326}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xba_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7382},
|
|
/*h(11)=1 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7383},
|
|
/*h(43)=2 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7383},
|
|
/*h(75)=3 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7383},
|
|
/*h(107)=4 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7383},
|
|
/*h(8)=5 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7379},
|
|
/*h(40)=6 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7381},
|
|
/*h(72)=7 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7384},
|
|
/*h(9)=8 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7379},
|
|
/*h(41)=9 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7381},
|
|
/*h(73)=10 EVV 0xBA V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7384},
|
|
/*h(10)=11 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7378},
|
|
/*h(42)=12 EVV 0xBA V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xBB V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7385},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xBB V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7386},
|
|
/*h(8)=4 EVV 0xBB V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7387}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7443},
|
|
/*h(11)=1 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7444},
|
|
/*h(43)=2 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7444},
|
|
/*h(75)=3 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7444},
|
|
/*h(107)=4 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7444},
|
|
/*h(8)=5 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7440},
|
|
/*h(40)=6 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7442},
|
|
/*h(72)=7 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7445},
|
|
/*h(9)=8 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7440},
|
|
/*h(41)=9 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7442},
|
|
/*h(73)=10 EVV 0xBC V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7445},
|
|
/*h(10)=11 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7439},
|
|
/*h(42)=12 EVV 0xBC V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7441}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xBD V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7446},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xBD V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7447},
|
|
/*h(8)=4 EVV 0xBD V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7448}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbe_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[13] = {
|
|
/*h(74)=0 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 7473},
|
|
/*h(11)=1 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {11, 7474},
|
|
/*h(43)=2 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {43, 7474},
|
|
/*h(75)=3 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {75, 7474},
|
|
/*h(107)=4 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {107, 7474},
|
|
/*h(8)=5 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {8, 7470},
|
|
/*h(40)=6 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {40, 7472},
|
|
/*h(72)=7 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {72, 7475},
|
|
/*h(9)=8 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_16_BITS() NELEM_FULL()*/ {9, 7470},
|
|
/*h(41)=9 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_16_BITS() NELEM_FULL()*/ {41, 7472},
|
|
/*h(73)=10 EVV 0xBE V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_16_BITS() NELEM_FULL()*/ {73, 7475},
|
|
/*h(10)=11 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 7469},
|
|
/*h(42)=12 EVV 0xBE V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 7471}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 19) % 13);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xbf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(10)=0 EVV 0xBF V66 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {10, 7476},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(11)=3 EVV 0xBF V66 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {11, 7477},
|
|
/*h(8)=4 EVV 0xBF V66 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_16_BITS() NELEM_SCALAR()*/ {8, 7478}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 5ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xd6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[47] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(16)=1 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {16, 7288},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(48)=3 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {48, 7290},
|
|
/*h(17)=4 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {17, 7288},
|
|
/*h(80)=5 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {80, 7293},
|
|
/*h(49)=6 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {49, 7290},
|
|
/*h(18)=7 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {18, 7287},
|
|
/*h(81)=8 EVV 0xD6 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {81, 7293},
|
|
/*h(50)=9 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {50, 7289},
|
|
/*h(19)=10 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {19, 7292},
|
|
/*h(82)=11 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {82, 7291},
|
|
/*h(51)=12 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {51, 7292},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(83)=14 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {83, 7292},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(115)=16 EVV 0xD6 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {115, 7292},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(24)=25 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {24, 7410},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(56)=27 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {56, 7412},
|
|
/*h(25)=28 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {25, 7410},
|
|
/*h(88)=29 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {88, 7415},
|
|
/*h(57)=30 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {57, 7412},
|
|
/*h(26)=31 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {26, 7409},
|
|
/*h(89)=32 EVV 0xD6 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {89, 7415},
|
|
/*h(58)=33 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {58, 7411},
|
|
/*h(27)=34 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {27, 7414},
|
|
/*h(90)=35 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {90, 7413},
|
|
/*h(59)=36 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {59, 7414},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=38 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {91, 7414},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=40 EVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {123, 7414},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 47);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map6_opcode0xd7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(26)=0 EVV 0xD7 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {26, 7416},
|
|
/*h(18)=1 EVV 0xD7 VF2 MAP6 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] FIX_ROUND_LEN128() W0*/ {18, 7294},
|
|
/*h(27)=2 EVV 0xD7 VF3 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 7417},
|
|
/*h(19)=3 EVV 0xD7 VF2 MAP6 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {19, 7295},
|
|
/*h(24)=4 EVV 0xD7 VF3 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 7418},
|
|
/*h(16)=5 EVV 0xD7 VF2 MAP6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() FIX_ROUND_LEN128() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {16, 7296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(d);
|
|
hidx = ((8*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(156)=0 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ESIZE_64_BITS() NELEM_SCALAR()*/ {156, 5007},
|
|
/*h(910)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {910, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(234)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {234, 5025},
|
|
/*h(412)=1 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ESIZE_64_BITS() NELEM_SCALAR()*/ {412, 5007}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(668)=0 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ESIZE_64_BITS() NELEM_SCALAR()*/ {5007}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 668;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26)=0 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 5043},
|
|
/*h(458)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {458, 5025},
|
|
/*h(924)=2 EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ESIZE_64_BITS() NELEM_SCALAR()*/ {924, 5007}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(134)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {134, 5009},
|
|
/*h(422)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {422, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(390)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {390, 5009},
|
|
/*h(678)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {678, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(934)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {934, 5009},
|
|
/*h(646)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {646, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(902)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(166)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 166;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(150)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {150, 5009},
|
|
/*h(472)=1 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 5023}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(406)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 406;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(950)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {950, 5009},
|
|
/*h(662)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {662, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(918)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 918;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(182)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 182;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(438)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 438;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(694)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {430, 5009},
|
|
/*h(142)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {142, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(398)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 398;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(654)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(174)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(686)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(942)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(158)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {158, 5009},
|
|
/*h(446)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {446, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(92)=0 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5032},
|
|
/*h(702)=1 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {702, 5009},
|
|
/*h(414)=2 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {414, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(958)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {958, 5009},
|
|
/*h(348)=1 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5036},
|
|
/*h(670)=2 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {670, 5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(926)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(190)=0 EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5009}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(216)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 5023},
|
|
/*h(970)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {970, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(728)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ESIZE_32_BITS() NELEM_SCALAR()*/ {5023}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 728;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(984)=0 EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ESIZE_32_BITS() NELEM_SCALAR()*/ {5023}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 984;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(194)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 194;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {450, 5025},
|
|
/*h(738)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {738, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(994)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {994, 5025},
|
|
/*h(706)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {706, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(962)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(226)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 226;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(482)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 482;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(210)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(466)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1010)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1010, 5025},
|
|
/*h(722)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {722, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(978)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 978;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(242)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(498)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(754)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(490)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {490, 5025},
|
|
/*h(202)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {202, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(714)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {714, 5025},
|
|
/*h(282)=1 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 5047}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(746)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {746, 5025},
|
|
/*h(280)=1 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 5048}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1002)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1002, 5025},
|
|
/*h(536)=1 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 5040}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(218)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 218;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(474)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {474, 5025},
|
|
/*h(762)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {762, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(730)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {730, 5025},
|
|
/*h(1018)=1 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1018, 5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(986)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(250)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {250, 5025},
|
|
/*h(538)=1 EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 5039}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(506)=0 EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5025}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(606)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {5027}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(604)=0 EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {5028}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(94)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {5031}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 94;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(350)=0 EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5035}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24)=0 EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {5044}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 24;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x10_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[84] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map1_opcode0x10_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(678)=2 */ {678, xed3_phash_find_mapevex_map1_opcode0x10_vv2_2_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(280)=4 */ {280, xed3_phash_find_mapevex_map1_opcode0x10_vv2_4_l1},
|
|
/*h(26)=5 */ {26, xed3_phash_find_mapevex_map1_opcode0x10_vv2_5_l1},
|
|
/*h(348)=6 */ {348, xed3_phash_find_mapevex_map1_opcode0x10_vv2_6_l1},
|
|
/*h(94)=7 */ {94, xed3_phash_find_mapevex_map1_opcode0x10_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(738)=9 */ {738, xed3_phash_find_mapevex_map1_opcode0x10_vv2_9_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(950)=11 */ {950, xed3_phash_find_mapevex_map1_opcode0x10_vv2_11_l1},
|
|
/*h(984)=12 */ {984, xed3_phash_find_mapevex_map1_opcode0x10_vv2_12_l1},
|
|
/*h(1018)=13 */ {1018, xed3_phash_find_mapevex_map1_opcode0x10_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(942)=15 */ {942, xed3_phash_find_mapevex_map1_opcode0x10_vv2_15_l1},
|
|
/*h(654)=16 */ {654, xed3_phash_find_mapevex_map1_opcode0x10_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=18 */ {1010, xed3_phash_find_mapevex_map1_opcode0x10_vv2_18_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(934)=20 */ {934, xed3_phash_find_mapevex_map1_opcode0x10_vv2_20_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(536)=22 */ {536, xed3_phash_find_mapevex_map1_opcode0x10_vv2_22_l1},
|
|
/*h(282)=23 */ {282, xed3_phash_find_mapevex_map1_opcode0x10_vv2_23_l1},
|
|
/*h(604)=24 */ {604, xed3_phash_find_mapevex_map1_opcode0x10_vv2_24_l1},
|
|
/*h(926)=25 */ {926, xed3_phash_find_mapevex_map1_opcode0x10_vv2_25_l1},
|
|
/*h(350)=26 */ {350, xed3_phash_find_mapevex_map1_opcode0x10_vv2_26_l1},
|
|
/*h(994)=27 */ {994, xed3_phash_find_mapevex_map1_opcode0x10_vv2_27_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(918)=29 */ {918, xed3_phash_find_mapevex_map1_opcode0x10_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(986)=32 */ {986, xed3_phash_find_mapevex_map1_opcode0x10_vv2_32_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(910)=34 */ {910, xed3_phash_find_mapevex_map1_opcode0x10_vv2_34_l1},
|
|
/*h(190)=35 */ {190, xed3_phash_find_mapevex_map1_opcode0x10_vv2_35_l1},
|
|
/*h(978)=36 */ {978, xed3_phash_find_mapevex_map1_opcode0x10_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(902)=39 */ {902, xed3_phash_find_mapevex_map1_opcode0x10_vv2_39_l1},
|
|
/*h(182)=40 */ {182, xed3_phash_find_mapevex_map1_opcode0x10_vv2_40_l1},
|
|
/*h(970)=41 */ {970, xed3_phash_find_mapevex_map1_opcode0x10_vv2_41_l1},
|
|
/*h(538)=42 */ {538, xed3_phash_find_mapevex_map1_opcode0x10_vv2_42_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(606)=44 */ {606, xed3_phash_find_mapevex_map1_opcode0x10_vv2_44_l1},
|
|
/*h(174)=45 */ {174, xed3_phash_find_mapevex_map1_opcode0x10_vv2_45_l1},
|
|
/*h(962)=46 */ {962, xed3_phash_find_mapevex_map1_opcode0x10_vv2_46_l1},
|
|
/*h(242)=47 */ {242, xed3_phash_find_mapevex_map1_opcode0x10_vv2_47_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(166)=49 */ {166, xed3_phash_find_mapevex_map1_opcode0x10_vv2_49_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(234)=52 */ {234, xed3_phash_find_mapevex_map1_opcode0x10_vv2_52_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(446)=54 */ {446, xed3_phash_find_mapevex_map1_opcode0x10_vv2_54_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(226)=56 */ {226, xed3_phash_find_mapevex_map1_opcode0x10_vv2_56_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(438)=58 */ {438, xed3_phash_find_mapevex_map1_opcode0x10_vv2_58_l1},
|
|
/*h(472)=59 */ {472, xed3_phash_find_mapevex_map1_opcode0x10_vv2_59_l1},
|
|
/*h(506)=60 */ {506, xed3_phash_find_mapevex_map1_opcode0x10_vv2_60_l1},
|
|
/*h(218)=61 */ {218, xed3_phash_find_mapevex_map1_opcode0x10_vv2_61_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(430)=63 */ {430, xed3_phash_find_mapevex_map1_opcode0x10_vv2_63_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(498)=65 */ {498, xed3_phash_find_mapevex_map1_opcode0x10_vv2_65_l1},
|
|
/*h(210)=66 */ {210, xed3_phash_find_mapevex_map1_opcode0x10_vv2_66_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(422)=68 */ {422, xed3_phash_find_mapevex_map1_opcode0x10_vv2_68_l1},
|
|
/*h(24)=69 */ {24, xed3_phash_find_mapevex_map1_opcode0x10_vv2_69_l1},
|
|
/*h(490)=70 */ {490, xed3_phash_find_mapevex_map1_opcode0x10_vv2_70_l1},
|
|
/*h(668)=71 */ {668, xed3_phash_find_mapevex_map1_opcode0x10_vv2_71_l1},
|
|
/*h(92)=72 */ {92, xed3_phash_find_mapevex_map1_opcode0x10_vv2_72_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(482)=74 */ {482, xed3_phash_find_mapevex_map1_opcode0x10_vv2_74_l1},
|
|
/*h(194)=75 */ {194, xed3_phash_find_mapevex_map1_opcode0x10_vv2_75_l1},
|
|
/*h(694)=76 */ {694, xed3_phash_find_mapevex_map1_opcode0x10_vv2_76_l1},
|
|
/*h(406)=77 */ {406, xed3_phash_find_mapevex_map1_opcode0x10_vv2_77_l1},
|
|
/*h(728)=78 */ {728, xed3_phash_find_mapevex_map1_opcode0x10_vv2_78_l1},
|
|
/*h(762)=79 */ {762, xed3_phash_find_mapevex_map1_opcode0x10_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(686)=81 */ {686, xed3_phash_find_mapevex_map1_opcode0x10_vv2_81_l1},
|
|
/*h(398)=82 */ {398, xed3_phash_find_mapevex_map1_opcode0x10_vv2_82_l1},
|
|
/*h(754)=83 */ {754, xed3_phash_find_mapevex_map1_opcode0x10_vv2_83_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 84ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(156)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {156, 5008},
|
|
/*h(1986)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1986, 5026},
|
|
/*h(910)=2 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {910, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_97_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(412)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {5008}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 412;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1422)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1422, 5010},
|
|
/*h(668)=1 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {668, 5008}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(924)=0 EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {924, 5008},
|
|
/*h(1678)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1678, 5010},
|
|
/*h(458)=2 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {458, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(134)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {134, 5010},
|
|
/*h(1498)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1498, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1158)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1158;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(390)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 390;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(194)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {194, 5026},
|
|
/*h(1414)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1414, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2010)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {2010, 5026},
|
|
/*h(646)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {646, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_17_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(450)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {450, 5026},
|
|
/*h(1958)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1958, 5010},
|
|
/*h(1670)=2 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1670, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(902)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(706)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {706, 5026},
|
|
/*h(1926)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1926, 5010},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1530)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1530, 5026},
|
|
/*h(166)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {166, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1190)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(422)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {422, 5010},
|
|
/*h(1786)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1786, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1446)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1446, 5010},
|
|
/*h(226)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {226, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(678)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {678, 5010},
|
|
/*h(1754)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1754, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(482)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {482, 5026},
|
|
/*h(1702)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1702, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(934)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(150)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {150, 5010},
|
|
/*h(1514)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1514, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1174)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(406)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {406, 5010},
|
|
/*h(694)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {694, 5010},
|
|
/*h(1770)=2 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1770, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_121_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(210)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {210, 5026},
|
|
/*h(1430)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1430, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(662)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {662, 5010},
|
|
/*h(2026)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {2026, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1686)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1686, 5010},
|
|
/*h(466)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {466, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(918)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 918;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1942)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(182)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {182, 5010},
|
|
/*h(1258)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1258, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1206)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1206;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(438)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 438;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1462)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(498)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {498, 5026},
|
|
/*h(1718)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1718, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1974)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1974, 5010},
|
|
/*h(754)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {754, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1218)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1218, 5026},
|
|
/*h(142)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {142, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1166)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1166;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(398)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {398, 5010},
|
|
/*h(1762)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1762, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(654)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {654, 5010},
|
|
/*h(2018)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {2018, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(714)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {714, 5026},
|
|
/*h(1934)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1934, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(174)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1198)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1198;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1506)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1506, 5026},
|
|
/*h(430)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {430, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(234)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {234, 5026},
|
|
/*h(1454)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1454, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(686)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1710)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1710, 5010},
|
|
/*h(202)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {202, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(942)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(746)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {746, 5026},
|
|
/*h(1966)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1966, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(158)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {158, 5010},
|
|
/*h(1234)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1234, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1182)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1182;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(414)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {414, 5010},
|
|
/*h(1778)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1778, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(218)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {218, 5026},
|
|
/*h(1438)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1438, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2034)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {2034, 5026},
|
|
/*h(670)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {670, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(474)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {474, 5026},
|
|
/*h(1694)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1694, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(926)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {926, 5010},
|
|
/*h(2002)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {2002, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1950)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1950, 5010},
|
|
/*h(730)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {730, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(190)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1214)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1214, 5010},
|
|
/*h(604)=1 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 5030}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(446)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {446, 5010},
|
|
/*h(1522)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1522, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1470)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1470, 5010},
|
|
/*h(250)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {250, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(702)=0 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {702, 5010},
|
|
/*h(92)=1 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 5034}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(506)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {506, 5026},
|
|
/*h(1726)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1726, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(348)=0 EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 5038},
|
|
/*h(958)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {958, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {762, 5026},
|
|
/*h(1982)=1 EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {1982, 5010}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(216)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5024}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 216;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1226)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1226, 5026},
|
|
/*h(472)=1 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 5024}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(728)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5024}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 728;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(984)=0 EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 5024},
|
|
/*h(1738)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1738, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1474)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1730)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(962)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1250)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(738)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(994)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1490)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1490;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1010)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1010, 5026},
|
|
/*h(722)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {722, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1746)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(978)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 978;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(242)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1266)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1266;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1482)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1482;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(970)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1994)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 5046},
|
|
/*h(490)=1 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {490, 5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1002)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1242)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(986)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1274)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1018)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2042)=0 EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5026}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2042;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(606)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {5029}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1630)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {5029}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1630;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(94)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {5033}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 94;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1118)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {5033}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1118;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(350)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5037}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1374)=0 EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5037}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1374;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(538)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {5041}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1562)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {5041}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(536)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {5042}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 536;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {5045}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1050)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {5045}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1050;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(282)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5049}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1306)=0 EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5049}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1306;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(280)=0 EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {5050}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 280;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x11_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[154] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map1_opcode0x11_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2042)=3 */ {2042, xed3_phash_find_mapevex_map1_opcode0x11_vv2_3_l1},
|
|
/*h(1754)=4 */ {1754, xed3_phash_find_mapevex_map1_opcode0x11_vv2_4_l1},
|
|
/*h(390)=5 */ {390, xed3_phash_find_mapevex_map1_opcode0x11_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(280)=7 */ {280, xed3_phash_find_mapevex_map1_opcode0x11_vv2_7_l1},
|
|
/*h(746)=8 */ {746, xed3_phash_find_mapevex_map1_opcode0x11_vv2_8_l1},
|
|
/*h(458)=9 */ {458, xed3_phash_find_mapevex_map1_opcode0x11_vv2_9_l1},
|
|
/*h(26)=10 */ {26, xed3_phash_find_mapevex_map1_opcode0x11_vv2_10_l1},
|
|
/*h(348)=11 */ {348, xed3_phash_find_mapevex_map1_opcode0x11_vv2_11_l1},
|
|
/*h(2034)=12 */ {2034, xed3_phash_find_mapevex_map1_opcode0x11_vv2_12_l1},
|
|
/*h(1746)=13 */ {1746, xed3_phash_find_mapevex_map1_opcode0x11_vv2_13_l1},
|
|
/*h(94)=14 */ {94, xed3_phash_find_mapevex_map1_opcode0x11_vv2_14_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(738)=16 */ {738, xed3_phash_find_mapevex_map1_opcode0x11_vv2_16_l1},
|
|
/*h(450)=17 */ {450, xed3_phash_find_mapevex_map1_opcode0x11_vv2_17_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(950)=20 */ {950, xed3_phash_find_mapevex_map1_opcode0x11_vv2_20_l1},
|
|
/*h(2026)=21 */ {2026, xed3_phash_find_mapevex_map1_opcode0x11_vv2_21_l1},
|
|
/*h(1738)=22 */ {1738, xed3_phash_find_mapevex_map1_opcode0x11_vv2_22_l1},
|
|
/*h(1306)=23 */ {1306, xed3_phash_find_mapevex_map1_opcode0x11_vv2_23_l1},
|
|
/*h(1018)=24 */ {1018, xed3_phash_find_mapevex_map1_opcode0x11_vv2_24_l1},
|
|
/*h(730)=25 */ {730, xed3_phash_find_mapevex_map1_opcode0x11_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1374)=27 */ {1374, xed3_phash_find_mapevex_map1_opcode0x11_vv2_27_l1},
|
|
/*h(942)=28 */ {942, xed3_phash_find_mapevex_map1_opcode0x11_vv2_28_l1},
|
|
/*h(2018)=29 */ {2018, xed3_phash_find_mapevex_map1_opcode0x11_vv2_29_l1},
|
|
/*h(1730)=30 */ {1730, xed3_phash_find_mapevex_map1_opcode0x11_vv2_30_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=33 */ {1010, xed3_phash_find_mapevex_map1_opcode0x11_vv2_33_l1},
|
|
/*h(1942)=34 */ {1942, xed3_phash_find_mapevex_map1_opcode0x11_vv2_34_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(934)=37 */ {934, xed3_phash_find_mapevex_map1_opcode0x11_vv2_37_l1},
|
|
/*h(2010)=38 */ {2010, xed3_phash_find_mapevex_map1_opcode0x11_vv2_38_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(536)=40 */ {536, xed3_phash_find_mapevex_map1_opcode0x11_vv2_40_l1},
|
|
/*h(1002)=41 */ {1002, xed3_phash_find_mapevex_map1_opcode0x11_vv2_41_l1},
|
|
/*h(714)=42 */ {714, xed3_phash_find_mapevex_map1_opcode0x11_vv2_42_l1},
|
|
/*h(282)=43 */ {282, xed3_phash_find_mapevex_map1_opcode0x11_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(604)=45 */ {604, xed3_phash_find_mapevex_map1_opcode0x11_vv2_45_l1},
|
|
/*h(2002)=46 */ {2002, xed3_phash_find_mapevex_map1_opcode0x11_vv2_46_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(350)=48 */ {350, xed3_phash_find_mapevex_map1_opcode0x11_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(994)=50 */ {994, xed3_phash_find_mapevex_map1_opcode0x11_vv2_50_l1},
|
|
/*h(706)=51 */ {706, xed3_phash_find_mapevex_map1_opcode0x11_vv2_51_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1206)=53 */ {1206, xed3_phash_find_mapevex_map1_opcode0x11_vv2_53_l1},
|
|
/*h(918)=54 */ {918, xed3_phash_find_mapevex_map1_opcode0x11_vv2_54_l1},
|
|
/*h(1994)=55 */ {1994, xed3_phash_find_mapevex_map1_opcode0x11_vv2_55_l1},
|
|
/*h(1562)=56 */ {1562, xed3_phash_find_mapevex_map1_opcode0x11_vv2_56_l1},
|
|
/*h(1274)=57 */ {1274, xed3_phash_find_mapevex_map1_opcode0x11_vv2_57_l1},
|
|
/*h(986)=58 */ {986, xed3_phash_find_mapevex_map1_opcode0x11_vv2_58_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1630)=60 */ {1630, xed3_phash_find_mapevex_map1_opcode0x11_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1198)=62 */ {1198, xed3_phash_find_mapevex_map1_opcode0x11_vv2_62_l1},
|
|
/*h(1986)=63 */ {1986, xed3_phash_find_mapevex_map1_opcode0x11_vv2_63_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(190)=65 */ {190, xed3_phash_find_mapevex_map1_opcode0x11_vv2_65_l1},
|
|
/*h(1266)=66 */ {1266, xed3_phash_find_mapevex_map1_opcode0x11_vv2_66_l1},
|
|
/*h(978)=67 */ {978, xed3_phash_find_mapevex_map1_opcode0x11_vv2_67_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1190)=70 */ {1190, xed3_phash_find_mapevex_map1_opcode0x11_vv2_70_l1},
|
|
/*h(902)=71 */ {902, xed3_phash_find_mapevex_map1_opcode0x11_vv2_71_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1258)=74 */ {1258, xed3_phash_find_mapevex_map1_opcode0x11_vv2_74_l1},
|
|
/*h(970)=75 */ {970, xed3_phash_find_mapevex_map1_opcode0x11_vv2_75_l1},
|
|
/*h(216)=76 */ {216, xed3_phash_find_mapevex_map1_opcode0x11_vv2_76_l1},
|
|
/*h(538)=77 */ {538, xed3_phash_find_mapevex_map1_opcode0x11_vv2_77_l1},
|
|
/*h(250)=78 */ {250, xed3_phash_find_mapevex_map1_opcode0x11_vv2_78_l1},
|
|
/*h(1182)=79 */ {1182, xed3_phash_find_mapevex_map1_opcode0x11_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(606)=81 */ {606, xed3_phash_find_mapevex_map1_opcode0x11_vv2_81_l1},
|
|
/*h(174)=82 */ {174, xed3_phash_find_mapevex_map1_opcode0x11_vv2_82_l1},
|
|
/*h(1250)=83 */ {1250, xed3_phash_find_mapevex_map1_opcode0x11_vv2_83_l1},
|
|
/*h(962)=84 */ {962, xed3_phash_find_mapevex_map1_opcode0x11_vv2_84_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(242)=86 */ {242, xed3_phash_find_mapevex_map1_opcode0x11_vv2_86_l1},
|
|
/*h(1462)=87 */ {1462, xed3_phash_find_mapevex_map1_opcode0x11_vv2_87_l1},
|
|
/*h(1174)=88 */ {1174, xed3_phash_find_mapevex_map1_opcode0x11_vv2_88_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1530)=91 */ {1530, xed3_phash_find_mapevex_map1_opcode0x11_vv2_91_l1},
|
|
/*h(1242)=92 */ {1242, xed3_phash_find_mapevex_map1_opcode0x11_vv2_92_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(234)=95 */ {234, xed3_phash_find_mapevex_map1_opcode0x11_vv2_95_l1},
|
|
/*h(1166)=96 */ {1166, xed3_phash_find_mapevex_map1_opcode0x11_vv2_96_l1},
|
|
/*h(412)=97 */ {412, xed3_phash_find_mapevex_map1_opcode0x11_vv2_97_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1522)=99 */ {1522, xed3_phash_find_mapevex_map1_opcode0x11_vv2_99_l1},
|
|
/*h(1234)=100 */ {1234, xed3_phash_find_mapevex_map1_opcode0x11_vv2_100_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(226)=104 */ {226, xed3_phash_find_mapevex_map1_opcode0x11_vv2_104_l1},
|
|
/*h(1158)=105 */ {1158, xed3_phash_find_mapevex_map1_opcode0x11_vv2_105_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(438)=107 */ {438, xed3_phash_find_mapevex_map1_opcode0x11_vv2_107_l1},
|
|
/*h(1514)=108 */ {1514, xed3_phash_find_mapevex_map1_opcode0x11_vv2_108_l1},
|
|
/*h(1226)=109 */ {1226, xed3_phash_find_mapevex_map1_opcode0x11_vv2_109_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(506)=111 */ {506, xed3_phash_find_mapevex_map1_opcode0x11_vv2_111_l1},
|
|
/*h(218)=112 */ {218, xed3_phash_find_mapevex_map1_opcode0x11_vv2_112_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1506)=116 */ {1506, xed3_phash_find_mapevex_map1_opcode0x11_vv2_116_l1},
|
|
/*h(1218)=117 */ {1218, xed3_phash_find_mapevex_map1_opcode0x11_vv2_117_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(498)=120 */ {498, xed3_phash_find_mapevex_map1_opcode0x11_vv2_120_l1},
|
|
/*h(210)=121 */ {210, xed3_phash_find_mapevex_map1_opcode0x11_vv2_121_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1786)=124 */ {1786, xed3_phash_find_mapevex_map1_opcode0x11_vv2_124_l1},
|
|
/*h(1498)=125 */ {1498, xed3_phash_find_mapevex_map1_opcode0x11_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24)=128 */ {24, xed3_phash_find_mapevex_map1_opcode0x11_vv2_128_l1},
|
|
/*h(202)=129 */ {202, xed3_phash_find_mapevex_map1_opcode0x11_vv2_129_l1},
|
|
/*h(1422)=130 */ {1422, xed3_phash_find_mapevex_map1_opcode0x11_vv2_130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(92)=132 */ {92, xed3_phash_find_mapevex_map1_opcode0x11_vv2_132_l1},
|
|
/*h(1778)=133 */ {1778, xed3_phash_find_mapevex_map1_opcode0x11_vv2_133_l1},
|
|
/*h(1490)=134 */ {1490, xed3_phash_find_mapevex_map1_opcode0x11_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(482)=137 */ {482, xed3_phash_find_mapevex_map1_opcode0x11_vv2_137_l1},
|
|
/*h(194)=138 */ {194, xed3_phash_find_mapevex_map1_opcode0x11_vv2_138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1770)=141 */ {1770, xed3_phash_find_mapevex_map1_opcode0x11_vv2_141_l1},
|
|
/*h(1482)=142 */ {1482, xed3_phash_find_mapevex_map1_opcode0x11_vv2_142_l1},
|
|
/*h(728)=143 */ {728, xed3_phash_find_mapevex_map1_opcode0x11_vv2_143_l1},
|
|
/*h(1050)=144 */ {1050, xed3_phash_find_mapevex_map1_opcode0x11_vv2_144_l1},
|
|
/*h(762)=145 */ {762, xed3_phash_find_mapevex_map1_opcode0x11_vv2_145_l1},
|
|
/*h(474)=146 */ {474, xed3_phash_find_mapevex_map1_opcode0x11_vv2_146_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1118)=148 */ {1118, xed3_phash_find_mapevex_map1_opcode0x11_vv2_148_l1},
|
|
/*h(686)=149 */ {686, xed3_phash_find_mapevex_map1_opcode0x11_vv2_149_l1},
|
|
/*h(1762)=150 */ {1762, xed3_phash_find_mapevex_map1_opcode0x11_vv2_150_l1},
|
|
/*h(1474)=151 */ {1474, xed3_phash_find_mapevex_map1_opcode0x11_vv2_151_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(754)=153 */ {754, xed3_phash_find_mapevex_map1_opcode0x11_vv2_153_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 154ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1340)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1340, 4923},
|
|
/*h(2992)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2992, 5022}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(948)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {948, 5021},
|
|
/*h(3388)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {3388, 4923},
|
|
/*h(50)=2 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2994)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2994, 5022},
|
|
/*h(1342)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1342, 4923}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3390)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {3390, 4923},
|
|
/*h(950)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {950, 5021}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1336)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4924}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1336;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3384)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {3384, 4924},
|
|
/*h(944)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {944, 5022}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1338)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {1338, 4924},
|
|
/*h(118)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {118, 4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3386)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {3386, 4924},
|
|
/*h(946)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {946, 5022}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3510)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {3510, 5017},
|
|
/*h(316)=1 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {316, 4925}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_2_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2364)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {2364, 4925},
|
|
/*h(102)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {102, 4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(318)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4925}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 318;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2366)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4925}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2366;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(312)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {312, 4926},
|
|
/*h(3506)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {3506, 5018}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1462)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1462, 5017},
|
|
/*h(98)=1 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {98, 4985},
|
|
/*h(2360)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2360, 4926}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 17) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_4_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(170)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {170, 4983},
|
|
/*h(3508)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {3508, 5017},
|
|
/*h(314)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {314, 4926}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2362)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4926}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2362;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(828)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {828, 4927},
|
|
/*h(2480)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2480, 5020},
|
|
/*h(218)=2 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {218, 4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2876)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2876, 4927},
|
|
/*h(436)=1 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 5019}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(830)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {830, 4927},
|
|
/*h(2482)=1 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2482, 5020}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2878)=0 EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2878, 4927},
|
|
/*h(6)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {6, 4977},
|
|
/*h(438)=2 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 5019}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(824)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {824, 4928},
|
|
/*h(70)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {70, 4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(432)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {432, 5020},
|
|
/*h(2872)=1 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2872, 4928}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(826)=0 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {4928}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(434)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {434, 5020},
|
|
/*h(2)=1 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {2, 4985},
|
|
/*h(2874)=2 EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_MOVDDUP()*/ {2874, 4928}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(38)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 38;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3504)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {3504, 5018},
|
|
/*h(22)=1 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {22, 4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(86)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 86;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(54)=0 EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {4977}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 54;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(138)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 138;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(202)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 202;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(234)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 234;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(154)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 154;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(186)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 186;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(250)=0 EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {4983}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(66)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 66;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(34)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 34;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(18)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 18;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(82)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 82;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(114)=0 EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {4985}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 114;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1460)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {5017}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1460;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1456)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {5018}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1458)=0 EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {5018}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2484)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {5019}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2484;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2486)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {5019}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2486;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_45_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2996)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5021}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2998)=0 EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5021}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x12_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[72] = {
|
|
/*h(34)=0 */ {34, xed3_phash_find_mapevex_map1_opcode0x12_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(102)=2 */ {102, xed3_phash_find_mapevex_map1_opcode0x12_vv2_2_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3508)=4 */ {3508, xed3_phash_find_mapevex_map1_opcode0x12_vv2_4_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1458)=6 */ {1458, xed3_phash_find_mapevex_map1_opcode0x12_vv2_6_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(18)=8 */ {18, xed3_phash_find_mapevex_map1_opcode0x12_vv2_8_l1},
|
|
/*h(950)=9 */ {950, xed3_phash_find_mapevex_map1_opcode0x12_vv2_9_l1},
|
|
/*h(86)=10 */ {86, xed3_phash_find_mapevex_map1_opcode0x12_vv2_10_l1},
|
|
/*h(2992)=11 */ {2992, xed3_phash_find_mapevex_map1_opcode0x12_vv2_11_l1},
|
|
/*h(154)=12 */ {154, xed3_phash_find_mapevex_map1_opcode0x12_vv2_12_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2484)=14 */ {2484, xed3_phash_find_mapevex_map1_opcode0x12_vv2_14_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(434)=16 */ {434, xed3_phash_find_mapevex_map1_opcode0x12_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(70)=18 */ {70, xed3_phash_find_mapevex_map1_opcode0x12_vv2_18_l1},
|
|
/*h(2366)=19 */ {2366, xed3_phash_find_mapevex_map1_opcode0x12_vv2_19_l1},
|
|
/*h(138)=20 */ {138, xed3_phash_find_mapevex_map1_opcode0x12_vv2_20_l1},
|
|
/*h(3510)=21 */ {3510, xed3_phash_find_mapevex_map1_opcode0x12_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1460)=23 */ {1460, xed3_phash_find_mapevex_map1_opcode0x12_vv2_23_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(54)=26 */ {54, xed3_phash_find_mapevex_map1_opcode0x12_vv2_26_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2994)=28 */ {2994, xed3_phash_find_mapevex_map1_opcode0x12_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(944)=30 */ {944, xed3_phash_find_mapevex_map1_opcode0x12_vv2_30_l1},
|
|
/*h(2486)=31 */ {2486, xed3_phash_find_mapevex_map1_opcode0x12_vv2_31_l1},
|
|
/*h(114)=32 */ {114, xed3_phash_find_mapevex_map1_opcode0x12_vv2_32_l1},
|
|
/*h(436)=33 */ {436, xed3_phash_find_mapevex_map1_opcode0x12_vv2_33_l1},
|
|
/*h(38)=34 */ {38, xed3_phash_find_mapevex_map1_opcode0x12_vv2_34_l1},
|
|
/*h(826)=35 */ {826, xed3_phash_find_mapevex_map1_opcode0x12_vv2_35_l1},
|
|
/*h(250)=36 */ {250, xed3_phash_find_mapevex_map1_opcode0x12_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(318)=38 */ {318, xed3_phash_find_mapevex_map1_opcode0x12_vv2_38_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1462)=40 */ {1462, xed3_phash_find_mapevex_map1_opcode0x12_vv2_40_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3504)=42 */ {3504, xed3_phash_find_mapevex_map1_opcode0x12_vv2_42_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(234)=44 */ {234, xed3_phash_find_mapevex_map1_opcode0x12_vv2_44_l1},
|
|
/*h(2996)=45 */ {2996, xed3_phash_find_mapevex_map1_opcode0x12_vv2_45_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(946)=47 */ {946, xed3_phash_find_mapevex_map1_opcode0x12_vv2_47_l1},
|
|
/*h(82)=48 */ {82, xed3_phash_find_mapevex_map1_opcode0x12_vv2_48_l1},
|
|
/*h(1336)=49 */ {1336, xed3_phash_find_mapevex_map1_opcode0x12_vv2_49_l1},
|
|
/*h(438)=50 */ {438, xed3_phash_find_mapevex_map1_opcode0x12_vv2_50_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2480)=52 */ {2480, xed3_phash_find_mapevex_map1_opcode0x12_vv2_52_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(66)=56 */ {66, xed3_phash_find_mapevex_map1_opcode0x12_vv2_56_l1},
|
|
/*h(2362)=57 */ {2362, xed3_phash_find_mapevex_map1_opcode0x12_vv2_57_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3506)=59 */ {3506, xed3_phash_find_mapevex_map1_opcode0x12_vv2_59_l1},
|
|
/*h(202)=60 */ {202, xed3_phash_find_mapevex_map1_opcode0x12_vv2_60_l1},
|
|
/*h(1456)=61 */ {1456, xed3_phash_find_mapevex_map1_opcode0x12_vv2_61_l1},
|
|
/*h(2998)=62 */ {2998, xed3_phash_find_mapevex_map1_opcode0x12_vv2_62_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(948)=64 */ {948, xed3_phash_find_mapevex_map1_opcode0x12_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(118)=66 */ {118, xed3_phash_find_mapevex_map1_opcode0x12_vv2_66_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(186)=68 */ {186, xed3_phash_find_mapevex_map1_opcode0x12_vv2_68_l1},
|
|
/*h(2482)=69 */ {2482, xed3_phash_find_mapevex_map1_opcode0x12_vv2_69_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(432)=71 */ {432, xed3_phash_find_mapevex_map1_opcode0x12_vv2_71_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 72ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x13_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(186)=0 EVV 0x13 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 4984},
|
|
/*h(50)=1 EVV 0x13 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4986}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x14_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 5997},
|
|
/*h(14)=1 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5990},
|
|
/*h(66)=2 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 5994},
|
|
/*h(77)=3 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5989},
|
|
/*h(32)=4 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 5999},
|
|
/*h(46)=5 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5992},
|
|
/*h(1)=6 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 5997},
|
|
/*h(12)=7 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5991},
|
|
/*h(64)=8 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5995},
|
|
/*h(78)=9 EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5988},
|
|
/*h(33)=10 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 5999},
|
|
/*h(44)=11 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5993},
|
|
/*h(2)=12 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 5996},
|
|
/*h(13)=13 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5991},
|
|
/*h(65)=14 EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5995},
|
|
/*h(76)=15 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5989},
|
|
/*h(34)=16 EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 5998},
|
|
/*h(45)=17 EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5993}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x15_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 5985},
|
|
/*h(14)=1 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5978},
|
|
/*h(66)=2 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 5982},
|
|
/*h(77)=3 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5977},
|
|
/*h(32)=4 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 5987},
|
|
/*h(46)=5 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5980},
|
|
/*h(1)=6 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 5985},
|
|
/*h(12)=7 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5979},
|
|
/*h(64)=8 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5983},
|
|
/*h(78)=9 EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5976},
|
|
/*h(33)=10 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 5987},
|
|
/*h(44)=11 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5981},
|
|
/*h(2)=12 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 5984},
|
|
/*h(13)=13 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5979},
|
|
/*h(65)=14 EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5983},
|
|
/*h(76)=15 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5977},
|
|
/*h(34)=16 EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 5986},
|
|
/*h(45)=17 EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5981}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x16_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[96] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2992)=1 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2992, 5016},
|
|
/*h(3504)=2 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {3504, 5012},
|
|
/*h(250)=3 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {250, 4978},
|
|
/*h(154)=4 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {154, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2486)=7 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {2486, 5013},
|
|
/*h(2998)=8 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2998, 5015},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(34)=15 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {34, 4980},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1456)=17 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {1456, 5012},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2480)=19 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2480, 5014},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(66)=21 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {66, 4980},
|
|
/*h(438)=22 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 5013},
|
|
/*h(950)=23 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {950, 5015},
|
|
/*h(1462)=24 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1462, 5011},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(54)=26 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {54, 4982},
|
|
/*h(98)=27 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {98, 4980},
|
|
/*h(2)=28 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {2, 4980},
|
|
/*h(2994)=29 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2994, 5016},
|
|
/*h(3506)=30 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {3506, 5012},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(86)=32 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {86, 4982},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(432)=34 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {432, 5014},
|
|
/*h(944)=35 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {944, 5016},
|
|
/*h(170)=36 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {170, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=38 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {118, 4982},
|
|
/*h(22)=39 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {22, 4982},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(202)=42 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {202, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1458)=45 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {1458, 5012},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2482)=47 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {2482, 5014},
|
|
/*h(234)=48 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {234, 4978},
|
|
/*h(138)=49 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {138, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2996)=57 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2996, 5015},
|
|
/*h(3508)=58 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {3508, 5011},
|
|
/*h(114)=59 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {114, 4980},
|
|
/*h(18)=60 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {18, 4980},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(434)=62 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {434, 5014},
|
|
/*h(946)=63 EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {946, 5016},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(50)=66 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4980},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(38)=71 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {38, 4982},
|
|
/*h(82)=72 EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {82, 4980},
|
|
/*h(1460)=73 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1460, 5011},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2484)=75 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {2484, 5013},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(70)=77 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {70, 4982},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(102)=83 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {102, 4982},
|
|
/*h(6)=84 EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0*/ {6, 4982},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3510)=86 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {3510, 5011},
|
|
/*h(186)=87 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(436)=90 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 5013},
|
|
/*h(948)=91 EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {948, 5015},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(218)=93 EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {218, 4978},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((14*key % 269) % 96);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x17_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(186)=0 EVV 0x17 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 4979},
|
|
/*h(50)=1 EVV 0x17 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_TUPLE2()*/ {50, 4981}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x28_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(606)=0 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4891},
|
|
/*h(24)=1 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 4908},
|
|
/*h(280)=2 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 4912},
|
|
/*h(536)=3 EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 4904},
|
|
/*h(92)=4 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 4896},
|
|
/*h(348)=5 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 4900},
|
|
/*h(604)=6 EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 4892},
|
|
/*h(26)=7 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 4907},
|
|
/*h(282)=8 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 4911},
|
|
/*h(538)=9 EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 4903},
|
|
/*h(94)=10 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4895},
|
|
/*h(350)=11 EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4899}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 59) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x29_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[36] = {
|
|
/*h(94)=0 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4897},
|
|
/*h(26)=1 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 4909},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=8 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 4894},
|
|
/*h(536)=9 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {536, 4906},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1630)=11 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1630, 4893},
|
|
/*h(1562)=12 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1562, 4905},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=14 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4893},
|
|
/*h(538)=15 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 4905},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=19 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 4902},
|
|
/*h(280)=20 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {280, 4914},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1374)=22 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1374, 4901},
|
|
/*h(1306)=23 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1306, 4913},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=25 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4901},
|
|
/*h(282)=26 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 4913},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=30 EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 4898},
|
|
/*h(24)=31 EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {24, 4910},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1118)=33 EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1118, 4897},
|
|
/*h(1050)=34 EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1050, 4909},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 41) % 36);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[72] = {
|
|
/*h(178)=0 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {178, 4270},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(246)=2 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {246, 4277},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(170)=4 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {170, 4266},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(238)=6 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {238, 4271},
|
|
/*h(183)=7 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {183, 4269},
|
|
/*h(162)=8 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {162, 4266},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(230)=10 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {230, 4271},
|
|
/*h(175)=11 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {175, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(167)=15 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {167, 4264},
|
|
/*h(146)=16 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {146, 4267},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(214)=18 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {214, 4272},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(138)=20 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {138, 4266},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(206)=22 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {206, 4271},
|
|
/*h(151)=23 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {151, 4265},
|
|
/*h(130)=24 EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {130, 4266},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(198)=26 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {198, 4271},
|
|
/*h(143)=27 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {143, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(135)=31 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {135, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(182)=34 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {182, 4268},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(174)=38 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {174, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(242)=40 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {242, 4279},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(166)=42 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {166, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(234)=44 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {234, 4275},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(247)=47 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {247, 4278},
|
|
/*h(226)=48 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {226, 4275},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(150)=50 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {150, 4265},
|
|
/*h(239)=51 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {239, 4273},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(142)=54 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {142, 4264},
|
|
/*h(231)=55 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {231, 4273},
|
|
/*h(210)=56 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {210, 4276},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(134)=58 EVV 0x2A VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {134, 4264},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(202)=60 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {202, 4275},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(215)=63 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {215, 4274},
|
|
/*h(194)=64 EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {194, 4275},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(207)=67 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {207, 4273},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(199)=71 EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {199, 4273}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 72ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(562)=0 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {562, 4998},
|
|
/*h(698)=1 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {698, 4995},
|
|
/*h(1074)=2 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {1074, 4996},
|
|
/*h(50)=3 EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {50, 4997},
|
|
/*h(1210)=4 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {1210, 4993},
|
|
/*h(186)=5 EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {186, 4994}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[120] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2455)=1 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 4332},
|
|
/*h(3502)=2 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3502, 4347},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2510)=4 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2510, 4329},
|
|
/*h(2514)=5 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2514, 4337},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2447)=12 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2447, 4331},
|
|
/*h(3494)=13 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3494, 4347},
|
|
/*h(3498)=14 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3498, 4351},
|
|
/*h(2502)=15 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2502, 4329},
|
|
/*h(2506)=16 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2506, 4333},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2519)=20 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2519, 4336},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2439)=23 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2439, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3490)=25 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3490, 4351},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2498)=27 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2498, 4333},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3503)=29 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3503, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2511)=31 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2511, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3562)=33 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3562, 4351},
|
|
/*h(3566)=34 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3566, 4347},
|
|
/*h(3478)=35 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {3478, 4348},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3495)=40 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3495, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2503)=42 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2503, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3554)=44 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3554, 4351},
|
|
/*h(3558)=45 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3558, 4347},
|
|
/*h(3470)=46 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3470, 4347},
|
|
/*h(3474)=47 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3474, 4352},
|
|
/*h(2478)=48 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2478, 4329},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3462)=57 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3462, 4347},
|
|
/*h(3466)=58 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3466, 4351},
|
|
/*h(2470)=59 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2470, 4329},
|
|
/*h(2474)=60 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2474, 4333},
|
|
/*h(3567)=61 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3567, 4349},
|
|
/*h(3479)=62 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 4350},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3538)=66 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3538, 4355},
|
|
/*h(3542)=67 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {3542, 4353},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3458)=69 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3458, 4351},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2466)=71 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2466, 4333},
|
|
/*h(3559)=72 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3559, 4349},
|
|
/*h(3471)=73 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3471, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2479)=75 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2479, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3530)=77 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3530, 4351},
|
|
/*h(3534)=78 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3534, 4347},
|
|
/*h(2538)=79 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2538, 4333},
|
|
/*h(2542)=80 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2542, 4329},
|
|
/*h(2454)=81 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {2454, 4330},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3463)=84 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3463, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2471)=86 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2471, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3522)=88 EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3522, 4351},
|
|
/*h(3526)=89 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3526, 4347},
|
|
/*h(2530)=90 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2530, 4333},
|
|
/*h(2534)=91 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2534, 4329},
|
|
/*h(2446)=92 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2446, 4329},
|
|
/*h(2450)=93 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2450, 4334},
|
|
/*h(3543)=94 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 4354},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2438)=103 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2438, 4329},
|
|
/*h(2442)=104 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2442, 4333},
|
|
/*h(3535)=105 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3535, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2543)=107 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2543, 4331},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2518)=113 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {2518, 4335},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2434)=115 EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2434, 4333},
|
|
/*h(3527)=116 EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3527, 4349},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2535)=118 EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2535, 4331},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((27*key % 227) % 120);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[120] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2455)=1 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 4246},
|
|
/*h(3502)=2 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3502, 4283},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2510)=4 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2510, 4243},
|
|
/*h(2514)=5 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2514, 4251},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2447)=12 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2447, 4245},
|
|
/*h(3494)=13 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3494, 4283},
|
|
/*h(3498)=14 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3498, 4287},
|
|
/*h(2502)=15 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2502, 4243},
|
|
/*h(2506)=16 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2506, 4247},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2519)=20 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2519, 4250},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2439)=23 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2439, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3490)=25 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3490, 4287},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2498)=27 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2498, 4247},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3503)=29 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3503, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2511)=31 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2511, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3562)=33 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3562, 4287},
|
|
/*h(3566)=34 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3566, 4283},
|
|
/*h(3478)=35 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {3478, 4284},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3495)=40 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3495, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2503)=42 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2503, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3554)=44 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3554, 4287},
|
|
/*h(3558)=45 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3558, 4283},
|
|
/*h(3470)=46 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3470, 4283},
|
|
/*h(3474)=47 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3474, 4288},
|
|
/*h(2478)=48 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2478, 4243},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3462)=57 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3462, 4283},
|
|
/*h(3466)=58 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3466, 4287},
|
|
/*h(2470)=59 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2470, 4243},
|
|
/*h(2474)=60 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2474, 4247},
|
|
/*h(3567)=61 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3567, 4285},
|
|
/*h(3479)=62 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 4286},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3538)=66 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3538, 4291},
|
|
/*h(3542)=67 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {3542, 4289},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3458)=69 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3458, 4287},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2466)=71 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2466, 4247},
|
|
/*h(3559)=72 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3559, 4285},
|
|
/*h(3471)=73 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3471, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2479)=75 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2479, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3530)=77 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3530, 4287},
|
|
/*h(3534)=78 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3534, 4283},
|
|
/*h(2538)=79 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2538, 4247},
|
|
/*h(2542)=80 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2542, 4243},
|
|
/*h(2454)=81 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {2454, 4244},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3463)=84 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3463, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2471)=86 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2471, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3522)=88 EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3522, 4287},
|
|
/*h(3526)=89 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3526, 4283},
|
|
/*h(2530)=90 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2530, 4247},
|
|
/*h(2534)=91 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2534, 4243},
|
|
/*h(2446)=92 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2446, 4243},
|
|
/*h(2450)=93 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2450, 4248},
|
|
/*h(3543)=94 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3543, 4290},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2438)=103 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2438, 4243},
|
|
/*h(2442)=104 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2442, 4247},
|
|
/*h(3535)=105 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3535, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2543)=107 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2543, 4245},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2518)=113 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {2518, 4249},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2434)=115 EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2434, 4247},
|
|
/*h(3527)=116 EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3527, 4285},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2535)=118 EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2535, 4245},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((27*key % 227) % 120);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(191)=0 EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 NOEVSR ZEROING=0 MASK=0*/ {191, 5971},
|
|
/*h(190)=1 EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {190, 5970},
|
|
/*h(50)=2 EVV 0x2E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_SCALAR() FIX_ROUND_LEN128()*/ {50, 5975},
|
|
/*h(55)=3 EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 NOEVSR ZEROING=0 MASK=0*/ {55, 5974},
|
|
/*h(54)=4 EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {54, 5973},
|
|
/*h(186)=5 EVV 0x2E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR() FIX_ROUND_LEN128()*/ {186, 5972}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((28*key % 29) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x2f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(191)=0 EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 NOEVSR ZEROING=0 MASK=0*/ {191, 4156},
|
|
/*h(190)=1 EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {190, 4155},
|
|
/*h(50)=2 EVV 0x2F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_SCALAR() FIX_ROUND_LEN128()*/ {50, 4160},
|
|
/*h(55)=3 EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 NOEVSR ZEROING=0 MASK=0*/ {55, 4159},
|
|
/*h(54)=4 EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {54, 4158},
|
|
/*h(186)=5 EVV 0x2F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR() FIX_ROUND_LEN128()*/ {186, 4157}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(d);
|
|
hidx = ((28*key % 29) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(606)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {5930}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(472)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 5949},
|
|
/*h(95)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {95, 5931}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(728)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {728, 5949},
|
|
/*h(351)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {351, 5931}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(984)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 5949},
|
|
/*h(607)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {607, 5931}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(863)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5931}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(604)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5932}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(605)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5932}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 605;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(704)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {704, 5949},
|
|
/*h(94)=1 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 5933}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(935)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {935, 5945},
|
|
/*h(92)=1 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 5934},
|
|
/*h(702)=2 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {702, 5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(93)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 5934},
|
|
/*h(703)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {703, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(350)=0 EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5935}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(348)=0 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 5936},
|
|
/*h(958)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {958, 5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(959)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {959, 5945},
|
|
/*h(349)=1 EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 5936}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(538)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {5937}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(404)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {404, 5946},
|
|
/*h(27)=1 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {27, 5938}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(660)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {660, 5946},
|
|
/*h(283)=1 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {283, 5938}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(539)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5938}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(795)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5938}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(536)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {536, 5939},
|
|
/*h(1002)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1002, 5947},
|
|
/*h(159)=2 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {159, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(537)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {5939}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 537;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {5940}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 26;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24, 5941},
|
|
/*h(1011)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {1011, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {5941}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 25;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(282)=0 EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5942}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(280)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {5943}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 280;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(281)=0 EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {5943}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 281;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(744)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {744, 5949},
|
|
/*h(134)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {134, 5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(390)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {390, 5944},
|
|
/*h(1000)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {1000, 5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(646)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(902)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(166)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {166, 5944},
|
|
/*h(399)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {399, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(422)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 422;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(678)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(180)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {180, 5946},
|
|
/*h(934)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {934, 5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(150)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {150, 5944},
|
|
/*h(760)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {760, 5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(406)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {406, 5944},
|
|
/*h(927)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {927, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(662)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(918)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {918, 5944},
|
|
/*h(164)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {164, 5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(182)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {182, 5944},
|
|
/*h(415)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {415, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(438)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {438, 5944},
|
|
/*h(671)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {671, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(694)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(142)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1008)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {1008, 5949},
|
|
/*h(398)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {398, 5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(654)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(910)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(174)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {174, 5944},
|
|
/*h(407)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {407, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {430, 5944},
|
|
/*h(663)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {663, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(686)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(942)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(158)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {158, 5944},
|
|
/*h(391)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {391, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(414)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(670)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {670, 5944},
|
|
/*h(903)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {903, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(926)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {926, 5944},
|
|
/*h(172)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {172, 5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(190)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {5944}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(446)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {446, 5944},
|
|
/*h(679)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {679, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(135)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(647)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1010)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1010, 5947},
|
|
/*h(167)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {167, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(151)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 151;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(919)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 919;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(183)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 183;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(439)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(695)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(951)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(143)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 143;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(655)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(911)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(175)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 175;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(431)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 431;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(687)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(943)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(191)=0 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 191;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(968)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {968, 5949},
|
|
/*h(447)=1 EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {447, 5945}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(132)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 132;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(388)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 388;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(644)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(900)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 900;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(420)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 420;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(676)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 676;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(932)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(148)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 148;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {450, 5947},
|
|
/*h(916)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {916, 5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(436)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {436, 5946},
|
|
/*h(203)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {203, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(692)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 692;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(948)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {948, 5946},
|
|
/*h(194)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {194, 5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(140)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 140;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(396)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 396;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(652)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(908)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(428)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 428;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(684)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 684;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(940)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {940, 5946},
|
|
/*h(707)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {707, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(156)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 156;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(412)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 412;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(668)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 668;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(924)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(188)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {5946}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 188;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(444)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {444, 5946},
|
|
/*h(211)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {211, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(234)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {234, 5947},
|
|
/*h(700)=1 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {700, 5946},
|
|
/*h(467)=2 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {467, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(956)=0 EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {956, 5946},
|
|
/*h(202)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {202, 5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(706)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(962)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(226)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {226, 5947},
|
|
/*h(459)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {459, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(482)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {482, 5947},
|
|
/*h(715)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {715, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(738)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(240)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {240, 5949},
|
|
/*h(994)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {994, 5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(210)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(466)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(722)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(978)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {978, 5947},
|
|
/*h(224)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {224, 5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_123_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(242)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {242, 5947},
|
|
/*h(475)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {475, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(498)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {498, 5947},
|
|
/*h(731)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {731, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(754)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {754, 5947},
|
|
/*h(987)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {987, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(458)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {458, 5947},
|
|
/*h(979)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {979, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(216)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 5949},
|
|
/*h(970)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {970, 5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(490)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {490, 5947},
|
|
/*h(723)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {723, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(746)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(218)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {218, 5947},
|
|
/*h(451)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {451, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(474)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(730)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(986)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {986, 5947},
|
|
/*h(232)=1 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {232, 5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(250)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(506)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {506, 5947},
|
|
/*h(739)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {739, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {762, 5947},
|
|
/*h(995)=1 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {995, 5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1018)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {5947}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(195)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 195;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(963)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(227)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(483)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 483;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(243)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(499)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(755)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(971)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 971;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(235)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(491)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 491;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(747)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 747;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1003)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(219)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(251)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 251;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(507)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(763)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 763;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1019)=0 EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {5948}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(192)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 192;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(448)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(960)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(736)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 736;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(992)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(208)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(464)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 464;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(976)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(496)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 496;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(752)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(200)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(456)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(488)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(248)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(504)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 504;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1016)=0 EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {5949}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x51_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[218] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map1_opcode0x51_vv2_0_l1},
|
|
/*h(932)=1 */ {932, xed3_phash_find_mapevex_map1_opcode0x51_vv2_1_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(644)=3 */ {644, xed3_phash_find_mapevex_map1_opcode0x51_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(678)=5 */ {678, xed3_phash_find_mapevex_map1_opcode0x51_vv2_5_l1},
|
|
/*h(911)=6 */ {911, xed3_phash_find_mapevex_map1_opcode0x51_vv2_6_l1},
|
|
/*h(1000)=7 */ {1000, xed3_phash_find_mapevex_map1_opcode0x51_vv2_7_l1},
|
|
/*h(712)=8 */ {712, xed3_phash_find_mapevex_map1_opcode0x51_vv2_8_l1},
|
|
/*h(191)=9 */ {191, xed3_phash_find_mapevex_map1_opcode0x51_vv2_9_l1},
|
|
/*h(280)=10 */ {280, xed3_phash_find_mapevex_map1_opcode0x51_vv2_10_l1},
|
|
/*h(746)=11 */ {746, xed3_phash_find_mapevex_map1_opcode0x51_vv2_11_l1},
|
|
/*h(979)=12 */ {979, xed3_phash_find_mapevex_map1_opcode0x51_vv2_12_l1},
|
|
/*h(924)=13 */ {924, xed3_phash_find_mapevex_map1_opcode0x51_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26)=15 */ {26, xed3_phash_find_mapevex_map1_opcode0x51_vv2_15_l1},
|
|
/*h(958)=16 */ {958, xed3_phash_find_mapevex_map1_opcode0x51_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(903)=18 */ {903, xed3_phash_find_mapevex_map1_opcode0x51_vv2_18_l1},
|
|
/*h(992)=19 */ {992, xed3_phash_find_mapevex_map1_opcode0x51_vv2_19_l1},
|
|
/*h(704)=20 */ {704, xed3_phash_find_mapevex_map1_opcode0x51_vv2_20_l1},
|
|
/*h(183)=21 */ {183, xed3_phash_find_mapevex_map1_opcode0x51_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(738)=23 */ {738, xed3_phash_find_mapevex_map1_opcode0x51_vv2_23_l1},
|
|
/*h(971)=24 */ {971, xed3_phash_find_mapevex_map1_opcode0x51_vv2_24_l1},
|
|
/*h(450)=25 */ {450, xed3_phash_find_mapevex_map1_opcode0x51_vv2_25_l1},
|
|
/*h(539)=26 */ {539, xed3_phash_find_mapevex_map1_opcode0x51_vv2_26_l1},
|
|
/*h(251)=27 */ {251, xed3_phash_find_mapevex_map1_opcode0x51_vv2_27_l1},
|
|
/*h(950)=28 */ {950, xed3_phash_find_mapevex_map1_opcode0x51_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(662)=30 */ {662, xed3_phash_find_mapevex_map1_opcode0x51_vv2_30_l1},
|
|
/*h(984)=31 */ {984, xed3_phash_find_mapevex_map1_opcode0x51_vv2_31_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(175)=33 */ {175, xed3_phash_find_mapevex_map1_opcode0x51_vv2_33_l1},
|
|
/*h(1018)=34 */ {1018, xed3_phash_find_mapevex_map1_opcode0x51_vv2_34_l1},
|
|
/*h(730)=35 */ {730, xed3_phash_find_mapevex_map1_opcode0x51_vv2_35_l1},
|
|
/*h(963)=36 */ {963, xed3_phash_find_mapevex_map1_opcode0x51_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(908)=38 */ {908, xed3_phash_find_mapevex_map1_opcode0x51_vv2_38_l1},
|
|
/*h(243)=39 */ {243, xed3_phash_find_mapevex_map1_opcode0x51_vv2_39_l1},
|
|
/*h(942)=40 */ {942, xed3_phash_find_mapevex_map1_opcode0x51_vv2_40_l1},
|
|
/*h(188)=41 */ {188, xed3_phash_find_mapevex_map1_opcode0x51_vv2_41_l1},
|
|
/*h(654)=42 */ {654, xed3_phash_find_mapevex_map1_opcode0x51_vv2_42_l1},
|
|
/*h(976)=43 */ {976, xed3_phash_find_mapevex_map1_opcode0x51_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=46 */ {1010, xed3_phash_find_mapevex_map1_opcode0x51_vv2_46_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(722)=48 */ {722, xed3_phash_find_mapevex_map1_opcode0x51_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(900)=50 */ {900, xed3_phash_find_mapevex_map1_opcode0x51_vv2_50_l1},
|
|
/*h(235)=51 */ {235, xed3_phash_find_mapevex_map1_opcode0x51_vv2_51_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(180)=53 */ {180, xed3_phash_find_mapevex_map1_opcode0x51_vv2_53_l1},
|
|
/*h(646)=54 */ {646, xed3_phash_find_mapevex_map1_opcode0x51_vv2_54_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(968)=56 */ {968, xed3_phash_find_mapevex_map1_opcode0x51_vv2_56_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1002)=58 */ {1002, xed3_phash_find_mapevex_map1_opcode0x51_vv2_58_l1},
|
|
/*h(248)=59 */ {248, xed3_phash_find_mapevex_map1_opcode0x51_vv2_59_l1},
|
|
/*h(714)=60 */ {714, xed3_phash_find_mapevex_map1_opcode0x51_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(282)=62 */ {282, xed3_phash_find_mapevex_map1_opcode0x51_vv2_62_l1},
|
|
/*h(604)=63 */ {604, xed3_phash_find_mapevex_map1_opcode0x51_vv2_63_l1},
|
|
/*h(227)=64 */ {227, xed3_phash_find_mapevex_map1_opcode0x51_vv2_64_l1},
|
|
/*h(172)=65 */ {172, xed3_phash_find_mapevex_map1_opcode0x51_vv2_65_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(350)=67 */ {350, xed3_phash_find_mapevex_map1_opcode0x51_vv2_67_l1},
|
|
/*h(960)=68 */ {960, xed3_phash_find_mapevex_map1_opcode0x51_vv2_68_l1},
|
|
/*h(439)=69 */ {439, xed3_phash_find_mapevex_map1_opcode0x51_vv2_69_l1},
|
|
/*h(151)=70 */ {151, xed3_phash_find_mapevex_map1_opcode0x51_vv2_70_l1},
|
|
/*h(240)=71 */ {240, xed3_phash_find_mapevex_map1_opcode0x51_vv2_71_l1},
|
|
/*h(706)=72 */ {706, xed3_phash_find_mapevex_map1_opcode0x51_vv2_72_l1},
|
|
/*h(795)=73 */ {795, xed3_phash_find_mapevex_map1_opcode0x51_vv2_73_l1},
|
|
/*h(507)=74 */ {507, xed3_phash_find_mapevex_map1_opcode0x51_vv2_74_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(219)=76 */ {219, xed3_phash_find_mapevex_map1_opcode0x51_vv2_76_l1},
|
|
/*h(164)=77 */ {164, xed3_phash_find_mapevex_map1_opcode0x51_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(863)=79 */ {863, xed3_phash_find_mapevex_map1_opcode0x51_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(431)=81 */ {431, xed3_phash_find_mapevex_map1_opcode0x51_vv2_81_l1},
|
|
/*h(143)=82 */ {143, xed3_phash_find_mapevex_map1_opcode0x51_vv2_82_l1},
|
|
/*h(232)=83 */ {232, xed3_phash_find_mapevex_map1_opcode0x51_vv2_83_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(499)=86 */ {499, xed3_phash_find_mapevex_map1_opcode0x51_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(211)=88 */ {211, xed3_phash_find_mapevex_map1_opcode0x51_vv2_88_l1},
|
|
/*h(910)=89 */ {910, xed3_phash_find_mapevex_map1_opcode0x51_vv2_89_l1},
|
|
/*h(156)=90 */ {156, xed3_phash_find_mapevex_map1_opcode0x51_vv2_90_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(190)=92 */ {190, xed3_phash_find_mapevex_map1_opcode0x51_vv2_92_l1},
|
|
/*h(423)=93 */ {423, xed3_phash_find_mapevex_map1_opcode0x51_vv2_93_l1},
|
|
/*h(135)=94 */ {135, xed3_phash_find_mapevex_map1_opcode0x51_vv2_94_l1},
|
|
/*h(224)=95 */ {224, xed3_phash_find_mapevex_map1_opcode0x51_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25)=98 */ {25, xed3_phash_find_mapevex_map1_opcode0x51_vv2_98_l1},
|
|
/*h(491)=99 */ {491, xed3_phash_find_mapevex_map1_opcode0x51_vv2_99_l1},
|
|
/*h(203)=100 */ {203, xed3_phash_find_mapevex_map1_opcode0x51_vv2_100_l1},
|
|
/*h(902)=101 */ {902, xed3_phash_find_mapevex_map1_opcode0x51_vv2_101_l1},
|
|
/*h(148)=102 */ {148, xed3_phash_find_mapevex_map1_opcode0x51_vv2_102_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(703)=104 */ {703, xed3_phash_find_mapevex_map1_opcode0x51_vv2_104_l1},
|
|
/*h(415)=105 */ {415, xed3_phash_find_mapevex_map1_opcode0x51_vv2_105_l1},
|
|
/*h(504)=106 */ {504, xed3_phash_find_mapevex_map1_opcode0x51_vv2_106_l1},
|
|
/*h(216)=107 */ {216, xed3_phash_find_mapevex_map1_opcode0x51_vv2_107_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(538)=109 */ {538, xed3_phash_find_mapevex_map1_opcode0x51_vv2_109_l1},
|
|
/*h(250)=110 */ {250, xed3_phash_find_mapevex_map1_opcode0x51_vv2_110_l1},
|
|
/*h(483)=111 */ {483, xed3_phash_find_mapevex_map1_opcode0x51_vv2_111_l1},
|
|
/*h(195)=112 */ {195, xed3_phash_find_mapevex_map1_opcode0x51_vv2_112_l1},
|
|
/*h(428)=113 */ {428, xed3_phash_find_mapevex_map1_opcode0x51_vv2_113_l1},
|
|
/*h(140)=114 */ {140, xed3_phash_find_mapevex_map1_opcode0x51_vv2_114_l1},
|
|
/*h(606)=115 */ {606, xed3_phash_find_mapevex_map1_opcode0x51_vv2_115_l1},
|
|
/*h(695)=116 */ {695, xed3_phash_find_mapevex_map1_opcode0x51_vv2_116_l1},
|
|
/*h(407)=117 */ {407, xed3_phash_find_mapevex_map1_opcode0x51_vv2_117_l1},
|
|
/*h(496)=118 */ {496, xed3_phash_find_mapevex_map1_opcode0x51_vv2_118_l1},
|
|
/*h(962)=119 */ {962, xed3_phash_find_mapevex_map1_opcode0x51_vv2_119_l1},
|
|
/*h(208)=120 */ {208, xed3_phash_find_mapevex_map1_opcode0x51_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(763)=122 */ {763, xed3_phash_find_mapevex_map1_opcode0x51_vv2_122_l1},
|
|
/*h(475)=123 */ {475, xed3_phash_find_mapevex_map1_opcode0x51_vv2_123_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(420)=125 */ {420, xed3_phash_find_mapevex_map1_opcode0x51_vv2_125_l1},
|
|
/*h(132)=126 */ {132, xed3_phash_find_mapevex_map1_opcode0x51_vv2_126_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(687)=128 */ {687, xed3_phash_find_mapevex_map1_opcode0x51_vv2_128_l1},
|
|
/*h(399)=129 */ {399, xed3_phash_find_mapevex_map1_opcode0x51_vv2_129_l1},
|
|
/*h(488)=130 */ {488, xed3_phash_find_mapevex_map1_opcode0x51_vv2_130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(200)=132 */ {200, xed3_phash_find_mapevex_map1_opcode0x51_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(755)=134 */ {755, xed3_phash_find_mapevex_map1_opcode0x51_vv2_134_l1},
|
|
/*h(467)=135 */ {467, xed3_phash_find_mapevex_map1_opcode0x51_vv2_135_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(412)=137 */ {412, xed3_phash_find_mapevex_map1_opcode0x51_vv2_137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(679)=140 */ {679, xed3_phash_find_mapevex_map1_opcode0x51_vv2_140_l1},
|
|
/*h(391)=141 */ {391, xed3_phash_find_mapevex_map1_opcode0x51_vv2_141_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(480)=143 */ {480, xed3_phash_find_mapevex_map1_opcode0x51_vv2_143_l1},
|
|
/*h(192)=144 */ {192, xed3_phash_find_mapevex_map1_opcode0x51_vv2_144_l1},
|
|
/*h(281)=145 */ {281, xed3_phash_find_mapevex_map1_opcode0x51_vv2_145_l1},
|
|
/*h(747)=146 */ {747, xed3_phash_find_mapevex_map1_opcode0x51_vv2_146_l1},
|
|
/*h(459)=147 */ {459, xed3_phash_find_mapevex_map1_opcode0x51_vv2_147_l1},
|
|
/*h(692)=148 */ {692, xed3_phash_find_mapevex_map1_opcode0x51_vv2_148_l1},
|
|
/*h(404)=149 */ {404, xed3_phash_find_mapevex_map1_opcode0x51_vv2_149_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(959)=151 */ {959, xed3_phash_find_mapevex_map1_opcode0x51_vv2_151_l1},
|
|
/*h(671)=152 */ {671, xed3_phash_find_mapevex_map1_opcode0x51_vv2_152_l1},
|
|
/*h(760)=153 */ {760, xed3_phash_find_mapevex_map1_opcode0x51_vv2_153_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(472)=155 */ {472, xed3_phash_find_mapevex_map1_opcode0x51_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(739)=158 */ {739, xed3_phash_find_mapevex_map1_opcode0x51_vv2_158_l1},
|
|
/*h(451)=159 */ {451, xed3_phash_find_mapevex_map1_opcode0x51_vv2_159_l1},
|
|
/*h(684)=160 */ {684, xed3_phash_find_mapevex_map1_opcode0x51_vv2_160_l1},
|
|
/*h(396)=161 */ {396, xed3_phash_find_mapevex_map1_opcode0x51_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(951)=163 */ {951, xed3_phash_find_mapevex_map1_opcode0x51_vv2_163_l1},
|
|
/*h(663)=164 */ {663, xed3_phash_find_mapevex_map1_opcode0x51_vv2_164_l1},
|
|
/*h(142)=165 */ {142, xed3_phash_find_mapevex_map1_opcode0x51_vv2_165_l1},
|
|
/*h(752)=166 */ {752, xed3_phash_find_mapevex_map1_opcode0x51_vv2_166_l1},
|
|
/*h(464)=167 */ {464, xed3_phash_find_mapevex_map1_opcode0x51_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1019)=169 */ {1019, xed3_phash_find_mapevex_map1_opcode0x51_vv2_169_l1},
|
|
/*h(731)=170 */ {731, xed3_phash_find_mapevex_map1_opcode0x51_vv2_170_l1},
|
|
/*h(210)=171 */ {210, xed3_phash_find_mapevex_map1_opcode0x51_vv2_171_l1},
|
|
/*h(676)=172 */ {676, xed3_phash_find_mapevex_map1_opcode0x51_vv2_172_l1},
|
|
/*h(388)=173 */ {388, xed3_phash_find_mapevex_map1_opcode0x51_vv2_173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(943)=175 */ {943, xed3_phash_find_mapevex_map1_opcode0x51_vv2_175_l1},
|
|
/*h(422)=176 */ {422, xed3_phash_find_mapevex_map1_opcode0x51_vv2_176_l1},
|
|
/*h(655)=177 */ {655, xed3_phash_find_mapevex_map1_opcode0x51_vv2_177_l1},
|
|
/*h(744)=178 */ {744, xed3_phash_find_mapevex_map1_opcode0x51_vv2_178_l1},
|
|
/*h(456)=179 */ {456, xed3_phash_find_mapevex_map1_opcode0x51_vv2_179_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1011)=181 */ {1011, xed3_phash_find_mapevex_map1_opcode0x51_vv2_181_l1},
|
|
/*h(723)=182 */ {723, xed3_phash_find_mapevex_map1_opcode0x51_vv2_182_l1},
|
|
/*h(202)=183 */ {202, xed3_phash_find_mapevex_map1_opcode0x51_vv2_183_l1},
|
|
/*h(668)=184 */ {668, xed3_phash_find_mapevex_map1_opcode0x51_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(935)=187 */ {935, xed3_phash_find_mapevex_map1_opcode0x51_vv2_187_l1},
|
|
/*h(414)=188 */ {414, xed3_phash_find_mapevex_map1_opcode0x51_vv2_188_l1},
|
|
/*h(647)=189 */ {647, xed3_phash_find_mapevex_map1_opcode0x51_vv2_189_l1},
|
|
/*h(736)=190 */ {736, xed3_phash_find_mapevex_map1_opcode0x51_vv2_190_l1},
|
|
/*h(448)=191 */ {448, xed3_phash_find_mapevex_map1_opcode0x51_vv2_191_l1},
|
|
/*h(537)=192 */ {537, xed3_phash_find_mapevex_map1_opcode0x51_vv2_192_l1},
|
|
/*h(1003)=193 */ {1003, xed3_phash_find_mapevex_map1_opcode0x51_vv2_193_l1},
|
|
/*h(715)=194 */ {715, xed3_phash_find_mapevex_map1_opcode0x51_vv2_194_l1},
|
|
/*h(194)=195 */ {194, xed3_phash_find_mapevex_map1_opcode0x51_vv2_195_l1},
|
|
/*h(660)=196 */ {660, xed3_phash_find_mapevex_map1_opcode0x51_vv2_196_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(605)=198 */ {605, xed3_phash_find_mapevex_map1_opcode0x51_vv2_198_l1},
|
|
/*h(694)=199 */ {694, xed3_phash_find_mapevex_map1_opcode0x51_vv2_199_l1},
|
|
/*h(927)=200 */ {927, xed3_phash_find_mapevex_map1_opcode0x51_vv2_200_l1},
|
|
/*h(1016)=201 */ {1016, xed3_phash_find_mapevex_map1_opcode0x51_vv2_201_l1},
|
|
/*h(728)=202 */ {728, xed3_phash_find_mapevex_map1_opcode0x51_vv2_202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(995)=205 */ {995, xed3_phash_find_mapevex_map1_opcode0x51_vv2_205_l1},
|
|
/*h(474)=206 */ {474, xed3_phash_find_mapevex_map1_opcode0x51_vv2_206_l1},
|
|
/*h(707)=207 */ {707, xed3_phash_find_mapevex_map1_opcode0x51_vv2_207_l1},
|
|
/*h(652)=208 */ {652, xed3_phash_find_mapevex_map1_opcode0x51_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(686)=211 */ {686, xed3_phash_find_mapevex_map1_opcode0x51_vv2_211_l1},
|
|
/*h(919)=212 */ {919, xed3_phash_find_mapevex_map1_opcode0x51_vv2_212_l1},
|
|
/*h(1008)=213 */ {1008, xed3_phash_find_mapevex_map1_opcode0x51_vv2_213_l1},
|
|
/*h(720)=214 */ {720, xed3_phash_find_mapevex_map1_opcode0x51_vv2_214_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(987)=217 */ {987, xed3_phash_find_mapevex_map1_opcode0x51_vv2_217_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 218ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x54_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 6049},
|
|
/*h(14)=1 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6042},
|
|
/*h(66)=2 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 6052},
|
|
/*h(77)=3 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6047},
|
|
/*h(32)=4 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 6051},
|
|
/*h(46)=5 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6044},
|
|
/*h(1)=6 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 6049},
|
|
/*h(12)=7 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6043},
|
|
/*h(64)=8 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 6053},
|
|
/*h(78)=9 EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6046},
|
|
/*h(33)=10 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 6051},
|
|
/*h(44)=11 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6045},
|
|
/*h(2)=12 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 6048},
|
|
/*h(13)=13 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6043},
|
|
/*h(65)=14 EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 6053},
|
|
/*h(76)=15 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6047},
|
|
/*h(34)=16 EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 6050},
|
|
/*h(45)=17 EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6045}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x55_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 6037},
|
|
/*h(14)=1 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6030},
|
|
/*h(66)=2 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 6040},
|
|
/*h(77)=3 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6035},
|
|
/*h(32)=4 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 6039},
|
|
/*h(46)=5 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6032},
|
|
/*h(1)=6 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 6037},
|
|
/*h(12)=7 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6031},
|
|
/*h(64)=8 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 6041},
|
|
/*h(78)=9 EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6034},
|
|
/*h(33)=10 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 6039},
|
|
/*h(44)=11 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6033},
|
|
/*h(2)=12 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 6036},
|
|
/*h(13)=13 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6031},
|
|
/*h(65)=14 EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 6041},
|
|
/*h(76)=15 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6035},
|
|
/*h(34)=16 EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 6038},
|
|
/*h(45)=17 EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6033}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x56_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 6231},
|
|
/*h(14)=1 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6224},
|
|
/*h(66)=2 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 6234},
|
|
/*h(77)=3 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6229},
|
|
/*h(32)=4 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 6233},
|
|
/*h(46)=5 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6226},
|
|
/*h(1)=6 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 6231},
|
|
/*h(12)=7 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6225},
|
|
/*h(64)=8 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 6235},
|
|
/*h(78)=9 EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6228},
|
|
/*h(33)=10 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 6233},
|
|
/*h(44)=11 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6227},
|
|
/*h(2)=12 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 6230},
|
|
/*h(13)=13 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6225},
|
|
/*h(65)=14 EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 6235},
|
|
/*h(76)=15 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6229},
|
|
/*h(34)=16 EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 6232},
|
|
/*h(45)=17 EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6227}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x57_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 6809},
|
|
/*h(14)=1 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 6802},
|
|
/*h(66)=2 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 6812},
|
|
/*h(77)=3 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 6807},
|
|
/*h(32)=4 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 6811},
|
|
/*h(46)=5 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 6804},
|
|
/*h(1)=6 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 6809},
|
|
/*h(12)=7 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 6803},
|
|
/*h(64)=8 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 6813},
|
|
/*h(78)=9 EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 6806},
|
|
/*h(33)=10 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 6811},
|
|
/*h(44)=11 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 6805},
|
|
/*h(2)=12 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 6808},
|
|
/*h(13)=13 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 6803},
|
|
/*h(65)=14 EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 6813},
|
|
/*h(76)=15 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 6807},
|
|
/*h(34)=16 EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 6810},
|
|
/*h(45)=17 EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 6805}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x58_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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static const lu_entry_t lu_table[100] = {
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/*h(0)=0 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 4086},
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/*h(46)=1 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4080},
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/*h(54)=2 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 4089},
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/*h(24)=3 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4094},
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/*h(32)=4 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 4088},
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/*h(78)=5 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4075},
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/*h(86)=6 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 4089},
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/*h(56)=7 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4094},
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/*h(64)=8 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 4084},
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/*empty slot1 */ {0,0},
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/*h(118)=10 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 4089},
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/*h(88)=11 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4094},
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/*empty slot1 */ {0,0},
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/*h(15)=13 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4076},
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/*h(23)=14 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {23, 4090},
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/*h(120)=15 EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4094},
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/*h(1)=16 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 4086},
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/*h(47)=17 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4076},
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/*h(55)=18 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {55, 4090},
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/*empty slot1 */ {0,0},
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/*h(33)=20 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 4088},
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/*h(79)=21 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4076},
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/*h(87)=22 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {87, 4090},
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/*empty slot1 */ {0,0},
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/*h(65)=24 EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 4084},
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/*h(111)=25 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4076},
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/*h(119)=26 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {119, 4090},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(2)=32 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 4085},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(26)=35 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 4092},
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/*h(34)=36 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 4087},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(58)=39 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 4092},
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/*h(66)=40 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 4082},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(90)=43 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 4092},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(122)=47 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 4092},
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/*h(3)=48 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 4083},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(27)=51 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 4093},
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/*h(35)=52 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 4083},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(59)=55 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 4093},
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/*h(67)=56 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 4083},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(91)=59 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 4093},
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/*h(99)=60 EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 4083},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(123)=63 EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 4093},
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/*empty slot1 */ {0,0},
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/*h(12)=65 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4079},
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/*h(20)=66 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4091},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(44)=69 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4081},
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/*h(52)=70 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4091},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(76)=73 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4077},
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/*h(84)=74 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4091},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(116)=78 EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4091},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(13)=81 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4079},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(45)=85 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4081},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(77)=89 EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4077},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(14)=97 EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4078},
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/*h(22)=98 EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 4089},
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/*empty slot1 */ {0,0}
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};
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
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hidx = ((16*key % 127) % 100);
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if(lu_table[hidx].key == key) {
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return lu_table[hidx].value;
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}
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else{
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return 0;
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}
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}
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x59_vv2(const xed_decoded_inst_t* d)
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{
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typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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static const lu_entry_t lu_table[100] = {
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/*h(0)=0 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 5062},
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/*h(46)=1 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5056},
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/*h(54)=2 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 5065},
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/*h(24)=3 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 5070},
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/*h(32)=4 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 5064},
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/*h(78)=5 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5051},
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/*h(86)=6 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 5065},
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/*h(56)=7 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 5070},
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/*h(64)=8 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5060},
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/*empty slot1 */ {0,0},
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/*h(118)=10 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 5065},
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/*h(88)=11 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 5070},
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/*empty slot1 */ {0,0},
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/*h(15)=13 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 5052},
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/*h(23)=14 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {23, 5066},
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/*h(120)=15 EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 5070},
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/*h(1)=16 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 5062},
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/*h(47)=17 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 5052},
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/*h(55)=18 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {55, 5066},
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/*empty slot1 */ {0,0},
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/*h(33)=20 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 5064},
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/*h(79)=21 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 5052},
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/*h(87)=22 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {87, 5066},
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/*empty slot1 */ {0,0},
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/*h(65)=24 EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5060},
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/*h(111)=25 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 5052},
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/*h(119)=26 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {119, 5066},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(2)=32 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 5061},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(26)=35 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 5068},
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/*h(34)=36 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 5063},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(58)=39 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 5068},
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/*h(66)=40 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 5058},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(90)=43 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 5068},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
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|
/*h(122)=47 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 5068},
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/*h(3)=48 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 5059},
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|
/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
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|
/*h(27)=51 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 5069},
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/*h(35)=52 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 5059},
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|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 5069},
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|
/*h(67)=56 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 5059},
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|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 5069},
|
|
/*h(99)=60 EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 5059},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 5069},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5055},
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|
/*h(20)=66 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 5067},
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|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5057},
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/*h(52)=70 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 5067},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5053},
|
|
/*h(84)=74 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 5067},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 5067},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5055},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5057},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5053},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5054},
|
|
/*h(22)=98 EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 5065},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(606)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4194}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_155_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(472)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {472, 4282},
|
|
/*h(95)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {95, 4195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(728)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {728, 4282},
|
|
/*h(351)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {351, 4195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(984)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {984, 4282},
|
|
/*h(607)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {607, 4195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_79_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(863)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4195}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(604)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(605)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4196}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 605;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(704)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {704, 4282},
|
|
/*h(94)=1 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4197}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(935)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {935, 4253},
|
|
/*h(92)=1 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 4198},
|
|
/*h(702)=2 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {702, 4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(93)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 4198},
|
|
/*h(703)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {703, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(350)=0 EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4199}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(348)=0 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 4200},
|
|
/*h(958)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {958, 4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(959)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {959, 4253},
|
|
/*h(349)=1 EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 4200}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(538)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4222}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(404)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {404, 4254},
|
|
/*h(27)=1 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {27, 4223}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(660)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {660, 4254},
|
|
/*h(283)=1 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {283, 4223}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_26_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(539)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4223}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(795)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4223}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 795;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(536)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {536, 4224},
|
|
/*h(1002)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1002, 4280},
|
|
/*h(159)=2 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {159, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(537)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4224}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 537;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4225}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 26;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {24, 4226},
|
|
/*h(1011)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {1011, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4226}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 25;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(282)=0 EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4227}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(280)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4228}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 280;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(281)=0 EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4228}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 281;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(744)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {744, 4282},
|
|
/*h(134)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {134, 4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(390)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {390, 4252},
|
|
/*h(1000)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {1000, 4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(646)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(902)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(166)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {166, 4252},
|
|
/*h(399)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {399, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(422)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 422;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(678)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_53_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(180)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {180, 4254},
|
|
/*h(934)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {934, 4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(150)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {150, 4252},
|
|
/*h(760)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {760, 4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(406)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {406, 4252},
|
|
/*h(927)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {927, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_30_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(662)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(918)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {918, 4252},
|
|
/*h(164)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {164, 4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(182)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {182, 4252},
|
|
/*h(415)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {415, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(438)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {438, 4252},
|
|
/*h(671)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {671, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(694)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(950)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(142)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1008)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {1008, 4282},
|
|
/*h(398)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {398, 4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(654)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(910)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(174)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {174, 4252},
|
|
/*h(407)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {407, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {430, 4252},
|
|
/*h(663)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {663, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(686)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_40_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(942)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(158)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {158, 4252},
|
|
/*h(391)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {391, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(414)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(670)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {670, 4252},
|
|
/*h(903)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {903, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_65_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(926)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {926, 4252},
|
|
/*h(172)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {172, 4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(190)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {4252}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(446)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {446, 4252},
|
|
/*h(679)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {679, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(135)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(647)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1010)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {1010, 4280},
|
|
/*h(167)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {167, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(151)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 151;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(919)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 919;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(183)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 183;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(439)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(695)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(951)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(143)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 143;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(655)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(911)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(175)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 175;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(431)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 431;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(687)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(943)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(191)=0 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 191;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_56_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(968)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {968, 4282},
|
|
/*h(447)=1 EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {447, 4253}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(132)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 132;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(388)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 388;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(644)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(900)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 900;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(420)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 420;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(676)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 676;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_1_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(932)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(148)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 148;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {450, 4280},
|
|
/*h(916)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {916, 4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(436)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {436, 4254},
|
|
/*h(203)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {203, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_148_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(692)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 692;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(948)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {948, 4254},
|
|
/*h(194)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {194, 4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(140)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 140;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(396)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 396;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(652)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_38_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(908)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(428)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 428;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_160_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(684)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 684;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(940)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {940, 4254},
|
|
/*h(707)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {707, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(156)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 156;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(412)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 412;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(668)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 668;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(924)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(188)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {4254}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 188;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(444)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {444, 4254},
|
|
/*h(211)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {211, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(234)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {234, 4280},
|
|
/*h(700)=1 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {700, 4254},
|
|
/*h(467)=2 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {467, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(956)=0 EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {956, 4254},
|
|
/*h(202)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {202, 4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_72_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(706)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(962)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(226)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {226, 4280},
|
|
/*h(459)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {459, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(482)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {482, 4280},
|
|
/*h(715)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {715, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(738)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(240)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {240, 4282},
|
|
/*h(994)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {994, 4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(210)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(466)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(722)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(978)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {978, 4280},
|
|
/*h(224)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {224, 4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_123_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(242)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {242, 4280},
|
|
/*h(475)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {475, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(498)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {498, 4280},
|
|
/*h(731)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {731, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(754)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {754, 4280},
|
|
/*h(987)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {987, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(458)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {458, 4280},
|
|
/*h(979)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {979, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(714)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(216)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {216, 4282},
|
|
/*h(970)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {970, 4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(490)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {490, 4280},
|
|
/*h(723)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {723, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_11_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(746)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(218)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {218, 4280},
|
|
/*h(451)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {451, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(474)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_35_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(730)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(986)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {986, 4280},
|
|
/*h(232)=1 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {232, 4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(250)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(506)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {506, 4280},
|
|
/*h(739)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {739, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(762)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {762, 4280},
|
|
/*h(995)=1 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {995, 4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1018)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {4280}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(195)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 195;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(963)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(227)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 227;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(483)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 483;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(243)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 243;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(499)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 499;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(755)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(971)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 971;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(235)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 235;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(491)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 491;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(747)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 747;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1003)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(219)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 219;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(251)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 251;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(507)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(763)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 763;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1019)=0 EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {4281}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1019;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(192)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 192;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(448)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(960)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(736)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 736;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(992)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(208)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 208;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(464)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 464;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(976)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(496)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 496;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(752)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(200)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 200;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(456)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(488)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(248)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 248;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(504)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 504;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1016)=0 EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {4282}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = key - 1016;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[218] = {
|
|
/*h(466)=0 */ {466, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_0_l1},
|
|
/*h(932)=1 */ {932, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_1_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(644)=3 */ {644, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(678)=5 */ {678, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_5_l1},
|
|
/*h(911)=6 */ {911, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_6_l1},
|
|
/*h(1000)=7 */ {1000, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_7_l1},
|
|
/*h(712)=8 */ {712, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_8_l1},
|
|
/*h(191)=9 */ {191, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_9_l1},
|
|
/*h(280)=10 */ {280, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_10_l1},
|
|
/*h(746)=11 */ {746, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_11_l1},
|
|
/*h(979)=12 */ {979, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_12_l1},
|
|
/*h(924)=13 */ {924, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_13_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26)=15 */ {26, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_15_l1},
|
|
/*h(958)=16 */ {958, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(903)=18 */ {903, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_18_l1},
|
|
/*h(992)=19 */ {992, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_19_l1},
|
|
/*h(704)=20 */ {704, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_20_l1},
|
|
/*h(183)=21 */ {183, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(738)=23 */ {738, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_23_l1},
|
|
/*h(971)=24 */ {971, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_24_l1},
|
|
/*h(450)=25 */ {450, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_25_l1},
|
|
/*h(539)=26 */ {539, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_26_l1},
|
|
/*h(251)=27 */ {251, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_27_l1},
|
|
/*h(950)=28 */ {950, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_28_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(662)=30 */ {662, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_30_l1},
|
|
/*h(984)=31 */ {984, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_31_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(175)=33 */ {175, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_33_l1},
|
|
/*h(1018)=34 */ {1018, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_34_l1},
|
|
/*h(730)=35 */ {730, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_35_l1},
|
|
/*h(963)=36 */ {963, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(908)=38 */ {908, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_38_l1},
|
|
/*h(243)=39 */ {243, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_39_l1},
|
|
/*h(942)=40 */ {942, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_40_l1},
|
|
/*h(188)=41 */ {188, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_41_l1},
|
|
/*h(654)=42 */ {654, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_42_l1},
|
|
/*h(976)=43 */ {976, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_43_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1010)=46 */ {1010, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_46_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(722)=48 */ {722, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(900)=50 */ {900, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_50_l1},
|
|
/*h(235)=51 */ {235, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_51_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(180)=53 */ {180, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_53_l1},
|
|
/*h(646)=54 */ {646, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_54_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(968)=56 */ {968, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_56_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1002)=58 */ {1002, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_58_l1},
|
|
/*h(248)=59 */ {248, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_59_l1},
|
|
/*h(714)=60 */ {714, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_60_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(282)=62 */ {282, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_62_l1},
|
|
/*h(604)=63 */ {604, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_63_l1},
|
|
/*h(227)=64 */ {227, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_64_l1},
|
|
/*h(172)=65 */ {172, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_65_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(350)=67 */ {350, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_67_l1},
|
|
/*h(960)=68 */ {960, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_68_l1},
|
|
/*h(439)=69 */ {439, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_69_l1},
|
|
/*h(151)=70 */ {151, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_70_l1},
|
|
/*h(240)=71 */ {240, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_71_l1},
|
|
/*h(706)=72 */ {706, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_72_l1},
|
|
/*h(795)=73 */ {795, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_73_l1},
|
|
/*h(507)=74 */ {507, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_74_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(219)=76 */ {219, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_76_l1},
|
|
/*h(164)=77 */ {164, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_77_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(863)=79 */ {863, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_79_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(431)=81 */ {431, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_81_l1},
|
|
/*h(143)=82 */ {143, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_82_l1},
|
|
/*h(232)=83 */ {232, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_83_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(499)=86 */ {499, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_86_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(211)=88 */ {211, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_88_l1},
|
|
/*h(910)=89 */ {910, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_89_l1},
|
|
/*h(156)=90 */ {156, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_90_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(190)=92 */ {190, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_92_l1},
|
|
/*h(423)=93 */ {423, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_93_l1},
|
|
/*h(135)=94 */ {135, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_94_l1},
|
|
/*h(224)=95 */ {224, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25)=98 */ {25, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_98_l1},
|
|
/*h(491)=99 */ {491, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_99_l1},
|
|
/*h(203)=100 */ {203, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_100_l1},
|
|
/*h(902)=101 */ {902, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_101_l1},
|
|
/*h(148)=102 */ {148, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_102_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(703)=104 */ {703, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_104_l1},
|
|
/*h(415)=105 */ {415, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_105_l1},
|
|
/*h(504)=106 */ {504, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_106_l1},
|
|
/*h(216)=107 */ {216, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_107_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(538)=109 */ {538, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_109_l1},
|
|
/*h(250)=110 */ {250, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_110_l1},
|
|
/*h(483)=111 */ {483, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_111_l1},
|
|
/*h(195)=112 */ {195, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_112_l1},
|
|
/*h(428)=113 */ {428, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_113_l1},
|
|
/*h(140)=114 */ {140, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_114_l1},
|
|
/*h(606)=115 */ {606, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_115_l1},
|
|
/*h(695)=116 */ {695, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_116_l1},
|
|
/*h(407)=117 */ {407, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_117_l1},
|
|
/*h(496)=118 */ {496, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_118_l1},
|
|
/*h(962)=119 */ {962, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_119_l1},
|
|
/*h(208)=120 */ {208, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(763)=122 */ {763, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_122_l1},
|
|
/*h(475)=123 */ {475, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_123_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(420)=125 */ {420, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_125_l1},
|
|
/*h(132)=126 */ {132, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_126_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(687)=128 */ {687, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_128_l1},
|
|
/*h(399)=129 */ {399, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_129_l1},
|
|
/*h(488)=130 */ {488, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(200)=132 */ {200, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(755)=134 */ {755, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_134_l1},
|
|
/*h(467)=135 */ {467, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_135_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(412)=137 */ {412, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(679)=140 */ {679, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_140_l1},
|
|
/*h(391)=141 */ {391, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_141_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(480)=143 */ {480, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_143_l1},
|
|
/*h(192)=144 */ {192, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_144_l1},
|
|
/*h(281)=145 */ {281, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_145_l1},
|
|
/*h(747)=146 */ {747, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_146_l1},
|
|
/*h(459)=147 */ {459, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_147_l1},
|
|
/*h(692)=148 */ {692, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_148_l1},
|
|
/*h(404)=149 */ {404, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_149_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(959)=151 */ {959, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_151_l1},
|
|
/*h(671)=152 */ {671, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_152_l1},
|
|
/*h(760)=153 */ {760, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_153_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(472)=155 */ {472, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_155_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(739)=158 */ {739, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_158_l1},
|
|
/*h(451)=159 */ {451, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_159_l1},
|
|
/*h(684)=160 */ {684, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_160_l1},
|
|
/*h(396)=161 */ {396, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(951)=163 */ {951, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_163_l1},
|
|
/*h(663)=164 */ {663, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_164_l1},
|
|
/*h(142)=165 */ {142, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_165_l1},
|
|
/*h(752)=166 */ {752, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_166_l1},
|
|
/*h(464)=167 */ {464, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1019)=169 */ {1019, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_169_l1},
|
|
/*h(731)=170 */ {731, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_170_l1},
|
|
/*h(210)=171 */ {210, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_171_l1},
|
|
/*h(676)=172 */ {676, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_172_l1},
|
|
/*h(388)=173 */ {388, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(943)=175 */ {943, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_175_l1},
|
|
/*h(422)=176 */ {422, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_176_l1},
|
|
/*h(655)=177 */ {655, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_177_l1},
|
|
/*h(744)=178 */ {744, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_178_l1},
|
|
/*h(456)=179 */ {456, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_179_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1011)=181 */ {1011, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_181_l1},
|
|
/*h(723)=182 */ {723, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_182_l1},
|
|
/*h(202)=183 */ {202, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_183_l1},
|
|
/*h(668)=184 */ {668, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(935)=187 */ {935, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_187_l1},
|
|
/*h(414)=188 */ {414, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_188_l1},
|
|
/*h(647)=189 */ {647, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_189_l1},
|
|
/*h(736)=190 */ {736, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_190_l1},
|
|
/*h(448)=191 */ {448, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_191_l1},
|
|
/*h(537)=192 */ {537, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_192_l1},
|
|
/*h(1003)=193 */ {1003, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_193_l1},
|
|
/*h(715)=194 */ {715, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_194_l1},
|
|
/*h(194)=195 */ {194, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_195_l1},
|
|
/*h(660)=196 */ {660, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_196_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(605)=198 */ {605, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_198_l1},
|
|
/*h(694)=199 */ {694, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_199_l1},
|
|
/*h(927)=200 */ {927, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_200_l1},
|
|
/*h(1016)=201 */ {1016, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_201_l1},
|
|
/*h(728)=202 */ {728, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(995)=205 */ {995, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_205_l1},
|
|
/*h(474)=206 */ {474, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_206_l1},
|
|
/*h(707)=207 */ {707, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_207_l1},
|
|
/*h(652)=208 */ {652, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(686)=211 */ {686, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_211_l1},
|
|
/*h(919)=212 */ {919, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_212_l1},
|
|
/*h(1008)=213 */ {1008, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_213_l1},
|
|
/*h(720)=214 */ {720, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_214_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(987)=217 */ {987, xed3_phash_find_mapevex_map1_opcode0x5a_vv2_217_l1},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 218ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[104] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(29)=1 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {29, 6106},
|
|
/*h(602)=2 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4215},
|
|
/*h(30)=3 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {30, 6105},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(537)=6 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {537, 4182},
|
|
/*h(89)=7 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {89, 4219},
|
|
/*h(538)=8 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {538, 4180},
|
|
/*h(90)=9 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4218},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(473)=12 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {473, 4321},
|
|
/*h(25)=13 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25, 4184},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(284)=16 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {284, 6108},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(543)=19 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {543, 6110},
|
|
/*h(219)=20 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {219, 4316},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=22 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {344, 4221},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(603)=25 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {603, 4216},
|
|
/*h(31)=26 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {31, 6110},
|
|
/*h(728)=27 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {728, 4317},
|
|
/*h(280)=28 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {280, 4186},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(987)=30 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {987, 4316},
|
|
/*h(539)=31 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {539, 4181},
|
|
/*h(91)=32 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {91, 4216},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=35 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4320},
|
|
/*h(26)=36 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {26, 4183},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(285)=39 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {285, 6108},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(345)=45 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {345, 4221},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(729)=50 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {729, 4317},
|
|
/*h(281)=51 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {281, 4186},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(540)=54 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {540, 6111},
|
|
/*h(216)=55 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {216, 4319},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(799)=57 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {799, 6110},
|
|
/*h(475)=58 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {475, 4316},
|
|
/*h(27)=59 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {27, 4181},
|
|
/*h(600)=60 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {600, 4217},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(286)=62 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {286, 6107},
|
|
/*h(859)=63 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {859, 4216},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=68 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4220},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=73 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4315},
|
|
/*h(282)=74 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {282, 4185},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(541)=77 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {541, 6111},
|
|
/*h(217)=78 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {217, 4319},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(28)=82 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {28, 6106},
|
|
/*h(601)=83 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {601, 4217},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(287)=85 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {287, 6110},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(536)=87 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {536, 4182},
|
|
/*h(88)=88 EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {88, 4219},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(795)=90 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {795, 4181},
|
|
/*h(347)=91 EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {347, 4216},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=93 EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {472, 4321},
|
|
/*h(24)=94 EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24, 4184},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(731)=96 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {731, 4316},
|
|
/*h(283)=97 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {283, 4181},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(542)=100 EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {542, 6109},
|
|
/*h(218)=101 EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 4318},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((23*key % 229) % 104);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[100] = {
|
|
/*h(0)=0 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 5961},
|
|
/*h(46)=1 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5955},
|
|
/*h(54)=2 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 5964},
|
|
/*h(24)=3 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 5969},
|
|
/*h(32)=4 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 5963},
|
|
/*h(78)=5 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5950},
|
|
/*h(86)=6 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 5964},
|
|
/*h(56)=7 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 5969},
|
|
/*h(64)=8 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 5959},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=10 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 5964},
|
|
/*h(88)=11 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 5969},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=13 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 5951},
|
|
/*h(23)=14 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {23, 5965},
|
|
/*h(120)=15 EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 5969},
|
|
/*h(1)=16 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 5961},
|
|
/*h(47)=17 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 5951},
|
|
/*h(55)=18 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {55, 5965},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=20 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 5963},
|
|
/*h(79)=21 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 5951},
|
|
/*h(87)=22 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {87, 5965},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=24 EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 5959},
|
|
/*h(111)=25 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 5951},
|
|
/*h(119)=26 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {119, 5965},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2)=32 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 5960},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=35 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 5967},
|
|
/*h(34)=36 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 5962},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=39 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 5967},
|
|
/*h(66)=40 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 5957},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=43 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 5967},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=47 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 5967},
|
|
/*h(3)=48 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 5958},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(27)=51 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 5968},
|
|
/*h(35)=52 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 5958},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 5968},
|
|
/*h(67)=56 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 5958},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 5968},
|
|
/*h(99)=60 EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 5958},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 5968},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5954},
|
|
/*h(20)=66 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 5966},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5956},
|
|
/*h(52)=70 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 5966},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5952},
|
|
/*h(84)=74 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 5966},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 5966},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5954},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5956},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5952},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5953},
|
|
/*h(22)=98 EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 5964},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[100] = {
|
|
/*h(0)=0 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 4882},
|
|
/*h(46)=1 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4876},
|
|
/*h(54)=2 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 4885},
|
|
/*h(24)=3 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4890},
|
|
/*h(32)=4 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 4884},
|
|
/*h(78)=5 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4871},
|
|
/*h(86)=6 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 4885},
|
|
/*h(56)=7 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4890},
|
|
/*h(64)=8 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 4880},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=10 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 4885},
|
|
/*h(88)=11 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4890},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=13 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {15, 4872},
|
|
/*h(23)=14 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {23, 4886},
|
|
/*h(120)=15 EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4890},
|
|
/*h(1)=16 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 4882},
|
|
/*h(47)=17 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {47, 4872},
|
|
/*h(55)=18 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {55, 4886},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=20 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 4884},
|
|
/*h(79)=21 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {79, 4872},
|
|
/*h(87)=22 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {87, 4886},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=24 EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 4880},
|
|
/*h(111)=25 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {111, 4872},
|
|
/*h(119)=26 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {119, 4886},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2)=32 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 4881},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=35 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 4888},
|
|
/*h(34)=36 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 4883},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=39 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 4888},
|
|
/*h(66)=40 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 4878},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=43 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 4888},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=47 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 4888},
|
|
/*h(3)=48 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {3, 4879},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(27)=51 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {27, 4889},
|
|
/*h(35)=52 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {35, 4879},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {59, 4889},
|
|
/*h(67)=56 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {67, 4879},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {91, 4889},
|
|
/*h(99)=60 EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {99, 4879},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {123, 4889},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4875},
|
|
/*h(20)=66 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4887},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4877},
|
|
/*h(52)=70 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4887},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4873},
|
|
/*h(84)=74 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4887},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4887},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4875},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4877},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4873},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4874},
|
|
/*h(22)=98 EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 4885},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[100] = {
|
|
/*h(0)=0 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 4406},
|
|
/*h(46)=1 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4400},
|
|
/*h(54)=2 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 4409},
|
|
/*h(24)=3 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4414},
|
|
/*h(32)=4 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 4408},
|
|
/*h(78)=5 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4395},
|
|
/*h(86)=6 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 4409},
|
|
/*h(56)=7 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4414},
|
|
/*h(64)=8 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 4404},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=10 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 4409},
|
|
/*h(88)=11 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4414},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=13 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {15, 4396},
|
|
/*h(23)=14 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {23, 4410},
|
|
/*h(120)=15 EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4414},
|
|
/*h(1)=16 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 4406},
|
|
/*h(47)=17 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {47, 4396},
|
|
/*h(55)=18 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {55, 4410},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=20 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 4408},
|
|
/*h(79)=21 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {79, 4396},
|
|
/*h(87)=22 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {87, 4410},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=24 EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 4404},
|
|
/*h(111)=25 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1*/ {111, 4396},
|
|
/*h(119)=26 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W1*/ {119, 4410},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2)=32 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 4405},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=35 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 4412},
|
|
/*h(34)=36 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 4407},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=39 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 4412},
|
|
/*h(66)=40 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 4402},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=43 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 4412},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=47 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 4412},
|
|
/*h(3)=48 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {3, 4403},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(27)=51 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {27, 4413},
|
|
/*h(35)=52 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {35, 4403},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {59, 4413},
|
|
/*h(67)=56 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {67, 4403},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {91, 4413},
|
|
/*h(99)=60 EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0*/ {99, 4403},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() W0*/ {123, 4413},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4399},
|
|
/*h(20)=66 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4411},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4401},
|
|
/*h(52)=70 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4411},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4397},
|
|
/*h(84)=74 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4411},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4411},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4399},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4401},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4397},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4398},
|
|
/*h(22)=98 EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 4409},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x5f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[100] = {
|
|
/*h(0)=0 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {0, 4862},
|
|
/*h(46)=1 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 4856},
|
|
/*h(54)=2 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {54, 4865},
|
|
/*h(24)=3 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4870},
|
|
/*h(32)=4 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {32, 4864},
|
|
/*h(78)=5 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 4851},
|
|
/*h(86)=6 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {86, 4865},
|
|
/*h(56)=7 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4870},
|
|
/*h(64)=8 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {64, 4860},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=10 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {118, 4865},
|
|
/*h(88)=11 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4870},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=13 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {15, 4852},
|
|
/*h(23)=14 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {23, 4866},
|
|
/*h(120)=15 EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4870},
|
|
/*h(1)=16 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {1, 4862},
|
|
/*h(47)=17 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {47, 4852},
|
|
/*h(55)=18 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {55, 4866},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=20 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {33, 4864},
|
|
/*h(79)=21 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {79, 4852},
|
|
/*h(87)=22 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {87, 4866},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=24 EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {65, 4860},
|
|
/*h(111)=25 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1*/ {111, 4852},
|
|
/*h(119)=26 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1*/ {119, 4866},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2)=32 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {2, 4861},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=35 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {26, 4868},
|
|
/*h(34)=36 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {34, 4863},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=39 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {58, 4868},
|
|
/*h(66)=40 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {66, 4858},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=43 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {90, 4868},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=47 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0*/ {122, 4868},
|
|
/*h(3)=48 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {3, 4859},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(27)=51 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {27, 4869},
|
|
/*h(35)=52 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {35, 4859},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {59, 4869},
|
|
/*h(67)=56 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {67, 4859},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {91, 4869},
|
|
/*h(99)=60 EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0*/ {99, 4859},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0*/ {123, 4869},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 4855},
|
|
/*h(20)=66 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4867},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 4857},
|
|
/*h(52)=70 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4867},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 4853},
|
|
/*h(84)=74 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4867},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4867},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 4855},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 4857},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 4853},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 4854},
|
|
/*h(22)=98 EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1*/ {22, 4865},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x60_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6752},
|
|
/*h(4)=1 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6751},
|
|
/*h(38)=2 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6754},
|
|
/*h(20)=3 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6753},
|
|
/*h(6)=4 EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6750},
|
|
/*h(36)=5 EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6755}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x61_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6758},
|
|
/*h(4)=1 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6757},
|
|
/*h(38)=2 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6760},
|
|
/*h(20)=3 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6759},
|
|
/*h(6)=4 EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6756},
|
|
/*h(36)=5 EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6761}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x62_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5795},
|
|
/*h(10)=3 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5796},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5799},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5795},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5797},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5799},
|
|
/*h(74)=13 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5794},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5797},
|
|
/*h(42)=17 EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5798}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x63_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6256},
|
|
/*h(4)=1 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6255},
|
|
/*h(38)=2 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6258},
|
|
/*h(20)=3 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6257},
|
|
/*h(6)=4 EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6254},
|
|
/*h(36)=5 EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x64_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0*/ {22, 6376},
|
|
/*h(4)=1 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6375},
|
|
/*h(38)=2 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0*/ {38, 6378},
|
|
/*h(20)=3 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6377},
|
|
/*h(6)=4 EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0*/ {6, 6374},
|
|
/*h(36)=5 EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x65_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0*/ {22, 6382},
|
|
/*h(4)=1 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6381},
|
|
/*h(38)=2 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0*/ {38, 6384},
|
|
/*h(20)=3 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6383},
|
|
/*h(6)=4 EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0*/ {6, 6380},
|
|
/*h(36)=5 EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x66_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5171},
|
|
/*h(10)=3 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {10, 5172},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5175},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5171},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5173},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5175},
|
|
/*h(74)=13 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {74, 5170},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5173},
|
|
/*h(42)=17 EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {42, 5174}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x67_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6268},
|
|
/*h(4)=1 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6267},
|
|
/*h(38)=2 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6270},
|
|
/*h(20)=3 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6269},
|
|
/*h(6)=4 EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6266},
|
|
/*h(36)=5 EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6271}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x68_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6740},
|
|
/*h(4)=1 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6739},
|
|
/*h(38)=2 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6742},
|
|
/*h(20)=3 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6741},
|
|
/*h(6)=4 EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6738},
|
|
/*h(36)=5 EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6743}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x69_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6746},
|
|
/*h(4)=1 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6745},
|
|
/*h(38)=2 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6748},
|
|
/*h(20)=3 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6747},
|
|
/*h(6)=4 EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6744},
|
|
/*h(36)=5 EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6749}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6a_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5783},
|
|
/*h(10)=3 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5784},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5787},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5783},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5785},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5787},
|
|
/*h(74)=13 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5782},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5785},
|
|
/*h(42)=17 EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5786}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 6253},
|
|
/*h(10)=3 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 6248},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 6251},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 6253},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 6249},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 6251},
|
|
/*h(74)=13 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 6252},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 6249},
|
|
/*h(42)=17 EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 6250}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6c_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5801},
|
|
/*h(46)=1 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5804},
|
|
/*h(12)=2 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5803},
|
|
/*h(77)=3 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5801},
|
|
/*h(13)=4 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5803},
|
|
/*h(78)=5 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5800},
|
|
/*h(44)=6 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5805},
|
|
/*h(14)=7 EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5802},
|
|
/*h(45)=8 EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5805}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6d_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5789},
|
|
/*h(46)=1 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5792},
|
|
/*h(12)=2 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5791},
|
|
/*h(77)=3 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5789},
|
|
/*h(13)=4 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5791},
|
|
/*h(78)=5 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5788},
|
|
/*h(44)=6 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5793},
|
|
/*h(14)=7 EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5790},
|
|
/*h(45)=8 EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5793}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[17] = {
|
|
/*h(746)=0 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {746, 4917},
|
|
/*h(738)=1 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {738, 4917},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(722)=3 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {722, 4918},
|
|
/*h(714)=4 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {714, 4917},
|
|
/*h(706)=5 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER()*/ {706, 4917},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(758)=7 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0*/ {758, 4999},
|
|
/*h(750)=8 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {750, 4915},
|
|
/*h(742)=9 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {742, 4915},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(726)=11 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0*/ {726, 4916},
|
|
/*h(718)=12 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {718, 4915},
|
|
/*h(710)=13 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {710, 4915},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(754)=16 EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER()*/ {754, 5000}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 17ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x6f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[59] = {
|
|
/*h(472)=0 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {472, 4962},
|
|
/*h(728)=1 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {728, 4954},
|
|
/*h(158)=2 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {158, 6200},
|
|
/*h(414)=3 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {414, 6204},
|
|
/*h(670)=4 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {670, 6208},
|
|
/*h(218)=5 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 4957},
|
|
/*h(474)=6 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4961},
|
|
/*h(730)=7 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4953},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(220)=11 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {220, 4970},
|
|
/*h(476)=12 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {476, 4974},
|
|
/*h(732)=13 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {732, 4966},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(222)=17 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {222, 4969},
|
|
/*h(478)=18 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {478, 4973},
|
|
/*h(734)=19 EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {734, 4965},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=28 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {88, 4934},
|
|
/*h(344)=29 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {344, 4938},
|
|
/*h(600)=30 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {600, 4930},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=34 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4933},
|
|
/*h(346)=35 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4937},
|
|
/*h(602)=36 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4929},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=40 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 4946},
|
|
/*h(348)=41 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 4950},
|
|
/*h(604)=42 EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 4942},
|
|
/*h(152)=43 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 6213},
|
|
/*h(408)=44 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {408, 6217},
|
|
/*h(664)=45 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 6221},
|
|
/*h(94)=46 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4945},
|
|
/*h(350)=47 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4949},
|
|
/*h(606)=48 EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4941},
|
|
/*h(154)=49 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {154, 6212},
|
|
/*h(410)=50 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {410, 6216},
|
|
/*h(666)=51 EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {666, 6220},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(156)=55 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 6201},
|
|
/*h(412)=56 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 6205},
|
|
/*h(668)=57 EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 6209},
|
|
/*h(216)=58 EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULLMEM()*/ {216, 4958}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 59);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x70_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[59] = {
|
|
/*h(472)=0 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {472, 6603},
|
|
/*h(728)=1 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {728, 6605},
|
|
/*h(158)=2 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()*/ {158, 6606},
|
|
/*h(414)=3 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()*/ {414, 6608},
|
|
/*h(670)=4 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()*/ {670, 6610},
|
|
/*h(218)=5 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()*/ {218, 6600},
|
|
/*h(474)=6 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()*/ {474, 6602},
|
|
/*h(730)=7 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()*/ {730, 6604},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(220)=11 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {220, 6601},
|
|
/*h(476)=12 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {476, 6603},
|
|
/*h(732)=13 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {732, 6605},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(222)=17 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()*/ {222, 6600},
|
|
/*h(478)=18 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()*/ {478, 6602},
|
|
/*h(734)=19 EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()*/ {734, 6604},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=28 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 5623},
|
|
/*h(344)=29 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 5625},
|
|
/*h(600)=30 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 5621},
|
|
/*h(89)=31 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 5623},
|
|
/*h(345)=32 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 5625},
|
|
/*h(601)=33 EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 5621},
|
|
/*h(90)=34 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()*/ {90, 5622},
|
|
/*h(346)=35 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()*/ {346, 5624},
|
|
/*h(602)=36 EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()*/ {602, 5620},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(152)=43 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {152, 6607},
|
|
/*h(408)=44 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {408, 6609},
|
|
/*h(664)=45 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {664, 6611},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(154)=49 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()*/ {154, 6606},
|
|
/*h(410)=50 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()*/ {410, 6608},
|
|
/*h(666)=51 EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()*/ {666, 6610},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(156)=55 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 6607},
|
|
/*h(412)=56 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 6609},
|
|
/*h(668)=57 EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 6611},
|
|
/*h(216)=58 EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {216, 6601}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 59);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x71_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(306)=0 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 UIMM8()*/ {306, 6652},
|
|
/*h(184)=1 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {184, 6631},
|
|
/*h(186)=2 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 UIMM8()*/ {186, 6630},
|
|
/*h(168)=3 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {168, 6673},
|
|
/*h(170)=4 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 UIMM8()*/ {170, 6672},
|
|
/*h(48)=5 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {48, 6645},
|
|
/*h(304)=6 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {304, 6653},
|
|
/*h(58)=7 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 UIMM8()*/ {58, 6626},
|
|
/*h(314)=8 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 UIMM8()*/ {314, 6634},
|
|
/*h(42)=9 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 UIMM8()*/ {42, 6668},
|
|
/*h(298)=10 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 UIMM8()*/ {298, 6676},
|
|
/*h(176)=11 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {176, 6649},
|
|
/*h(178)=12 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 UIMM8()*/ {178, 6648},
|
|
/*h(56)=13 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {56, 6627},
|
|
/*h(312)=14 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {312, 6635},
|
|
/*h(40)=15 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {40, 6669},
|
|
/*h(296)=16 EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()*/ {296, 6677},
|
|
/*h(50)=17 EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 UIMM8()*/ {50, 6644}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REG_VEX_PREFIX_VL(d);
|
|
hidx = ((24*key % 101) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x72_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[144] = {
|
|
/*h(585)=0 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {585, 5701},
|
|
/*h(601)=1 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {601, 5629},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(64)=4 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {64, 5587},
|
|
/*h(80)=5 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {80, 5669},
|
|
/*h(96)=6 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {96, 5593},
|
|
/*h(112)=7 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {112, 5681},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(586)=12 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W0 UIMM8()*/ {586, 5700},
|
|
/*h(602)=13 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W0 UIMM8()*/ {602, 5628},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=16 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {65, 5587},
|
|
/*h(81)=17 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {81, 5669},
|
|
/*h(97)=18 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {97, 5593},
|
|
/*h(113)=19 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {113, 5681},
|
|
/*h(320)=20 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {320, 5589},
|
|
/*h(336)=21 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {336, 5673},
|
|
/*h(352)=22 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {352, 5595},
|
|
/*h(368)=23 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {368, 5685},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(66)=28 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL128 W0 UIMM8()*/ {66, 5586},
|
|
/*h(82)=29 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 W0 UIMM8()*/ {82, 5668},
|
|
/*h(98)=30 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL128 W1 UIMM8()*/ {98, 5592},
|
|
/*h(114)=31 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 W1 UIMM8()*/ {114, 5680},
|
|
/*h(321)=32 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {321, 5589},
|
|
/*h(337)=33 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {337, 5673},
|
|
/*h(353)=34 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {353, 5595},
|
|
/*h(369)=35 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {369, 5685},
|
|
/*h(576)=36 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {576, 5585},
|
|
/*h(592)=37 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {592, 5665},
|
|
/*h(608)=38 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {608, 5591},
|
|
/*h(624)=39 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {624, 5677},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(322)=44 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL256 W0 UIMM8()*/ {322, 5588},
|
|
/*h(338)=45 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 W0 UIMM8()*/ {338, 5672},
|
|
/*h(354)=46 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL256 W1 UIMM8()*/ {354, 5594},
|
|
/*h(370)=47 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 W1 UIMM8()*/ {370, 5684},
|
|
/*h(577)=48 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {577, 5585},
|
|
/*h(593)=49 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {593, 5665},
|
|
/*h(609)=50 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {609, 5591},
|
|
/*h(625)=51 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {625, 5677},
|
|
/*h(68)=52 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {68, 5563},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(100)=54 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {100, 5569},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(578)=60 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL512 W0 UIMM8()*/ {578, 5584},
|
|
/*h(594)=61 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 W0 UIMM8()*/ {594, 5664},
|
|
/*h(610)=62 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL512 W1 UIMM8()*/ {610, 5590},
|
|
/*h(626)=63 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 W1 UIMM8()*/ {626, 5676},
|
|
/*h(69)=64 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {69, 5563},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(101)=66 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {101, 5569},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(324)=68 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {324, 5565},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(356)=70 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {356, 5571},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(70)=76 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL128 W0 UIMM8()*/ {70, 5562},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(102)=78 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL128 W1 UIMM8()*/ {102, 5568},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(325)=80 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {325, 5565},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(357)=82 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {357, 5571},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(580)=84 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {580, 5561},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(612)=86 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {612, 5567},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(326)=92 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL256 W0 UIMM8()*/ {326, 5564},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(358)=94 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL256 W1 UIMM8()*/ {358, 5570},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(581)=96 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {581, 5561},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(613)=98 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {613, 5567},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=100 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {72, 5705},
|
|
/*h(88)=101 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {88, 5633},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(582)=108 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL512 W0 UIMM8()*/ {582, 5560},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(614)=110 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL512 W1 UIMM8()*/ {614, 5566},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=112 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {73, 5705},
|
|
/*h(89)=113 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {89, 5633},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(328)=116 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {328, 5709},
|
|
/*h(344)=117 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {344, 5637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(74)=124 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W0 UIMM8()*/ {74, 5704},
|
|
/*h(90)=125 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W0 UIMM8()*/ {90, 5632},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(329)=128 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {329, 5709},
|
|
/*h(345)=129 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {345, 5637},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(584)=132 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {584, 5701},
|
|
/*h(600)=133 EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {600, 5629},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(330)=140 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W0 UIMM8()*/ {330, 5708},
|
|
/*h(346)=141 EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W0 UIMM8()*/ {346, 5636},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REG_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 191) % 144);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x73_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[192] = {
|
|
/*h(3281)=0 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3281, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3282)=3 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3282, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2768)=5 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2768, 5721},
|
|
/*h(3283)=6 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3283, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2769)=8 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2769, 5721},
|
|
/*h(3284)=9 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W1 UIMM8()*/ {3284, 5712},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2770)=11 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2770, 5721},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2256)=13 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2256, 5717},
|
|
/*h(2771)=14 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2771, 5721},
|
|
/*h(3286)=15 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W1 UIMM8()*/ {3286, 5712},
|
|
/*h(2257)=16 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2257, 5717},
|
|
/*h(2772)=17 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W1 UIMM8()*/ {2772, 5720},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2258)=19 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2258, 5717},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2259)=22 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2259, 5717},
|
|
/*h(2774)=23 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W1 UIMM8()*/ {2774, 5720},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2260)=25 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W1 UIMM8()*/ {2260, 5716},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1232)=29 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1232, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2262)=31 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W1 UIMM8()*/ {2262, 5716},
|
|
/*h(1233)=32 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1233, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1234)=35 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1234, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(720)=37 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {720, 5721},
|
|
/*h(1235)=38 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1235, 5713},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(721)=40 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {721, 5721},
|
|
/*h(1236)=41 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W1 UIMM8()*/ {1236, 5712},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(722)=43 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {722, 5721},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(208)=45 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {208, 5717},
|
|
/*h(723)=46 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {723, 5721},
|
|
/*h(1238)=47 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W1 UIMM8()*/ {1238, 5712},
|
|
/*h(209)=48 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {209, 5717},
|
|
/*h(724)=49 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W1 UIMM8()*/ {724, 5720},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(210)=51 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {210, 5717},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(211)=54 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {211, 5717},
|
|
/*h(726)=55 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W1 UIMM8()*/ {726, 5720},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(212)=57 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W1 UIMM8()*/ {212, 5716},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1242)=59 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {1242, 6659},
|
|
/*h(1178)=60 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {1178, 6659},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(214)=63 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W1 UIMM8()*/ {214, 5716},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=67 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {730, 6657},
|
|
/*h(666)=68 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {666, 6657},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1246)=71 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8()*/ {1246, 6658},
|
|
/*h(1182)=72 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8()*/ {1182, 6658},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(218)=75 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {218, 6655},
|
|
/*h(154)=76 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {154, 6655},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(734)=79 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL256 ZEROING=0 MASK=0 UIMM8()*/ {734, 6656},
|
|
/*h(670)=80 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL256 ZEROING=0 MASK=0 UIMM8()*/ {670, 6656},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(222)=87 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {222, 6654},
|
|
/*h(158)=88 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {158, 6654},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3312)=93 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3312, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3313)=96 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3313, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3314)=99 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3314, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2800)=101 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2800, 5649},
|
|
/*h(3315)=102 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3315, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2801)=104 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2801, 5649},
|
|
/*h(3316)=105 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W1 UIMM8()*/ {3316, 5640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2802)=107 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2802, 5649},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2288)=109 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2288, 5645},
|
|
/*h(2803)=110 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2803, 5649},
|
|
/*h(3318)=111 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W1 UIMM8()*/ {3318, 5640},
|
|
/*h(2289)=112 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2289, 5645},
|
|
/*h(2804)=113 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W1 UIMM8()*/ {2804, 5648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2290)=115 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2290, 5645},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2291)=118 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {2291, 5645},
|
|
/*h(2806)=119 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W1 UIMM8()*/ {2806, 5648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2292)=121 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W1 UIMM8()*/ {2292, 5644},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1264)=125 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1264, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2294)=127 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W1 UIMM8()*/ {2294, 5644},
|
|
/*h(1265)=128 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1265, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1266)=131 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1266, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(752)=133 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {752, 5649},
|
|
/*h(1267)=134 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {1267, 5641},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(753)=136 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {753, 5649},
|
|
/*h(1268)=137 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W1 UIMM8()*/ {1268, 5640},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(754)=139 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {754, 5649},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(240)=141 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {240, 5645},
|
|
/*h(755)=142 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {755, 5649},
|
|
/*h(1270)=143 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W1 UIMM8()*/ {1270, 5640},
|
|
/*h(241)=144 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {241, 5645},
|
|
/*h(756)=145 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W1 UIMM8()*/ {756, 5648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(242)=147 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {242, 5645},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(243)=150 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {243, 5645},
|
|
/*h(758)=151 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W1 UIMM8()*/ {758, 5648},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(244)=153 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W1 UIMM8()*/ {244, 5644},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1274)=155 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {1274, 6617},
|
|
/*h(1210)=156 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {1210, 6617},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(246)=159 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W1 UIMM8()*/ {246, 5644},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(762)=163 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {762, 6615},
|
|
/*h(698)=164 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {698, 6615},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1278)=167 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8()*/ {1278, 6616},
|
|
/*h(1214)=168 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8()*/ {1214, 6616},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(250)=171 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {250, 6613},
|
|
/*h(186)=172 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_8_BITS() NELEM_FULLMEM()*/ {186, 6613},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(766)=175 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL256 ZEROING=0 MASK=0 UIMM8()*/ {766, 6614},
|
|
/*h(702)=176 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL256 ZEROING=0 MASK=0 UIMM8()*/ {702, 6614},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(254)=183 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {254, 6612},
|
|
/*h(190)=184 EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {190, 6612},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(3280)=190 EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {3280, 5713},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REG_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 193) % 192);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x74_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0*/ {22, 6364},
|
|
/*h(4)=1 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6363},
|
|
/*h(38)=2 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0*/ {38, 6366},
|
|
/*h(20)=3 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6365},
|
|
/*h(6)=4 EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0*/ {6, 6362},
|
|
/*h(36)=5 EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6367}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x75_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0*/ {22, 6370},
|
|
/*h(4)=1 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6369},
|
|
/*h(38)=2 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0*/ {38, 6372},
|
|
/*h(20)=3 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6371},
|
|
/*h(6)=4 EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0*/ {6, 6368},
|
|
/*h(36)=5 EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6373}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x76_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5159},
|
|
/*h(10)=3 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0*/ {10, 5160},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5163},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5159},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5161},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5163},
|
|
/*h(74)=13 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0*/ {74, 5158},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5161},
|
|
/*h(42)=17 EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0*/ {42, 5162}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8644)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25028)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8676)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8676, 4308},
|
|
/*h(4495)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4495, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25060)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25060, 4308},
|
|
/*h(20879)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20879, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8652)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25036)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25036;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8684)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8684, 4308},
|
|
/*h(4503)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4503, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25068)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25068, 4308},
|
|
/*h(20887)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20887, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8660)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8660;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25044)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25044;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8692)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8692, 4308},
|
|
/*h(9679)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9679, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25076)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25076;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_776_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8646)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25030)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8678)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8678, 4308},
|
|
/*h(4497)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4497, 4328},
|
|
/*h(9665)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9665, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20881)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20881, 4328},
|
|
/*h(25062)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25062, 4308},
|
|
/*h(26049)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26049, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_693_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8654)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25038)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8686)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8686, 4308},
|
|
/*h(9673)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9673, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25070)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25070, 4308},
|
|
/*h(26057)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26057, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4481)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4481, 4328},
|
|
/*h(8662)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8662, 4308},
|
|
/*h(9649)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9649, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25046)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25046, 4308},
|
|
/*h(20865)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20865, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9681)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9681, 6125},
|
|
/*h(4513)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4513, 4328},
|
|
/*h(8694)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8694, 4308}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25078)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25078, 4308},
|
|
/*h(20897)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20897, 4328},
|
|
/*h(26065)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26065, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(453)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 453;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16837)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_649_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5536)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5536, 6136},
|
|
/*h(9717)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9717, 6124},
|
|
/*h(4549)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4549, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20933)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20933, 4309},
|
|
/*h(26101)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26101, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8645)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8645, 4309},
|
|
/*h(13813)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13813, 6124},
|
|
/*h(9632)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9632, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26016)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26016, 6139},
|
|
/*h(30197)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30197, 6124},
|
|
/*h(25029)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25029, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_552_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11754)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11754, 4360},
|
|
/*h(12741)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12741, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1455)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1455, 6138},
|
|
/*h(468)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {468, 4311},
|
|
/*h(29125)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29125, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(485)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {485, 4309},
|
|
/*h(24961)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24961, 4324},
|
|
/*h(1472)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1472, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_915_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16869)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16869;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(400)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {400, 4326},
|
|
/*h(4581)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4581, 4309},
|
|
/*h(5568)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5568, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20965)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20965, 4309},
|
|
/*h(21952)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21952, 6122},
|
|
/*h(16784)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16784, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1013_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4496)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4496, 4328},
|
|
/*h(8677)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8677, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_818_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25061)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25061;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8592)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8592, 4324},
|
|
/*h(12773)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12773, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29157)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29157, 4309},
|
|
/*h(24976)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24976, 4324},
|
|
/*h(500)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {500, 4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1359_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(461)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16845)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16845;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_566_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5544)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5544, 6136},
|
|
/*h(4557)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4557, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20941)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20941;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9640)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9640, 6139},
|
|
/*h(8653)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8653, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1066_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26024)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26024, 6139},
|
|
/*h(25037)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25037, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12749)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12749;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29133)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29133;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1027_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1480)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1480, 6120},
|
|
/*h(493)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {493, 4309},
|
|
/*h(24969)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24969, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_832_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17864)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17864, 6120},
|
|
/*h(16877)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16877, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4589)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21960)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21960, 6122},
|
|
/*h(20973)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20973, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_930_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8685)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8685;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_735_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25069)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25069;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12781)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12781;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29165)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29165;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(469)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 469;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1081_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16853)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16853;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4565)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4565, 4309},
|
|
/*h(5552)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5552, 6136},
|
|
/*h(384)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {384, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21936)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21936, 6136},
|
|
/*h(16768)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16768, 4326},
|
|
/*h(20949)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20949, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8661)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8661;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_983_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25045)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25045, 4309},
|
|
/*h(26032)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26032, 6139},
|
|
/*h(20864)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20864, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8576)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8576, 4324},
|
|
/*h(12757)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12757, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(484)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {484, 4311},
|
|
/*h(29141)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29141, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_944_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24977)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24977, 4324},
|
|
/*h(501)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {501, 4309},
|
|
/*h(1488)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1488, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_749_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17872)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17872, 6120},
|
|
/*h(16885)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16885, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4597)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20981)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_847_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4512)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4512, 4328},
|
|
/*h(8693)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8693, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20896)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20896, 4328},
|
|
/*h(25077)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25077, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8608)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8608, 4324},
|
|
/*h(12789)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12789, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24992)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24992, 4324},
|
|
/*h(29173)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29173, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(455)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {455, 4309},
|
|
/*h(5623)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5623, 6124},
|
|
/*h(1442)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1442, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16839)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16839, 4309},
|
|
/*h(22007)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {22007, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1000_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4551)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4551, 4309},
|
|
/*h(5538)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5538, 6136},
|
|
/*h(9719)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9719, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_805_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26103)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26103, 6124},
|
|
/*h(21922)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21922, 6136},
|
|
/*h(20935)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20935, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3479)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 4359},
|
|
/*h(8647)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8647, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25031)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_903_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7575)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7575, 4359},
|
|
/*h(12743)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12743, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_708_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(470)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {470, 4311},
|
|
/*h(29127)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29127, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(487)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17858)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17858, 6120},
|
|
/*h(16871)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16871, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(402)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {402, 4326},
|
|
/*h(4583)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4583, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20967)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4498)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4498, 4328},
|
|
/*h(8679)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8679, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20882)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20882, 4328},
|
|
/*h(25063)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25063, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8594)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8594, 4324},
|
|
/*h(12775)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12775, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24978)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24978, 4324},
|
|
/*h(502)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {502, 4311},
|
|
/*h(29159)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29159, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1450)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1450, 6134},
|
|
/*h(463)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {463, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17834)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17834, 6134},
|
|
/*h(16847)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16847, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_918_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4559)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4559;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_722_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21930)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21930, 6136},
|
|
/*h(20943)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20943, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8655)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1418_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25039)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25039;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_820_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12751)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_625_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29135)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(495)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17866)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17866, 6120},
|
|
/*h(16879)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16879, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_586_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4591)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20975)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8687)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1086_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25071)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12783)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29167)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29167;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1458)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1458, 6134},
|
|
/*h(471)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {471, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17842)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17842, 6134},
|
|
/*h(16855)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16855, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_835_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4567)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_639_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16770)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16770, 4326},
|
|
/*h(20951)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20951, 4309},
|
|
/*h(21938)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21938, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4482)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4482, 4328},
|
|
/*h(3495)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3495, 4358},
|
|
/*h(8663)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8663, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20866)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20866, 4328},
|
|
/*h(25047)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25047, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_737_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8578)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8578, 4324},
|
|
/*h(12759)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12759, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(486)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {486, 4311},
|
|
/*h(29143)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29143, 4309},
|
|
/*h(24962)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24962, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(503)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {503, 4309},
|
|
/*h(24979)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24979, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16887)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {16887, 4309},
|
|
/*h(11719)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {11719, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(418)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {418, 4326},
|
|
/*h(4599)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {4599, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16802)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16802, 4326},
|
|
/*h(15815)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {15815, 4358},
|
|
/*h(20983)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {20983, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4514)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4514, 4328},
|
|
/*h(8695)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {8695, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1003_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20898)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20898, 4328},
|
|
/*h(25079)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {25079, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8610)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8610, 4324},
|
|
/*h(12791)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {12791, 4309}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29175)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {29175, 4309},
|
|
/*h(24994)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24994, 4324},
|
|
/*h(1505)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1505, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8640)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8640;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1015_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25024)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25024;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_879_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8672)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8672;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_683_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25056)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25056, 4310},
|
|
/*h(20875)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20875, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8648)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8648, 4310},
|
|
/*h(9635)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9635, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_932_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25032)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25032, 4310},
|
|
/*h(26019)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26019, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_796_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8680)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8680;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_600_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26051)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26051, 6125},
|
|
/*h(20883)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20883, 4328},
|
|
/*h(25064)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25064, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1044_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8656)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8656, 4310},
|
|
/*h(9643)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9643, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_849_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25040)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25040, 4310},
|
|
/*h(26027)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26027, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_713_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8688)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8688;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25072)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25072;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8642)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25026)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8674)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8674, 4310},
|
|
/*h(4493)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4493, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1035_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25058)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25058, 4310},
|
|
/*h(20877)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20877, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1479_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8650)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8650, 4310},
|
|
/*h(7663)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {7663, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25034)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25034, 4310},
|
|
/*h(26021)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26021, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8682)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8682, 4310},
|
|
/*h(4501)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4501, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_952_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25066)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25066, 4310},
|
|
/*h(20885)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20885, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8658)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8658, 4310},
|
|
/*h(3490)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3490, 4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25042)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25042;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1064_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3522)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3522, 4360},
|
|
/*h(8690)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8690, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_869_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25074)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25074;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_642_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8641)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25025)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4492)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4492, 4327},
|
|
/*h(8673)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8673, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20876)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20876, 4327},
|
|
/*h(25057)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25057, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8649)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8649;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25033)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25033;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4500)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4500, 4327},
|
|
/*h(8681)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8681, 4310},
|
|
/*h(9668)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9668, 6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20884)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20884, 4327},
|
|
/*h(25065)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25065, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8657)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8657;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25041)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25041;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9676)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9676, 6123},
|
|
/*h(8689)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8689, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26060)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26060, 6123},
|
|
/*h(25073)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25073, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_993_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8643)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8643;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_798_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25027)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25027;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_661_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4494)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4494, 4327},
|
|
/*h(8675)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8675, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_466_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20878)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20878, 4327},
|
|
/*h(25059)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25059, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_910_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9638)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9638, 6137},
|
|
/*h(8651)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8651, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_715_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25035)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25035;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_579_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8683)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8683;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20886)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20886, 4327},
|
|
/*h(25067)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25067, 4310},
|
|
/*h(26054)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26054, 6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_827_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9646)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9646, 6137},
|
|
/*h(8659)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8659, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25043)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25043;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8691)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8691;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26062)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26062, 6123},
|
|
/*h(25075)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25075, 4310}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29109)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29109, 4323},
|
|
/*h(5620)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5620, 6121},
|
|
/*h(452)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {452, 4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16836)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16836, 4311},
|
|
/*h(22004)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {22004, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1484_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16868)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(460)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {460, 4311},
|
|
/*h(1447)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1447, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16844)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16844, 4311},
|
|
/*h(17831)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17831, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(492)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {492, 4311},
|
|
/*h(24968)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24968, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1401_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16876)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16876;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16852)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16852, 4311},
|
|
/*h(17839)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17839, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16884)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16884;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_874_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(454)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {454, 4311},
|
|
/*h(29111)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29111, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_678_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17825)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17825, 6134},
|
|
/*h(22006)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {22006, 6121},
|
|
/*h(16838)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16838, 4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16870)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_791_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(462)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16846)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(494)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {494, 4311},
|
|
/*h(24970)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24970, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16878)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16854)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16854, 4311},
|
|
/*h(11686)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {11686, 4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11718)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {11718, 4356},
|
|
/*h(16886)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16886, 4311}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(448)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16832)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_976_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_781_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16864)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16864;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(456)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1030_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16840)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_893_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(488)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {488, 4312},
|
|
/*h(24964)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24964, 4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_698_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16872)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(464)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 464;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_947_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16848)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16848;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_810_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24972)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24972, 4322},
|
|
/*h(496)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {496, 4312},
|
|
/*h(1483)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1483, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_615_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16880)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16880;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {450, 4312},
|
|
/*h(5618)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5618, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1464_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11666)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {11666, 4361},
|
|
/*h(16834)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16834, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(482)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 482;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16866)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16866, 4312},
|
|
/*h(12685)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12685, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(458)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16842)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(490)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {490, 4312},
|
|
/*h(24966)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24966, 4322},
|
|
/*h(1477)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1477, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1049_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17861)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {17861, 6124},
|
|
/*h(12693)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12693, 4323},
|
|
/*h(16874)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16874, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(466)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {466, 4312},
|
|
/*h(1453)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1453, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16850)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1162_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(498)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_966_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16882)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16882, 4312},
|
|
/*h(17869)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {17869, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_739_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30093)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30093, 6138},
|
|
/*h(5617)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5617, 6122},
|
|
/*h(449)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {449, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16833)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16833, 4312},
|
|
/*h(22001)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {22001, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(481)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 481;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16865)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16865;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(457)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 457;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17828)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17828, 6133},
|
|
/*h(16841)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16841, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(489)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {489, 4312},
|
|
/*h(24965)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24965, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16873)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(465)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 465;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17836)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17836, 6133},
|
|
/*h(16849)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16849, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(497)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {497, 4312},
|
|
/*h(24973)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24973, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16881)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16881;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1091_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(451)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 451;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_896_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16835)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_759_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(483)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 483;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_564_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16867)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16867;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1008_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(459)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 459;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_813_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16843)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(491)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {491, 4312},
|
|
/*h(24967)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24967, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16875)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_925_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(467)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 467;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_730_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16851)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16851;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_593_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24975)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24975, 4323},
|
|
/*h(499)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {499, 4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16883)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4312}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16883;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4548)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1022_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26100)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26100, 6123},
|
|
/*h(20932)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20932, 4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_886_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4580)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4580, 4313},
|
|
/*h(399)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {399, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20964)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20964, 4313},
|
|
/*h(16783)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16783, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4556)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4556;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_940_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20940)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20940;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_803_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4588)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4588, 4313},
|
|
/*h(407)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {407, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20972)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20972, 4313},
|
|
/*h(16791)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16791, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1052_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4564)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4564;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_857_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20948)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20948;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_720_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4596)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20980)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20980;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4550)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20934)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20934, 4313},
|
|
/*h(15766)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {15766, 4357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4582)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4582, 4313},
|
|
/*h(401)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {401, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1042_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20966)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20966, 4313},
|
|
/*h(16785)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16785, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4558)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20942)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4590)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4590, 4313},
|
|
/*h(5577)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5577, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_959_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20974)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4313}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4566)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4566, 4313},
|
|
/*h(385)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {385, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20950)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20950, 4313},
|
|
/*h(15782)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15782, 4356},
|
|
/*h(16769)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16769, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1071_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4598)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4598, 4313},
|
|
/*h(5585)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5585, 6122},
|
|
/*h(417)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {417, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_876_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20982)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20982, 4313},
|
|
/*h(16801)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16801, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4544)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4544;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20928)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4576)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4576, 4314},
|
|
/*h(395)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {395, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20960)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20960, 4314},
|
|
/*h(16779)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16779, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4552)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4552;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20936)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20936;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5571)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5571, 6122},
|
|
/*h(403)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {403, 4326},
|
|
/*h(4584)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4584, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21955)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21955, 6122},
|
|
/*h(20968)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20968, 4314},
|
|
/*h(16787)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16787, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4560)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4560;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20944)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20944;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_17_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4592)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4592, 4314},
|
|
/*h(5579)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5579, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20976)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20976, 4314},
|
|
/*h(21963)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21963, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_866_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9714)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9714, 6125},
|
|
/*h(4546)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4546, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_671_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20930)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20930, 4314},
|
|
/*h(26098)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26098, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4578)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20962)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20962, 4314},
|
|
/*h(16781)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16781, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_783_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4554)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4554, 4314},
|
|
/*h(5541)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5541, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_588_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20938)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20938, 4314},
|
|
/*h(21925)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21925, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4586)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4586, 4314},
|
|
/*h(405)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {405, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20970)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_700_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4562)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4562, 4314},
|
|
/*h(5549)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5549, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20946)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20946, 4314},
|
|
/*h(21933)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21933, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4594)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15810)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15810, 4360},
|
|
/*h(20978)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20978, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3558)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3558, 4356},
|
|
/*h(4545)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4545, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20929)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(396)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {396, 4325},
|
|
/*h(4577)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4577, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_908_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16780)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16780, 4325},
|
|
/*h(20961)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20961, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3566)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3566, 4356},
|
|
/*h(4553)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4553, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20937)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20937;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1020_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29061)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29061, 4323},
|
|
/*h(4585)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4585, 4314},
|
|
/*h(404)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {404, 4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_825_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16788)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16788, 4325},
|
|
/*h(20969)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20969, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4561)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4561;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1074_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20945)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20945;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_937_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4593)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4593, 4314},
|
|
/*h(29069)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29069, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_742_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20977)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20977;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4547)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4547;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20931)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20931;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(398)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {398, 4325},
|
|
/*h(4579)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4579, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16782)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16782, 4325},
|
|
/*h(20963)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20963, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4555)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4555;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20939)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20939;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(29063)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29063, 4323},
|
|
/*h(4587)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4587, 4314},
|
|
/*h(5574)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5574, 6121},
|
|
/*h(406)=3 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {406, 4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16790)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16790, 4325},
|
|
/*h(20971)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20971, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4563)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4563;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20947)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20947;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4595)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4595, 4314},
|
|
/*h(29071)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29071, 4323},
|
|
/*h(5582)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5582, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1093_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21966)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21966, 6121},
|
|
/*h(20979)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20979, 4314}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1088_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8580)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8580;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_756_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8612)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8612;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_561_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24996)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24996, 4322},
|
|
/*h(1507)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1507, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1005_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8588)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8588;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_674_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8620)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1515)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1515, 6120},
|
|
/*h(25004)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25004, 4322},
|
|
/*h(25991)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25991, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((10*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_922_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8596)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_727_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24980)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24980, 4322},
|
|
/*h(1491)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1491, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8628)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8628;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25012)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25012, 4322},
|
|
/*h(25999)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25999, 6138},
|
|
/*h(1523)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1523, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8582)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8614)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_913_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24998)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8590)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24974)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24974, 4322},
|
|
/*h(1485)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1485, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1025_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8622)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_830_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25006)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8598)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1078_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24982)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24982, 4322},
|
|
/*h(1493)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1493, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_942_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3462)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3462, 4356},
|
|
/*h(8630)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8630, 4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_747_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25014)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4322}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25014;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(389)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {389, 4323},
|
|
/*h(5557)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5557, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16773)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16773, 4323},
|
|
/*h(21941)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21941, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3498)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3498, 4360},
|
|
/*h(4485)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4485, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26037)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26037, 6138},
|
|
/*h(20869)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20869, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_520_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7594)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7594, 4360},
|
|
/*h(8581)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8581, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12677)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12677;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(421)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 421;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15818)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15818, 4360},
|
|
/*h(16805)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16805, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_981_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4517)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_786_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20901)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8613)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8613, 4323},
|
|
/*h(13781)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13781, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24997)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_883_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17877)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {17877, 6124},
|
|
/*h(12709)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12709, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_688_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(436)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 4325},
|
|
/*h(1423)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1423, 6138},
|
|
/*h(29093)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29093, 4323},
|
|
/*h(5604)=3 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5604, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(397)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 397;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8589)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(429)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15826)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {15826, 4364},
|
|
/*h(16813)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16813, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_898_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4525)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4525;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_703_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20909)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8621)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8621;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1516)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1516, 6119},
|
|
/*h(25005)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25005, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_800_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12717)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12717;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_605_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1431)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1431, 6138},
|
|
/*h(29101)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29101, 4323},
|
|
/*h(5612)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5612, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21957)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {21957, 6124},
|
|
/*h(16789)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16789, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8597)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24981)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_854_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(420)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {420, 4325},
|
|
/*h(29077)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29077, 4323},
|
|
/*h(5588)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5588, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(437)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 437;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16821)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_815_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4533)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4533, 4323},
|
|
/*h(9701)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9701, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_620_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20917)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20917;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9616)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9616, 6139},
|
|
/*h(13797)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13797, 6124},
|
|
/*h(8629)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8629, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1524)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1524, 6119},
|
|
/*h(30181)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30181, 6124},
|
|
/*h(25013)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25013, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_717_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12725)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12725, 4323},
|
|
/*h(17893)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {17893, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_969_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(391)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 391;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_773_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16775)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16775, 4323},
|
|
/*h(21943)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21943, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4487)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20871)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_871_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8583)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8583, 4323},
|
|
/*h(13751)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13751, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17847)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17847, 6138},
|
|
/*h(12679)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12679, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16807)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9687)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9687, 6124},
|
|
/*h(4519)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4519, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20903)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20903, 4323},
|
|
/*h(26071)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26071, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_539_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(13783)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13783, 6124},
|
|
/*h(9602)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9602, 6139},
|
|
/*h(8615)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8615, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(1510)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1510, 6119},
|
|
/*h(30167)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30167, 6124},
|
|
/*h(24999)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24999, 4323},
|
|
/*h(25986)=3 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25986, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12711)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1039_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(29095)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29095, 4323},
|
|
/*h(438)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 4325},
|
|
/*h(5606)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5606, 6121},
|
|
/*h(1425)=3 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1425, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_788_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8591)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12687)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_554_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(431)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 431;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_359_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16815)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5514)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5514, 6136},
|
|
/*h(4527)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4527, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1054_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20911)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9610)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9610, 6139},
|
|
/*h(8623)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8623, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25007)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25007, 4323},
|
|
/*h(25994)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25994, 6139},
|
|
/*h(1518)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1518, 6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12719)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_957_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29103)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29103;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_705_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13767)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13767, 6124},
|
|
/*h(8599)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8599, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1494)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1494, 6119},
|
|
/*h(30151)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30151, 6124},
|
|
/*h(24983)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {24983, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12695)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12695, 4323},
|
|
/*h(17863)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {17863, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(5590)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5590, 6121},
|
|
/*h(422)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {422, 4325},
|
|
/*h(1409)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1409, 6134},
|
|
/*h(29079)=3 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {29079, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5607)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5607, 6124},
|
|
/*h(439)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {439, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11655)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {11655, 4358},
|
|
/*h(16823)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {16823, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5522)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5522, 6136},
|
|
/*h(4535)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {4535, 4323},
|
|
/*h(9703)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9703, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_971_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21906)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21906, 6136},
|
|
/*h(26087)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26087, 6124},
|
|
/*h(20919)=2 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {20919, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8631)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {8631, 4323},
|
|
/*h(3463)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3463, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(25015)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25015, 4323},
|
|
/*h(1526)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1526, 6119},
|
|
/*h(26002)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26002, 6139},
|
|
/*h(30183)=3 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30183, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1069_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7559)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {7559, 4358},
|
|
/*h(12727)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {12727, 4323}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24960)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8584)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8584;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8616)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8616;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25000)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8624)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8624;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25008)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25008;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8586)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8618)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8618, 4324},
|
|
/*h(9605)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9605, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25002)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25002, 4324},
|
|
/*h(1513)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1513, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8626)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8626, 4324},
|
|
/*h(9613)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9613, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25010)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25010, 4324},
|
|
/*h(1521)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1521, 6120},
|
|
/*h(25997)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {25997, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8577)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8577;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_974_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7622)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7622, 4356},
|
|
/*h(8609)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8609, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_778_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1504)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1504, 6120},
|
|
/*h(24993)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24993, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8585)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8585;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_891_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7630)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7630, 4356},
|
|
/*h(8617)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8617, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_696_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25001)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25001;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8593)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8593;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_808_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7638)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {7638, 4362},
|
|
/*h(8625)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8625, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25009)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25009;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8579)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8579;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1474)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1474, 6120},
|
|
/*h(24963)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24963, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8611)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24995)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8587)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8587;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1482)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1482, 6120},
|
|
/*h(24971)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24971, 4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8619)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1047_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25003)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8595)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8595;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8627)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8627;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_964_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25011)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4324}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25011;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1186_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(388)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 388;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_991_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16772)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16772;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_659_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16804)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_771_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(428)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 428;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_576_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16812)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16812;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16820)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16820, 4325},
|
|
/*h(21988)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21988, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(390)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 390;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16774)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1010_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16806)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16806, 4325},
|
|
/*h(21974)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21974, 6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {430, 4325},
|
|
/*h(1417)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1417, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_927_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16814)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16814, 4325},
|
|
/*h(17801)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17801, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_844_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21990)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21990, 6121},
|
|
/*h(16822)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16822, 4325},
|
|
/*h(17809)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17809, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(416)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {416, 4326},
|
|
/*h(5584)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5584, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16800)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16800, 4326},
|
|
/*h(21968)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21968, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(392)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 392;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16776)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16776;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(424)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16808)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16808, 4326},
|
|
/*h(17795)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17795, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(432)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 432;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16816)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16816;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_834_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(386)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {386, 4326},
|
|
/*h(5554)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5554, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_752_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(394)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 394;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_556_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16778)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(426)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 426;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16810)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16810, 4326},
|
|
/*h(15823)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {15823, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21954)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21954, 6122},
|
|
/*h(16786)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16786, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(434)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 434;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(11650)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11650, 4360},
|
|
/*h(15831)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15831, 4363},
|
|
/*h(16818)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16818, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(393)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 393;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15790)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15790, 4356},
|
|
/*h(16777)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16777, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_988_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1412)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1412, 6133},
|
|
/*h(425)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {425, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_793_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16809)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16809;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_905_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1420)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1420, 6133},
|
|
/*h(5601)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5601, 6122},
|
|
/*h(433)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {433, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_710_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16817)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16817, 4326},
|
|
/*h(21985)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21985, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(387)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {387, 4326},
|
|
/*h(5555)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5555, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16771)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16771;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(419)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {419, 4326},
|
|
/*h(5587)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5587, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16803)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16803, 4326},
|
|
/*h(21971)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21971, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1414)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1414, 6133},
|
|
/*h(427)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {427, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17798)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17798, 6133},
|
|
/*h(16811)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16811, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(435)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 435;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1061_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17806)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17806, 6133},
|
|
/*h(21987)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21987, 6122},
|
|
/*h(16819)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16819, 4326}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4484)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4484;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20868)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9684)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9684, 6123},
|
|
/*h(4516)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4516, 4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20900)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20900, 4327},
|
|
/*h(26068)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26068, 6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1466_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4524)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4524, 4327},
|
|
/*h(5511)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5511, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20908)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20908, 4327},
|
|
/*h(21895)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21895, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9700)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9700, 6123},
|
|
/*h(4532)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4532, 4327},
|
|
/*h(5519)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5519, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20916)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20916, 4327},
|
|
/*h(21903)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21903, 6138},
|
|
/*h(26084)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26084, 6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_744_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9654)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9654, 6137},
|
|
/*h(4486)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4486, 4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_549_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20870)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20870, 4327},
|
|
/*h(26038)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26038, 6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4518)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26070)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26070, 6123},
|
|
/*h(20902)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20902, 4327},
|
|
/*h(21889)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21889, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4526)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20910)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20910, 4327},
|
|
/*h(21897)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21897, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4502)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4502, 4327},
|
|
/*h(9670)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9670, 6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4534)=0 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4534;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15750)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15750, 4356},
|
|
/*h(20918)=1 EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20918, 4327}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9648)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9648, 6139},
|
|
/*h(4480)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4480, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1095_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4488)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_900_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20872)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_764_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4520)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4520;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_569_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20904)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_817_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20880)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20880, 4328},
|
|
/*h(26048)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26048, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4528)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4528;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20912)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20912;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4490)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4490, 4328},
|
|
/*h(3503)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {3503, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20874)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4522)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4522;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_920_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20906)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1032_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4530)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4530, 4328},
|
|
/*h(9698)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9698, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_837_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20914)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20914;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4489)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20873)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5508)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5508, 6135},
|
|
/*h(4521)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4521, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21892)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21892, 6135},
|
|
/*h(20905)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20905, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5516)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5516, 6135},
|
|
/*h(9697)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9697, 6125},
|
|
/*h(4529)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4529, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21900)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21900, 6135},
|
|
/*h(26081)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26081, 6125},
|
|
/*h(20913)=2 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20913, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_961_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9651)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9651, 6139},
|
|
/*h(4483)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4483, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_766_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20867)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20867, 4328},
|
|
/*h(26035)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26035, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4515)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4515;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26067)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26067, 6125},
|
|
/*h(20899)=1 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20899, 4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_878_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4491)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4491;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_547_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4523)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4523;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20907)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_795_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4499)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4499, 4328},
|
|
/*h(9667)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9667, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_464_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4531)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4531;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20915)=0 EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4328}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20915;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2438)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2438, 4338},
|
|
/*h(1451)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1451, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6534)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6534, 4338},
|
|
/*h(5547)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5547, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1043_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10630)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10630;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14726)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2502)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6598)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5526)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5526, 6135},
|
|
/*h(9707)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9707, 6125},
|
|
/*h(10694)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10694, 4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1075_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14790)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {14790, 4338},
|
|
/*h(9622)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9622, 6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_809_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2470)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6566)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6566, 4338},
|
|
/*h(11734)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {11734, 4362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_711_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10662)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10662, 4338},
|
|
/*h(15830)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {15830, 4362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14758)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2534)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2534, 4338},
|
|
/*h(26023)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26023, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_841_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(6630)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6630, 4338},
|
|
/*h(1462)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1462, 6133},
|
|
/*h(30119)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30119, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5558)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5558, 6135},
|
|
/*h(10726)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10726, 4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_743_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14822)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1058_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2446)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2446, 4338},
|
|
/*h(1459)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1459, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6542)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_960_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10638)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14734)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2510)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1090_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5619)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5619, 6122},
|
|
/*h(30095)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30095, 6138},
|
|
/*h(6606)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6606, 4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10702)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10702, 4338},
|
|
/*h(9715)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9715, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_992_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14798)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_726_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2478)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6574)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10670)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14766)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2542)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2542, 4338},
|
|
/*h(26031)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {26031, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_758_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6638)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6638, 4338},
|
|
/*h(30127)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30127, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10734)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14830)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4338}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_975_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2454)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4339}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6550)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4339}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_877_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10646)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {10646, 4339},
|
|
/*h(15814)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15814, 4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14742)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4339}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14742;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2439)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6535)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_475_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9644)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9644, 6137},
|
|
/*h(10631)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {10631, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14727)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25992)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25992, 6139},
|
|
/*h(2503)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2503, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_604_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6599)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6599;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1299_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11682)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11682, 4360},
|
|
/*h(10695)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {10695, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_507_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9623)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9623, 6138},
|
|
/*h(14791)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {14791, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1484)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1484, 6119},
|
|
/*h(2471)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2471, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_936_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5580)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5580, 6121},
|
|
/*h(6567)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {6567, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10663)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_838_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15746)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15746, 4360},
|
|
/*h(14759)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {14759, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1065_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2535)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2450)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2450, 4343},
|
|
/*h(6631)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {6631, 4340},
|
|
/*h(7618)=2 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7618, 4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_968_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5559)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5559, 6138},
|
|
/*h(10727)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {10727, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10642)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {10642, 4343},
|
|
/*h(9655)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9655, 6138},
|
|
/*h(14823)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {14823, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2447)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2447;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5556)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5556, 6135},
|
|
/*h(6543)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {6543, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9652)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9652, 6137},
|
|
/*h(10639)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {10639, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1087_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14735)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26000)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26000, 6139},
|
|
/*h(2511)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2511, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6607)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6607;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11690)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11690, 4360},
|
|
/*h(10703)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {10703, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14799)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2479)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2479, 4340},
|
|
/*h(30149)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30149, 6124},
|
|
/*h(1492)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1492, 6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_853_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6575)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10671)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_755_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15754)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15754, 4360},
|
|
/*h(14767)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {14767, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_982_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3530)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3530, 4360},
|
|
/*h(2543)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {2543, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7626)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7626, 4360},
|
|
/*h(6639)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {6639, 4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_885_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10735)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14831)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4340}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_406_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7623)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {7623, 4358},
|
|
/*h(2455)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 4341}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6551)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4341}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10647)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4341}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1004_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14743)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4341}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2434)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2434, 4342},
|
|
/*h(6615)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {6615, 4345}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6530)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6530, 4342},
|
|
/*h(10711)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {10711, 4345}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10626)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1036_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14722)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14722, 4342},
|
|
/*h(13735)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13735, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25987)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25987, 6139},
|
|
/*h(1511)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1511, 6124},
|
|
/*h(2498)=2 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2498, 4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6594)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6594, 4342},
|
|
/*h(1426)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1426, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10690)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14786)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2466)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2466, 4342},
|
|
/*h(7634)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {7634, 4364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_802_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6562)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6562, 4342},
|
|
/*h(5575)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5575, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10658)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {10658, 4342},
|
|
/*h(9671)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9671, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_704_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14754)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_931_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2530)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2530;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6626)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_833_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10722)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9650)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9650, 6139},
|
|
/*h(14818)=1 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14818, 4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_355_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2442)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1050_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6538)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_258_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10634)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {10634, 4342},
|
|
/*h(9647)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9647, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_953_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14730)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14730, 4342},
|
|
/*h(13743)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13743, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2506)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2506, 4342},
|
|
/*h(1519)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1519, 6124},
|
|
/*h(25995)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25995, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6602)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1082_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10698)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10698;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14794)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2474)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_719_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6570)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6570, 4342},
|
|
/*h(5583)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5583, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10666)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_621_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14762)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_848_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2538)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6634)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6634;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_750_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10730)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14826)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4342}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_967_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6546)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {6546, 4343},
|
|
/*h(11714)=1 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11714, 4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_870_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14738)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4343}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_311_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2518)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4344}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1007_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1446)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1446, 6133},
|
|
/*h(30103)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30103, 6138},
|
|
/*h(6614)=2 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {6614, 4344}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10710)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {10710, 4344},
|
|
/*h(5542)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5542, 6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_909_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14806)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4344}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14806;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1231_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2519)=0 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4345}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2519;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9639)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {9639, 6138},
|
|
/*h(14807)=1 EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {14807, 4345}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1097_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1527)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1527, 6124},
|
|
/*h(2514)=1 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2514, 4346},
|
|
/*h(26003)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26003, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_304_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6610)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4346}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6610;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_999_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10706)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4346}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14802)=0 EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4346}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7558)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_845_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11654)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3526)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_611_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3494)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7590)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_643_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7654)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11750)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15846)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_859_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3470)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7566)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7566;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_762_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11662)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15758)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3534)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3534;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11726)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_794_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15822)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_528_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3502)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7598)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11694)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7662)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11758)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15854)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4356}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15854;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_777_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3478)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7574)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_679_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11670)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4357}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_972_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15751)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3527)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3527;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_738_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7591)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11687)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15783)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_867_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3559)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3559;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3474)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3474, 4361},
|
|
/*h(7655)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {7655, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_769_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7570)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {7570, 4361},
|
|
/*h(11751)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {11751, 4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1465_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15847)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15847;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3471)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3471;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_986_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7567)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11663)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_889_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15759)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3535)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7631)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7631;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1018_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11727)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7599)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7599;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1350_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11695)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_557_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15791)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_784_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3567)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_686_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11759)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15855)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() not64 NOEVSR ZEROING=0 MASK=0*/ {4358}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15855;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11671)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_806_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15767)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4359}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15767;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3458)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3458, 4360},
|
|
/*h(7639)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7639, 4363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_935_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7554)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7554, 4360},
|
|
/*h(11735)=1 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11735, 4363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7586)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_506_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15778)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_733_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3554)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3554;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1428_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7650)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7650;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11746)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15842)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3466)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_852_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7562)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11658)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11658;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_884_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11722)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15786)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_650_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3562)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7658)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7658;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15850)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4360}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_672_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15762)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4361}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3542)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4362}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1033_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3543)=0 EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4363}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_899_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3538)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_801_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11730)=0 EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4364}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1476)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1476, 6119},
|
|
/*h(30133)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30133, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17860)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17860;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30165)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30165, 6124},
|
|
/*h(25984)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25984, 6139},
|
|
/*h(1508)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1508, 6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17892)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {17892, 6119},
|
|
/*h(13711)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13711, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17868)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17900)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {17900, 6119},
|
|
/*h(13719)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13719, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17876)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17876;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17908)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_675_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1478)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1478, 6119},
|
|
/*h(30135)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30135, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17862)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17894)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_592_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1486)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1486;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17870)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17902)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17878)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17910)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6119}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_914_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17856)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17856;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17888)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17888;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_695_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1512)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1512, 6120},
|
|
/*h(25988)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25988, 6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17896)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_612_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1520)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1520, 6120},
|
|
/*h(25996)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25996, 6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17904)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1506)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_934_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17890)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17890, 6120},
|
|
/*h(13709)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13709, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1046_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1514)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1514, 6120},
|
|
/*h(25990)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25990, 6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_851_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17898)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17898, 6120},
|
|
/*h(13717)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {13717, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1490)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1490;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17874)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_963_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25998)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25998, 6137},
|
|
/*h(1522)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1522, 6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_768_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17906)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_541_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1473)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1473;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_346_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17857)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17857;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17889)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17889;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1481)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1481;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17865)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17865;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17897)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1489)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17873)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17905)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17905;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_892_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1475)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1475;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_697_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17859)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17859;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17891)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17867)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17867;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17899)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17899;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17875)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17907)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6120}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1019_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5572)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5572;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_824_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21956)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21956;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_741_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21964)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21964;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21996)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_658_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21972)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21972;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21958)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_956_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5614)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_761_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21998)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6121}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_873_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5622)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5622, 6121},
|
|
/*h(1441)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1441, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5600)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5600, 6122},
|
|
/*h(1419)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1419, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21984)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21984, 6122},
|
|
/*h(17803)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17803, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5576)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5576;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5608)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5608, 6122},
|
|
/*h(1427)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1427, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21992)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21992, 6122},
|
|
/*h(17811)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17811, 6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5616)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5616;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22000)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_668_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5570)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5570;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_336_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5602)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5602, 6122},
|
|
/*h(1421)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1421, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21986)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21986, 6122},
|
|
/*h(17805)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17805, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5578)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21962)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_253_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5610)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5610, 6122},
|
|
/*h(1429)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {1429, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21994)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21994, 6122},
|
|
/*h(17813)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {17813, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5586)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21970)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22002)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5569)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5569;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1041_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21953)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21953;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_958_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21961)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21961;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_822_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1428)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1428, 6133},
|
|
/*h(30085)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30085, 6138},
|
|
/*h(5609)=2 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5609, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_627_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17812)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17812, 6133},
|
|
/*h(21993)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21993, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_875_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21969)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21969;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1422)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1422, 6133},
|
|
/*h(5603)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5603, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30087)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30087, 6138},
|
|
/*h(5611)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5611, 6122},
|
|
/*h(1430)=2 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1430, 6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_978_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17814)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17814, 6133},
|
|
/*h(21995)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21995, 6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_895_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22003)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6122}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26052)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26052;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9708)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9708, 6123},
|
|
/*h(5527)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5527, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26092)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26092, 6123},
|
|
/*h(21911)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21911, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9716)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9716;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9702)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9702, 6123},
|
|
/*h(5521)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5521, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26086)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26086, 6123},
|
|
/*h(21905)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21905, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9678)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9710)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9710;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26094)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6123}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26094;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9686)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9686, 6123},
|
|
/*h(5505)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5505, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9718)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9718, 6123},
|
|
/*h(5537)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5537, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26102)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26102, 6123},
|
|
/*h(21921)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21921, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5573)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5573;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9669)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9669;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_951_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26053)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26053;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13765)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13765;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_912_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1509)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1509, 6124},
|
|
/*h(25985)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25985, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1424)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1424, 6134},
|
|
/*h(5605)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5605, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17808)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17808, 6134},
|
|
/*h(21989)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {21989, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21904)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21904, 6136},
|
|
/*h(26085)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26085, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5581)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5581;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21965)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21965;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1063_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9677)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9677;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_868_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26061)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26061;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13773)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13773;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30157)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30157;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_829_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1517)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1517, 6124},
|
|
/*h(25993)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25993, 6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_634_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17901)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5613)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5613;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21997)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_732_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9709)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9709;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26093)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26093;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13805)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13805;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30189)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30189;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1408)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1408, 6134},
|
|
/*h(5589)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5589, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17792)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17792, 6134},
|
|
/*h(21973)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {21973, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_980_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5504)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5504, 6136},
|
|
/*h(9685)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {9685, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_785_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21888)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21888, 6136},
|
|
/*h(26069)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {26069, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_746_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26001)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26001, 6139},
|
|
/*h(1525)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {1525, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17909)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1440)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1440, 6134},
|
|
/*h(5621)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5621, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17824)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17824, 6134},
|
|
/*h(22005)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {22005, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1479)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1479;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_607_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21959)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26055)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26055;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1068_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17895)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17810)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17810, 6134},
|
|
/*h(21991)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {21991, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9618)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9618, 6139},
|
|
/*h(13799)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13799, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1487)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17871)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_524_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21967)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1219_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26063)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26063;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_622_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13775)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13775;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30159)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30159;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_985_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17903)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5615)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5615;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21999)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1083_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9711)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_888_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26095)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26095;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13807)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30191)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30191;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1429_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1495)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17879)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17879;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_636_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1410)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1410, 6134},
|
|
/*h(5591)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {5591, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17794)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17794, 6134},
|
|
/*h(21975)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {21975, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_902_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17911)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9634)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9634, 6139},
|
|
/*h(13815)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {13815, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26018)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26018, 6139},
|
|
/*h(30199)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {30199, 6124}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1012_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9664)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9664;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9696)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9696, 6125},
|
|
/*h(5515)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5515, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26080)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26080, 6125},
|
|
/*h(21899)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21899, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_929_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9672)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9672;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_734_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26056)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26056;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_597_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9704)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9704, 6125},
|
|
/*h(5523)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5523, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26088)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26088, 6125},
|
|
/*h(21907)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21907, 6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_846_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9680)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9680;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26064)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26064;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_514_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9712)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26096)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26096;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9666)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26050)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26050;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_836_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26082)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26082, 6125},
|
|
/*h(21901)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {21901, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9674)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9674;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1085_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26058)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26058;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_949_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9706)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9706, 6125},
|
|
/*h(5525)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {5525, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_754_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26090)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26090;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9682)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1002_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26066)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5524)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5524, 6135},
|
|
/*h(9705)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9705, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21908)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21908, 6135},
|
|
/*h(26089)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26089, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9713)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9713;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26097)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26097;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5518)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5518, 6135},
|
|
/*h(9699)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9699, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21902)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21902, 6135},
|
|
/*h(26083)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26083, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_712_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9675)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9675;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_517_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26059)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26059;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21910)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21910, 6135},
|
|
/*h(26091)=1 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26091, 6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_629_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9683)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9683;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26099)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6125}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26099;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_792_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17796)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17796;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_656_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1444)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1444, 6133},
|
|
/*h(30101)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30101, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_709_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17804)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_573_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1452)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1452;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1460)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1460, 6133},
|
|
/*h(30117)=1 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {30117, 6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17844)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17844;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_812_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17830)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_924_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1454)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_729_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17838)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17846)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6133}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1416)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1416;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17800)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1448)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17832)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1456)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1080_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17840)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17826)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_553_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1418)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1418;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17802)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1009_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17793)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17793;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_790_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1449)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1449;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_595_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17833)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17833;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_707_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1457)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1457;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17841)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17841;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1411)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1411;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1443)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1443;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1029_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17827)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17827;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_946_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17835)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_863_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17843)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6134}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5540)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5540;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21924)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5548)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1073_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21932)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_990_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21940)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21940;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_546_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5510)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21894)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21926)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5550)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21934)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21942)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6135}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21920)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21920;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_897_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5512)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_702_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21896)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21928)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_814_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5520)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5520;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1331_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5506)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21890)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1053_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21898)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_917_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5546)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5546;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5513)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5513;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5545)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5545;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21929)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5553)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5553;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21937)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21937;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_763_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5507)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_568_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21891)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_431_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5539)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21923)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21923;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21931)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21931;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21939)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6136}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21939;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_890_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9604)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_558_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9636)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9636;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26020)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26020;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_807_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9612)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9612;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26028)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_724_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9620)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26004)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26036)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26036;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9606)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_714_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26022)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9614)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_631_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26030)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_880_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26006)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6137}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1413)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1413;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17797)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17797;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5509)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5509;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_919_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21893)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21893;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25989)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25989;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1017_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13701)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13701;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1445)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1445;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17829)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17829;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9637)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9637;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_685_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13733)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13733;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1031_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5517)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17837)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9645)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9645;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26029)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26029;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_602_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13741)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13741;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30125)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30125;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_753_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21909)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9621)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9621;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1449_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26005)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1461)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17845)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17845;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9653)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9653;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13749)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13749;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_770_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1415)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1415;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17799)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9607)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9607;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13703)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5543)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_939_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21927)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17807)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_590_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9615)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9615;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1051_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5551)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_856_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21935)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17815)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26007)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_273_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1463)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1463;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1468_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26039)=0 EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {6138}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26039;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9600)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9600;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9608)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9608;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9642)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26026)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26034)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26034;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9601)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9601;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_775_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9633)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9633;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26017)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26017;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1024_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9609)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9609;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_692_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9641)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_497_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26025)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_941_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9617)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9617;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26033)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26033;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9603)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9603;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9611)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2_1292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9619)=0 EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6139}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x78_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1488] = {
|
|
/*h(21892)=0 */ {21892, xed3_phash_find_mapevex_map1_opcode0x78_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8595)=3 */ {8595, xed3_phash_find_mapevex_map1_opcode0x78_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1453)=5 */ {1453, xed3_phash_find_mapevex_map1_opcode0x78_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17800)=7 */ {17800, xed3_phash_find_mapevex_map1_opcode0x78_vv2_7_l1},
|
|
/*h(15826)=8 */ {15826, xed3_phash_find_mapevex_map1_opcode0x78_vv2_8_l1},
|
|
/*h(9671)=9 */ {9671, xed3_phash_find_mapevex_map1_opcode0x78_vv2_9_l1},
|
|
/*h(4503)=10 */ {4503, xed3_phash_find_mapevex_map1_opcode0x78_vv2_10_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26018)=12 */ {26018, xed3_phash_find_mapevex_map1_opcode0x78_vv2_12_l1},
|
|
/*h(25031)=13 */ {25031, xed3_phash_find_mapevex_map1_opcode0x78_vv2_13_l1},
|
|
/*h(17889)=14 */ {17889, xed3_phash_find_mapevex_map1_opcode0x78_vv2_14_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11734)=16 */ {11734, xed3_phash_find_mapevex_map1_opcode0x78_vv2_16_l1},
|
|
/*h(5579)=17 */ {5579, xed3_phash_find_mapevex_map1_opcode0x78_vv2_17_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21926)=19 */ {21926, xed3_phash_find_mapevex_map1_opcode0x78_vv2_19_l1},
|
|
/*h(20939)=20 */ {20939, xed3_phash_find_mapevex_map1_opcode0x78_vv2_20_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9616)=22 */ {9616, xed3_phash_find_mapevex_map1_opcode0x78_vv2_22_l1},
|
|
/*h(2474)=23 */ {2474, xed3_phash_find_mapevex_map1_opcode0x78_vv2_23_l1},
|
|
/*h(1487)=24 */ {1487, xed3_phash_find_mapevex_map1_opcode0x78_vv2_24_l1},
|
|
/*h(24976)=25 */ {24976, xed3_phash_find_mapevex_map1_opcode0x78_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17834)=27 */ {17834, xed3_phash_find_mapevex_map1_opcode0x78_vv2_27_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5524)=29 */ {5524, xed3_phash_find_mapevex_map1_opcode0x78_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26052)=31 */ {26052, xed3_phash_find_mapevex_map1_opcode0x78_vv2_31_l1},
|
|
/*h(20884)=32 */ {20884, xed3_phash_find_mapevex_map1_opcode0x78_vv2_32_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5613)=36 */ {5613, xed3_phash_find_mapevex_map1_opcode0x78_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21960)=39 */ {21960, xed3_phash_find_mapevex_map1_opcode0x78_vv2_39_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9650)=41 */ {9650, xed3_phash_find_mapevex_map1_opcode0x78_vv2_41_l1},
|
|
/*h(3495)=42 */ {3495, xed3_phash_find_mapevex_map1_opcode0x78_vv2_42_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25997)=44 */ {25997, xed3_phash_find_mapevex_map1_opcode0x78_vv2_44_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17868)=46 */ {17868, xed3_phash_find_mapevex_map1_opcode0x78_vv2_46_l1},
|
|
/*h(16881)=47 */ {16881, xed3_phash_find_mapevex_map1_opcode0x78_vv2_47_l1},
|
|
/*h(5558)=48 */ {5558, xed3_phash_find_mapevex_map1_opcode0x78_vv2_48_l1},
|
|
/*h(390)=49 */ {390, xed3_phash_find_mapevex_map1_opcode0x78_vv2_49_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21905)=51 */ {21905, xed3_phash_find_mapevex_map1_opcode0x78_vv2_51_l1},
|
|
/*h(15750)=52 */ {15750, xed3_phash_find_mapevex_map1_opcode0x78_vv2_52_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8608)=54 */ {8608, xed3_phash_find_mapevex_map1_opcode0x78_vv2_54_l1},
|
|
/*h(6634)=55 */ {6634, xed3_phash_find_mapevex_map1_opcode0x78_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17813)=58 */ {17813, xed3_phash_find_mapevex_map1_opcode0x78_vv2_58_l1},
|
|
/*h(11658)=59 */ {11658, xed3_phash_find_mapevex_map1_opcode0x78_vv2_59_l1},
|
|
/*h(10671)=60 */ {10671, xed3_phash_find_mapevex_map1_opcode0x78_vv2_60_l1},
|
|
/*h(9684)=61 */ {9684, xed3_phash_find_mapevex_map1_opcode0x78_vv2_61_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26031)=63 */ {26031, xed3_phash_find_mapevex_map1_opcode0x78_vv2_63_l1},
|
|
/*h(25044)=64 */ {25044, xed3_phash_find_mapevex_map1_opcode0x78_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17902)=66 */ {17902, xed3_phash_find_mapevex_map1_opcode0x78_vv2_66_l1},
|
|
/*h(7566)=67 */ {7566, xed3_phash_find_mapevex_map1_opcode0x78_vv2_67_l1},
|
|
/*h(1411)=68 */ {1411, xed3_phash_find_mapevex_map1_opcode0x78_vv2_68_l1},
|
|
/*h(424)=69 */ {424, xed3_phash_find_mapevex_map1_opcode0x78_vv2_69_l1},
|
|
/*h(21939)=70 */ {21939, xed3_phash_find_mapevex_map1_opcode0x78_vv2_70_l1},
|
|
/*h(16771)=71 */ {16771, xed3_phash_find_mapevex_map1_opcode0x78_vv2_71_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8642)=73 */ {8642, xed3_phash_find_mapevex_map1_opcode0x78_vv2_73_l1},
|
|
/*h(3474)=74 */ {3474, xed3_phash_find_mapevex_map1_opcode0x78_vv2_74_l1},
|
|
/*h(30157)=75 */ {30157, xed3_phash_find_mapevex_map1_opcode0x78_vv2_75_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17847)=78 */ {17847, xed3_phash_find_mapevex_map1_opcode0x78_vv2_78_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5537)=80 */ {5537, xed3_phash_find_mapevex_map1_opcode0x78_vv2_80_l1},
|
|
/*h(4550)=81 */ {4550, xed3_phash_find_mapevex_map1_opcode0x78_vv2_81_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26065)=83 */ {26065, xed3_phash_find_mapevex_map1_opcode0x78_vv2_83_l1},
|
|
/*h(14742)=84 */ {14742, xed3_phash_find_mapevex_map1_opcode0x78_vv2_84_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8587)=86 */ {8587, xed3_phash_find_mapevex_map1_opcode0x78_vv2_86_l1},
|
|
/*h(1445)=87 */ {1445, xed3_phash_find_mapevex_map1_opcode0x78_vv2_87_l1},
|
|
/*h(458)=88 */ {458, xed3_phash_find_mapevex_map1_opcode0x78_vv2_88_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17792)=90 */ {17792, xed3_phash_find_mapevex_map1_opcode0x78_vv2_90_l1},
|
|
/*h(15818)=91 */ {15818, xed3_phash_find_mapevex_map1_opcode0x78_vv2_91_l1},
|
|
/*h(14831)=92 */ {14831, xed3_phash_find_mapevex_map1_opcode0x78_vv2_92_l1},
|
|
/*h(4495)=93 */ {4495, xed3_phash_find_mapevex_map1_opcode0x78_vv2_93_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30191)=95 */ {30191, xed3_phash_find_mapevex_map1_opcode0x78_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11726)=99 */ {11726, xed3_phash_find_mapevex_map1_opcode0x78_vv2_99_l1},
|
|
/*h(5571)=100 */ {5571, xed3_phash_find_mapevex_map1_opcode0x78_vv2_100_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26099)=102 */ {26099, xed3_phash_find_mapevex_map1_opcode0x78_vv2_102_l1},
|
|
/*h(20931)=103 */ {20931, xed3_phash_find_mapevex_map1_opcode0x78_vv2_103_l1},
|
|
/*h(9608)=104 */ {9608, xed3_phash_find_mapevex_map1_opcode0x78_vv2_104_l1},
|
|
/*h(8621)=105 */ {8621, xed3_phash_find_mapevex_map1_opcode0x78_vv2_105_l1},
|
|
/*h(7634)=106 */ {7634, xed3_phash_find_mapevex_map1_opcode0x78_vv2_106_l1},
|
|
/*h(1479)=107 */ {1479, xed3_phash_find_mapevex_map1_opcode0x78_vv2_107_l1},
|
|
/*h(24968)=108 */ {24968, xed3_phash_find_mapevex_map1_opcode0x78_vv2_108_l1},
|
|
/*h(17826)=109 */ {17826, xed3_phash_find_mapevex_map1_opcode0x78_vv2_109_l1},
|
|
/*h(22007)=110 */ {22007, xed3_phash_find_mapevex_map1_opcode0x78_vv2_110_l1},
|
|
/*h(11671)=111 */ {11671, xed3_phash_find_mapevex_map1_opcode0x78_vv2_111_l1},
|
|
/*h(5516)=112 */ {5516, xed3_phash_find_mapevex_map1_opcode0x78_vv2_112_l1},
|
|
/*h(3542)=113 */ {3542, xed3_phash_find_mapevex_map1_opcode0x78_vv2_113_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20876)=115 */ {20876, xed3_phash_find_mapevex_map1_opcode0x78_vv2_115_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1424)=119 */ {1424, xed3_phash_find_mapevex_map1_opcode0x78_vv2_119_l1},
|
|
/*h(437)=120 */ {437, xed3_phash_find_mapevex_map1_opcode0x78_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21952)=122 */ {21952, xed3_phash_find_mapevex_map1_opcode0x78_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9642)=124 */ {9642, xed3_phash_find_mapevex_map1_opcode0x78_vv2_124_l1},
|
|
/*h(8655)=125 */ {8655, xed3_phash_find_mapevex_map1_opcode0x78_vv2_125_l1},
|
|
/*h(25989)=126 */ {25989, xed3_phash_find_mapevex_map1_opcode0x78_vv2_126_l1},
|
|
/*h(1513)=127 */ {1513, xed3_phash_find_mapevex_map1_opcode0x78_vv2_127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17860)=129 */ {17860, xed3_phash_find_mapevex_map1_opcode0x78_vv2_129_l1},
|
|
/*h(16873)=130 */ {16873, xed3_phash_find_mapevex_map1_opcode0x78_vv2_130_l1},
|
|
/*h(5550)=131 */ {5550, xed3_phash_find_mapevex_map1_opcode0x78_vv2_131_l1},
|
|
/*h(4563)=132 */ {4563, xed3_phash_find_mapevex_map1_opcode0x78_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21897)=134 */ {21897, xed3_phash_find_mapevex_map1_opcode0x78_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12781)=137 */ {12781, xed3_phash_find_mapevex_map1_opcode0x78_vv2_137_l1},
|
|
/*h(6626)=138 */ {6626, xed3_phash_find_mapevex_map1_opcode0x78_vv2_138_l1},
|
|
/*h(1458)=139 */ {1458, xed3_phash_find_mapevex_map1_opcode0x78_vv2_139_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17805)=141 */ {17805, xed3_phash_find_mapevex_map1_opcode0x78_vv2_141_l1},
|
|
/*h(15831)=142 */ {15831, xed3_phash_find_mapevex_map1_opcode0x78_vv2_142_l1},
|
|
/*h(10663)=143 */ {10663, xed3_phash_find_mapevex_map1_opcode0x78_vv2_143_l1},
|
|
/*h(9676)=144 */ {9676, xed3_phash_find_mapevex_map1_opcode0x78_vv2_144_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26023)=146 */ {26023, xed3_phash_find_mapevex_map1_opcode0x78_vv2_146_l1},
|
|
/*h(25036)=147 */ {25036, xed3_phash_find_mapevex_map1_opcode0x78_vv2_147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17894)=149 */ {17894, xed3_phash_find_mapevex_map1_opcode0x78_vv2_149_l1},
|
|
/*h(7558)=150 */ {7558, xed3_phash_find_mapevex_map1_opcode0x78_vv2_150_l1},
|
|
/*h(5584)=151 */ {5584, xed3_phash_find_mapevex_map1_opcode0x78_vv2_151_l1},
|
|
/*h(4597)=152 */ {4597, xed3_phash_find_mapevex_map1_opcode0x78_vv2_152_l1},
|
|
/*h(21931)=153 */ {21931, xed3_phash_find_mapevex_map1_opcode0x78_vv2_153_l1},
|
|
/*h(20944)=154 */ {20944, xed3_phash_find_mapevex_map1_opcode0x78_vv2_154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9621)=156 */ {9621, xed3_phash_find_mapevex_map1_opcode0x78_vv2_156_l1},
|
|
/*h(3466)=157 */ {3466, xed3_phash_find_mapevex_map1_opcode0x78_vv2_157_l1},
|
|
/*h(30149)=158 */ {30149, xed3_phash_find_mapevex_map1_opcode0x78_vv2_158_l1},
|
|
/*h(24981)=159 */ {24981, xed3_phash_find_mapevex_map1_opcode0x78_vv2_159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17839)=161 */ {17839, xed3_phash_find_mapevex_map1_opcode0x78_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9710)=163 */ {9710, xed3_phash_find_mapevex_map1_opcode0x78_vv2_163_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26057)=166 */ {26057, xed3_phash_find_mapevex_map1_opcode0x78_vv2_166_l1},
|
|
/*h(14734)=167 */ {14734, xed3_phash_find_mapevex_map1_opcode0x78_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8579)=169 */ {8579, xed3_phash_find_mapevex_map1_opcode0x78_vv2_169_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5618)=171 */ {5618, xed3_phash_find_mapevex_map1_opcode0x78_vv2_171_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21965)=173 */ {21965, xed3_phash_find_mapevex_map1_opcode0x78_vv2_173_l1},
|
|
/*h(15810)=174 */ {15810, xed3_phash_find_mapevex_map1_opcode0x78_vv2_174_l1},
|
|
/*h(9655)=175 */ {9655, xed3_phash_find_mapevex_map1_opcode0x78_vv2_175_l1},
|
|
/*h(4487)=176 */ {4487, xed3_phash_find_mapevex_map1_opcode0x78_vv2_176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26002)=178 */ {26002, xed3_phash_find_mapevex_map1_opcode0x78_vv2_178_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17873)=180 */ {17873, xed3_phash_find_mapevex_map1_opcode0x78_vv2_180_l1},
|
|
/*h(11718)=181 */ {11718, xed3_phash_find_mapevex_map1_opcode0x78_vv2_181_l1},
|
|
/*h(6550)=182 */ {6550, xed3_phash_find_mapevex_map1_opcode0x78_vv2_182_l1},
|
|
/*h(395)=183 */ {395, xed3_phash_find_mapevex_map1_opcode0x78_vv2_183_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21910)=185 */ {21910, xed3_phash_find_mapevex_map1_opcode0x78_vv2_185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9600)=187 */ {9600, xed3_phash_find_mapevex_map1_opcode0x78_vv2_187_l1},
|
|
/*h(13781)=188 */ {13781, xed3_phash_find_mapevex_map1_opcode0x78_vv2_188_l1},
|
|
/*h(7626)=189 */ {7626, xed3_phash_find_mapevex_map1_opcode0x78_vv2_189_l1},
|
|
/*h(24960)=190 */ {24960, xed3_phash_find_mapevex_map1_opcode0x78_vv2_190_l1},
|
|
/*h(484)=191 */ {484, xed3_phash_find_mapevex_map1_opcode0x78_vv2_191_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21999)=193 */ {21999, xed3_phash_find_mapevex_map1_opcode0x78_vv2_193_l1},
|
|
/*h(11663)=194 */ {11663, xed3_phash_find_mapevex_map1_opcode0x78_vv2_194_l1},
|
|
/*h(5508)=195 */ {5508, xed3_phash_find_mapevex_map1_opcode0x78_vv2_195_l1},
|
|
/*h(3534)=196 */ {3534, xed3_phash_find_mapevex_map1_opcode0x78_vv2_196_l1},
|
|
/*h(26036)=197 */ {26036, xed3_phash_find_mapevex_map1_opcode0x78_vv2_197_l1},
|
|
/*h(20868)=198 */ {20868, xed3_phash_find_mapevex_map1_opcode0x78_vv2_198_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17907)=200 */ {17907, xed3_phash_find_mapevex_map1_opcode0x78_vv2_200_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1416)=202 */ {1416, xed3_phash_find_mapevex_map1_opcode0x78_vv2_202_l1},
|
|
/*h(429)=203 */ {429, xed3_phash_find_mapevex_map1_opcode0x78_vv2_203_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16776)=205 */ {16776, xed3_phash_find_mapevex_map1_opcode0x78_vv2_205_l1},
|
|
/*h(14802)=206 */ {14802, xed3_phash_find_mapevex_map1_opcode0x78_vv2_206_l1},
|
|
/*h(9634)=207 */ {9634, xed3_phash_find_mapevex_map1_opcode0x78_vv2_207_l1},
|
|
/*h(3479)=208 */ {3479, xed3_phash_find_mapevex_map1_opcode0x78_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1505)=210 */ {1505, xed3_phash_find_mapevex_map1_opcode0x78_vv2_210_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16865)=213 */ {16865, xed3_phash_find_mapevex_map1_opcode0x78_vv2_213_l1},
|
|
/*h(5542)=214 */ {5542, xed3_phash_find_mapevex_map1_opcode0x78_vv2_214_l1},
|
|
/*h(4555)=215 */ {4555, xed3_phash_find_mapevex_map1_opcode0x78_vv2_215_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21889)=217 */ {21889, xed3_phash_find_mapevex_map1_opcode0x78_vv2_217_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8592)=220 */ {8592, xed3_phash_find_mapevex_map1_opcode0x78_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1450)=222 */ {1450, xed3_phash_find_mapevex_map1_opcode0x78_vv2_222_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17797)=224 */ {17797, xed3_phash_find_mapevex_map1_opcode0x78_vv2_224_l1},
|
|
/*h(15823)=225 */ {15823, xed3_phash_find_mapevex_map1_opcode0x78_vv2_225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9668)=227 */ {9668, xed3_phash_find_mapevex_map1_opcode0x78_vv2_227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25028)=230 */ {25028, xed3_phash_find_mapevex_map1_opcode0x78_vv2_230_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5576)=234 */ {5576, xed3_phash_find_mapevex_map1_opcode0x78_vv2_234_l1},
|
|
/*h(4589)=235 */ {4589, xed3_phash_find_mapevex_map1_opcode0x78_vv2_235_l1},
|
|
/*h(21923)=236 */ {21923, xed3_phash_find_mapevex_map1_opcode0x78_vv2_236_l1},
|
|
/*h(20936)=237 */ {20936, xed3_phash_find_mapevex_map1_opcode0x78_vv2_237_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9613)=239 */ {9613, xed3_phash_find_mapevex_map1_opcode0x78_vv2_239_l1},
|
|
/*h(7639)=240 */ {7639, xed3_phash_find_mapevex_map1_opcode0x78_vv2_240_l1},
|
|
/*h(1484)=241 */ {1484, xed3_phash_find_mapevex_map1_opcode0x78_vv2_241_l1},
|
|
/*h(24973)=242 */ {24973, xed3_phash_find_mapevex_map1_opcode0x78_vv2_242_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17831)=244 */ {17831, xed3_phash_find_mapevex_map1_opcode0x78_vv2_244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5521)=246 */ {5521, xed3_phash_find_mapevex_map1_opcode0x78_vv2_246_l1},
|
|
/*h(4534)=247 */ {4534, xed3_phash_find_mapevex_map1_opcode0x78_vv2_247_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26049)=249 */ {26049, xed3_phash_find_mapevex_map1_opcode0x78_vv2_249_l1},
|
|
/*h(14726)=250 */ {14726, xed3_phash_find_mapevex_map1_opcode0x78_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1429)=253 */ {1429, xed3_phash_find_mapevex_map1_opcode0x78_vv2_253_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21957)=256 */ {21957, xed3_phash_find_mapevex_map1_opcode0x78_vv2_256_l1},
|
|
/*h(20970)=257 */ {20970, xed3_phash_find_mapevex_map1_opcode0x78_vv2_257_l1},
|
|
/*h(9647)=258 */ {9647, xed3_phash_find_mapevex_map1_opcode0x78_vv2_258_l1},
|
|
/*h(8660)=259 */ {8660, xed3_phash_find_mapevex_map1_opcode0x78_vv2_259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25994)=261 */ {25994, xed3_phash_find_mapevex_map1_opcode0x78_vv2_261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17865)=263 */ {17865, xed3_phash_find_mapevex_map1_opcode0x78_vv2_263_l1},
|
|
/*h(16878)=264 */ {16878, xed3_phash_find_mapevex_map1_opcode0x78_vv2_264_l1},
|
|
/*h(6542)=265 */ {6542, xed3_phash_find_mapevex_map1_opcode0x78_vv2_265_l1},
|
|
/*h(5555)=266 */ {5555, xed3_phash_find_mapevex_map1_opcode0x78_vv2_266_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21902)=268 */ {21902, xed3_phash_find_mapevex_map1_opcode0x78_vv2_268_l1},
|
|
/*h(20915)=269 */ {20915, xed3_phash_find_mapevex_map1_opcode0x78_vv2_269_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13773)=271 */ {13773, xed3_phash_find_mapevex_map1_opcode0x78_vv2_271_l1},
|
|
/*h(7618)=272 */ {7618, xed3_phash_find_mapevex_map1_opcode0x78_vv2_272_l1},
|
|
/*h(1463)=273 */ {1463, xed3_phash_find_mapevex_map1_opcode0x78_vv2_273_l1},
|
|
/*h(29133)=274 */ {29133, xed3_phash_find_mapevex_map1_opcode0x78_vv2_274_l1},
|
|
/*h(17810)=275 */ {17810, xed3_phash_find_mapevex_map1_opcode0x78_vv2_275_l1},
|
|
/*h(11655)=276 */ {11655, xed3_phash_find_mapevex_map1_opcode0x78_vv2_276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9681)=278 */ {9681, xed3_phash_find_mapevex_map1_opcode0x78_vv2_278_l1},
|
|
/*h(3526)=279 */ {3526, xed3_phash_find_mapevex_map1_opcode0x78_vv2_279_l1},
|
|
/*h(26028)=280 */ {26028, xed3_phash_find_mapevex_map1_opcode0x78_vv2_280_l1},
|
|
/*h(25041)=281 */ {25041, xed3_phash_find_mapevex_map1_opcode0x78_vv2_281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17899)=283 */ {17899, xed3_phash_find_mapevex_map1_opcode0x78_vv2_283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1408)=285 */ {1408, xed3_phash_find_mapevex_map1_opcode0x78_vv2_285_l1},
|
|
/*h(421)=286 */ {421, xed3_phash_find_mapevex_map1_opcode0x78_vv2_286_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21936)=288 */ {21936, xed3_phash_find_mapevex_map1_opcode0x78_vv2_288_l1},
|
|
/*h(14794)=289 */ {14794, xed3_phash_find_mapevex_map1_opcode0x78_vv2_289_l1},
|
|
/*h(13807)=290 */ {13807, xed3_phash_find_mapevex_map1_opcode0x78_vv2_290_l1},
|
|
/*h(3471)=291 */ {3471, xed3_phash_find_mapevex_map1_opcode0x78_vv2_291_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(29167)=293 */ {29167, xed3_phash_find_mapevex_map1_opcode0x78_vv2_293_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17844)=295 */ {17844, xed3_phash_find_mapevex_map1_opcode0x78_vv2_295_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9715)=297 */ {9715, xed3_phash_find_mapevex_map1_opcode0x78_vv2_297_l1},
|
|
/*h(4547)=298 */ {4547, xed3_phash_find_mapevex_map1_opcode0x78_vv2_298_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26062)=300 */ {26062, xed3_phash_find_mapevex_map1_opcode0x78_vv2_300_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8584)=303 */ {8584, xed3_phash_find_mapevex_map1_opcode0x78_vv2_303_l1},
|
|
/*h(6610)=304 */ {6610, xed3_phash_find_mapevex_map1_opcode0x78_vv2_304_l1},
|
|
/*h(1442)=305 */ {1442, xed3_phash_find_mapevex_map1_opcode0x78_vv2_305_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21970)=307 */ {21970, xed3_phash_find_mapevex_map1_opcode0x78_vv2_307_l1},
|
|
/*h(15815)=308 */ {15815, xed3_phash_find_mapevex_map1_opcode0x78_vv2_308_l1},
|
|
/*h(10647)=309 */ {10647, xed3_phash_find_mapevex_map1_opcode0x78_vv2_309_l1},
|
|
/*h(4492)=310 */ {4492, xed3_phash_find_mapevex_map1_opcode0x78_vv2_310_l1},
|
|
/*h(2518)=311 */ {2518, xed3_phash_find_mapevex_map1_opcode0x78_vv2_311_l1},
|
|
/*h(26007)=312 */ {26007, xed3_phash_find_mapevex_map1_opcode0x78_vv2_312_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17878)=314 */ {17878, xed3_phash_find_mapevex_map1_opcode0x78_vv2_314_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5568)=317 */ {5568, xed3_phash_find_mapevex_map1_opcode0x78_vv2_317_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26096)=319 */ {26096, xed3_phash_find_mapevex_map1_opcode0x78_vv2_319_l1},
|
|
/*h(20928)=320 */ {20928, xed3_phash_find_mapevex_map1_opcode0x78_vv2_320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9605)=322 */ {9605, xed3_phash_find_mapevex_map1_opcode0x78_vv2_322_l1},
|
|
/*h(7631)=323 */ {7631, xed3_phash_find_mapevex_map1_opcode0x78_vv2_323_l1},
|
|
/*h(30133)=324 */ {30133, xed3_phash_find_mapevex_map1_opcode0x78_vv2_324_l1},
|
|
/*h(24965)=325 */ {24965, xed3_phash_find_mapevex_map1_opcode0x78_vv2_325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22004)=327 */ {22004, xed3_phash_find_mapevex_map1_opcode0x78_vv2_327_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5513)=329 */ {5513, xed3_phash_find_mapevex_map1_opcode0x78_vv2_329_l1},
|
|
/*h(4526)=330 */ {4526, xed3_phash_find_mapevex_map1_opcode0x78_vv2_330_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20873)=332 */ {20873, xed3_phash_find_mapevex_map1_opcode0x78_vv2_332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1421)=336 */ {1421, xed3_phash_find_mapevex_map1_opcode0x78_vv2_336_l1},
|
|
/*h(434)=337 */ {434, xed3_phash_find_mapevex_map1_opcode0x78_vv2_337_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16781)=339 */ {16781, xed3_phash_find_mapevex_map1_opcode0x78_vv2_339_l1},
|
|
/*h(10626)=340 */ {10626, xed3_phash_find_mapevex_map1_opcode0x78_vv2_340_l1},
|
|
/*h(9639)=341 */ {9639, xed3_phash_find_mapevex_map1_opcode0x78_vv2_341_l1},
|
|
/*h(8652)=342 */ {8652, xed3_phash_find_mapevex_map1_opcode0x78_vv2_342_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25986)=344 */ {25986, xed3_phash_find_mapevex_map1_opcode0x78_vv2_344_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17857)=346 */ {17857, xed3_phash_find_mapevex_map1_opcode0x78_vv2_346_l1},
|
|
/*h(16870)=347 */ {16870, xed3_phash_find_mapevex_map1_opcode0x78_vv2_347_l1},
|
|
/*h(5547)=348 */ {5547, xed3_phash_find_mapevex_map1_opcode0x78_vv2_348_l1},
|
|
/*h(4560)=349 */ {4560, xed3_phash_find_mapevex_map1_opcode0x78_vv2_349_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21894)=351 */ {21894, xed3_phash_find_mapevex_map1_opcode0x78_vv2_351_l1},
|
|
/*h(20907)=352 */ {20907, xed3_phash_find_mapevex_map1_opcode0x78_vv2_352_l1},
|
|
/*h(13765)=353 */ {13765, xed3_phash_find_mapevex_map1_opcode0x78_vv2_353_l1},
|
|
/*h(8597)=354 */ {8597, xed3_phash_find_mapevex_map1_opcode0x78_vv2_354_l1},
|
|
/*h(2442)=355 */ {2442, xed3_phash_find_mapevex_map1_opcode0x78_vv2_355_l1},
|
|
/*h(1455)=356 */ {1455, xed3_phash_find_mapevex_map1_opcode0x78_vv2_356_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17802)=358 */ {17802, xed3_phash_find_mapevex_map1_opcode0x78_vv2_358_l1},
|
|
/*h(16815)=359 */ {16815, xed3_phash_find_mapevex_map1_opcode0x78_vv2_359_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9673)=361 */ {9673, xed3_phash_find_mapevex_map1_opcode0x78_vv2_361_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26020)=363 */ {26020, xed3_phash_find_mapevex_map1_opcode0x78_vv2_363_l1},
|
|
/*h(25033)=364 */ {25033, xed3_phash_find_mapevex_map1_opcode0x78_vv2_364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17891)=366 */ {17891, xed3_phash_find_mapevex_map1_opcode0x78_vv2_366_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5581)=368 */ {5581, xed3_phash_find_mapevex_map1_opcode0x78_vv2_368_l1},
|
|
/*h(4594)=369 */ {4594, xed3_phash_find_mapevex_map1_opcode0x78_vv2_369_l1},
|
|
/*h(21928)=370 */ {21928, xed3_phash_find_mapevex_map1_opcode0x78_vv2_370_l1},
|
|
/*h(20941)=371 */ {20941, xed3_phash_find_mapevex_map1_opcode0x78_vv2_371_l1},
|
|
/*h(14786)=372 */ {14786, xed3_phash_find_mapevex_map1_opcode0x78_vv2_372_l1},
|
|
/*h(9618)=373 */ {9618, xed3_phash_find_mapevex_map1_opcode0x78_vv2_373_l1},
|
|
/*h(3463)=374 */ {3463, xed3_phash_find_mapevex_map1_opcode0x78_vv2_374_l1},
|
|
/*h(1489)=375 */ {1489, xed3_phash_find_mapevex_map1_opcode0x78_vv2_375_l1},
|
|
/*h(24978)=376 */ {24978, xed3_phash_find_mapevex_map1_opcode0x78_vv2_376_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17836)=378 */ {17836, xed3_phash_find_mapevex_map1_opcode0x78_vv2_378_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5526)=380 */ {5526, xed3_phash_find_mapevex_map1_opcode0x78_vv2_380_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26054)=383 */ {26054, xed3_phash_find_mapevex_map1_opcode0x78_vv2_383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8576)=386 */ {8576, xed3_phash_find_mapevex_map1_opcode0x78_vv2_386_l1},
|
|
/*h(6602)=387 */ {6602, xed3_phash_find_mapevex_map1_opcode0x78_vv2_387_l1},
|
|
/*h(5615)=388 */ {5615, xed3_phash_find_mapevex_map1_opcode0x78_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21962)=390 */ {21962, xed3_phash_find_mapevex_map1_opcode0x78_vv2_390_l1},
|
|
/*h(20975)=391 */ {20975, xed3_phash_find_mapevex_map1_opcode0x78_vv2_391_l1},
|
|
/*h(9652)=392 */ {9652, xed3_phash_find_mapevex_map1_opcode0x78_vv2_392_l1},
|
|
/*h(4484)=393 */ {4484, xed3_phash_find_mapevex_map1_opcode0x78_vv2_393_l1},
|
|
/*h(2510)=394 */ {2510, xed3_phash_find_mapevex_map1_opcode0x78_vv2_394_l1},
|
|
/*h(25999)=395 */ {25999, xed3_phash_find_mapevex_map1_opcode0x78_vv2_395_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17870)=397 */ {17870, xed3_phash_find_mapevex_map1_opcode0x78_vv2_397_l1},
|
|
/*h(16883)=398 */ {16883, xed3_phash_find_mapevex_map1_opcode0x78_vv2_398_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(392)=400 */ {392, xed3_phash_find_mapevex_map1_opcode0x78_vv2_400_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21907)=402 */ {21907, xed3_phash_find_mapevex_map1_opcode0x78_vv2_402_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8610)=405 */ {8610, xed3_phash_find_mapevex_map1_opcode0x78_vv2_405_l1},
|
|
/*h(7623)=406 */ {7623, xed3_phash_find_mapevex_map1_opcode0x78_vv2_406_l1},
|
|
/*h(30125)=407 */ {30125, xed3_phash_find_mapevex_map1_opcode0x78_vv2_407_l1},
|
|
/*h(481)=408 */ {481, xed3_phash_find_mapevex_map1_opcode0x78_vv2_408_l1},
|
|
/*h(17815)=409 */ {17815, xed3_phash_find_mapevex_map1_opcode0x78_vv2_409_l1},
|
|
/*h(21996)=410 */ {21996, xed3_phash_find_mapevex_map1_opcode0x78_vv2_410_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5505)=412 */ {5505, xed3_phash_find_mapevex_map1_opcode0x78_vv2_412_l1},
|
|
/*h(4518)=413 */ {4518, xed3_phash_find_mapevex_map1_opcode0x78_vv2_413_l1},
|
|
/*h(26033)=414 */ {26033, xed3_phash_find_mapevex_map1_opcode0x78_vv2_414_l1},
|
|
/*h(20865)=415 */ {20865, xed3_phash_find_mapevex_map1_opcode0x78_vv2_415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17904)=417 */ {17904, xed3_phash_find_mapevex_map1_opcode0x78_vv2_417_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1413)=419 */ {1413, xed3_phash_find_mapevex_map1_opcode0x78_vv2_419_l1},
|
|
/*h(426)=420 */ {426, xed3_phash_find_mapevex_map1_opcode0x78_vv2_420_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21941)=422 */ {21941, xed3_phash_find_mapevex_map1_opcode0x78_vv2_422_l1},
|
|
/*h(15786)=423 */ {15786, xed3_phash_find_mapevex_map1_opcode0x78_vv2_423_l1},
|
|
/*h(14799)=424 */ {14799, xed3_phash_find_mapevex_map1_opcode0x78_vv2_424_l1},
|
|
/*h(8644)=425 */ {8644, xed3_phash_find_mapevex_map1_opcode0x78_vv2_425_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30159)=427 */ {30159, xed3_phash_find_mapevex_map1_opcode0x78_vv2_427_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11694)=430 */ {11694, xed3_phash_find_mapevex_map1_opcode0x78_vv2_430_l1},
|
|
/*h(5539)=431 */ {5539, xed3_phash_find_mapevex_map1_opcode0x78_vv2_431_l1},
|
|
/*h(4552)=432 */ {4552, xed3_phash_find_mapevex_map1_opcode0x78_vv2_432_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26067)=434 */ {26067, xed3_phash_find_mapevex_map1_opcode0x78_vv2_434_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8589)=437 */ {8589, xed3_phash_find_mapevex_map1_opcode0x78_vv2_437_l1},
|
|
/*h(6615)=438 */ {6615, xed3_phash_find_mapevex_map1_opcode0x78_vv2_438_l1},
|
|
/*h(1447)=439 */ {1447, xed3_phash_find_mapevex_map1_opcode0x78_vv2_439_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17794)=441 */ {17794, xed3_phash_find_mapevex_map1_opcode0x78_vv2_441_l1},
|
|
/*h(16807)=442 */ {16807, xed3_phash_find_mapevex_map1_opcode0x78_vv2_442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9665)=444 */ {9665, xed3_phash_find_mapevex_map1_opcode0x78_vv2_444_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25025)=447 */ {25025, xed3_phash_find_mapevex_map1_opcode0x78_vv2_447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5573)=451 */ {5573, xed3_phash_find_mapevex_map1_opcode0x78_vv2_451_l1},
|
|
/*h(405)=452 */ {405, xed3_phash_find_mapevex_map1_opcode0x78_vv2_452_l1},
|
|
/*h(21920)=453 */ {21920, xed3_phash_find_mapevex_map1_opcode0x78_vv2_453_l1},
|
|
/*h(26101)=454 */ {26101, xed3_phash_find_mapevex_map1_opcode0x78_vv2_454_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9610)=456 */ {9610, xed3_phash_find_mapevex_map1_opcode0x78_vv2_456_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1481)=458 */ {1481, xed3_phash_find_mapevex_map1_opcode0x78_vv2_458_l1},
|
|
/*h(24970)=459 */ {24970, xed3_phash_find_mapevex_map1_opcode0x78_vv2_459_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17828)=461 */ {17828, xed3_phash_find_mapevex_map1_opcode0x78_vv2_461_l1},
|
|
/*h(15854)=462 */ {15854, xed3_phash_find_mapevex_map1_opcode0x78_vv2_462_l1},
|
|
/*h(5518)=463 */ {5518, xed3_phash_find_mapevex_map1_opcode0x78_vv2_463_l1},
|
|
/*h(4531)=464 */ {4531, xed3_phash_find_mapevex_map1_opcode0x78_vv2_464_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20878)=466 */ {20878, xed3_phash_find_mapevex_map1_opcode0x78_vv2_466_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12749)=469 */ {12749, xed3_phash_find_mapevex_map1_opcode0x78_vv2_469_l1},
|
|
/*h(1426)=470 */ {1426, xed3_phash_find_mapevex_map1_opcode0x78_vv2_470_l1},
|
|
/*h(5607)=471 */ {5607, xed3_phash_find_mapevex_map1_opcode0x78_vv2_471_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21954)=473 */ {21954, xed3_phash_find_mapevex_map1_opcode0x78_vv2_473_l1},
|
|
/*h(20967)=474 */ {20967, xed3_phash_find_mapevex_map1_opcode0x78_vv2_474_l1},
|
|
/*h(9644)=475 */ {9644, xed3_phash_find_mapevex_map1_opcode0x78_vv2_475_l1},
|
|
/*h(8657)=476 */ {8657, xed3_phash_find_mapevex_map1_opcode0x78_vv2_476_l1},
|
|
/*h(2502)=477 */ {2502, xed3_phash_find_mapevex_map1_opcode0x78_vv2_477_l1},
|
|
/*h(25991)=478 */ {25991, xed3_phash_find_mapevex_map1_opcode0x78_vv2_478_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17862)=480 */ {17862, xed3_phash_find_mapevex_map1_opcode0x78_vv2_480_l1},
|
|
/*h(16875)=481 */ {16875, xed3_phash_find_mapevex_map1_opcode0x78_vv2_481_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5552)=483 */ {5552, xed3_phash_find_mapevex_map1_opcode0x78_vv2_483_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21899)=485 */ {21899, xed3_phash_find_mapevex_map1_opcode0x78_vv2_485_l1},
|
|
/*h(20912)=486 */ {20912, xed3_phash_find_mapevex_map1_opcode0x78_vv2_486_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12783)=488 */ {12783, xed3_phash_find_mapevex_map1_opcode0x78_vv2_488_l1},
|
|
/*h(2447)=489 */ {2447, xed3_phash_find_mapevex_map1_opcode0x78_vv2_489_l1},
|
|
/*h(30117)=490 */ {30117, xed3_phash_find_mapevex_map1_opcode0x78_vv2_490_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17807)=492 */ {17807, xed3_phash_find_mapevex_map1_opcode0x78_vv2_492_l1},
|
|
/*h(21988)=493 */ {21988, xed3_phash_find_mapevex_map1_opcode0x78_vv2_493_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9678)=495 */ {9678, xed3_phash_find_mapevex_map1_opcode0x78_vv2_495_l1},
|
|
/*h(8691)=496 */ {8691, xed3_phash_find_mapevex_map1_opcode0x78_vv2_496_l1},
|
|
/*h(26025)=497 */ {26025, xed3_phash_find_mapevex_map1_opcode0x78_vv2_497_l1},
|
|
/*h(25038)=498 */ {25038, xed3_phash_find_mapevex_map1_opcode0x78_vv2_498_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17896)=500 */ {17896, xed3_phash_find_mapevex_map1_opcode0x78_vv2_500_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5586)=502 */ {5586, xed3_phash_find_mapevex_map1_opcode0x78_vv2_502_l1},
|
|
/*h(418)=503 */ {418, xed3_phash_find_mapevex_map1_opcode0x78_vv2_503_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21933)=505 */ {21933, xed3_phash_find_mapevex_map1_opcode0x78_vv2_505_l1},
|
|
/*h(15778)=506 */ {15778, xed3_phash_find_mapevex_map1_opcode0x78_vv2_506_l1},
|
|
/*h(9623)=507 */ {9623, xed3_phash_find_mapevex_map1_opcode0x78_vv2_507_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30151)=510 */ {30151, xed3_phash_find_mapevex_map1_opcode0x78_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17841)=512 */ {17841, xed3_phash_find_mapevex_map1_opcode0x78_vv2_512_l1},
|
|
/*h(11686)=513 */ {11686, xed3_phash_find_mapevex_map1_opcode0x78_vv2_513_l1},
|
|
/*h(9712)=514 */ {9712, xed3_phash_find_mapevex_map1_opcode0x78_vv2_514_l1},
|
|
/*h(4544)=515 */ {4544, xed3_phash_find_mapevex_map1_opcode0x78_vv2_515_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26059)=517 */ {26059, xed3_phash_find_mapevex_map1_opcode0x78_vv2_517_l1},
|
|
/*h(25072)=518 */ {25072, xed3_phash_find_mapevex_map1_opcode0x78_vv2_518_l1},
|
|
/*h(13749)=519 */ {13749, xed3_phash_find_mapevex_map1_opcode0x78_vv2_519_l1},
|
|
/*h(7594)=520 */ {7594, xed3_phash_find_mapevex_map1_opcode0x78_vv2_520_l1},
|
|
/*h(6607)=521 */ {6607, xed3_phash_find_mapevex_map1_opcode0x78_vv2_521_l1},
|
|
/*h(5620)=522 */ {5620, xed3_phash_find_mapevex_map1_opcode0x78_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21967)=524 */ {21967, xed3_phash_find_mapevex_map1_opcode0x78_vv2_524_l1},
|
|
/*h(20980)=525 */ {20980, xed3_phash_find_mapevex_map1_opcode0x78_vv2_525_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4489)=527 */ {4489, xed3_phash_find_mapevex_map1_opcode0x78_vv2_527_l1},
|
|
/*h(3502)=528 */ {3502, xed3_phash_find_mapevex_map1_opcode0x78_vv2_528_l1},
|
|
/*h(26004)=529 */ {26004, xed3_phash_find_mapevex_map1_opcode0x78_vv2_529_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17875)=532 */ {17875, xed3_phash_find_mapevex_map1_opcode0x78_vv2_532_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(397)=534 */ {397, xed3_phash_find_mapevex_map1_opcode0x78_vv2_534_l1},
|
|
/*h(4578)=535 */ {4578, xed3_phash_find_mapevex_map1_opcode0x78_vv2_535_l1},
|
|
/*h(26093)=536 */ {26093, xed3_phash_find_mapevex_map1_opcode0x78_vv2_536_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9602)=539 */ {9602, xed3_phash_find_mapevex_map1_opcode0x78_vv2_539_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1473)=541 */ {1473, xed3_phash_find_mapevex_map1_opcode0x78_vv2_541_l1},
|
|
/*h(24962)=542 */ {24962, xed3_phash_find_mapevex_map1_opcode0x78_vv2_542_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22001)=544 */ {22001, xed3_phash_find_mapevex_map1_opcode0x78_vv2_544_l1},
|
|
/*h(15846)=545 */ {15846, xed3_phash_find_mapevex_map1_opcode0x78_vv2_545_l1},
|
|
/*h(5510)=546 */ {5510, xed3_phash_find_mapevex_map1_opcode0x78_vv2_546_l1},
|
|
/*h(4523)=547 */ {4523, xed3_phash_find_mapevex_map1_opcode0x78_vv2_547_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26038)=549 */ {26038, xed3_phash_find_mapevex_map1_opcode0x78_vv2_549_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17909)=551 */ {17909, xed3_phash_find_mapevex_map1_opcode0x78_vv2_551_l1},
|
|
/*h(11754)=552 */ {11754, xed3_phash_find_mapevex_map1_opcode0x78_vv2_552_l1},
|
|
/*h(1418)=553 */ {1418, xed3_phash_find_mapevex_map1_opcode0x78_vv2_553_l1},
|
|
/*h(431)=554 */ {431, xed3_phash_find_mapevex_map1_opcode0x78_vv2_554_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16778)=556 */ {16778, xed3_phash_find_mapevex_map1_opcode0x78_vv2_556_l1},
|
|
/*h(15791)=557 */ {15791, xed3_phash_find_mapevex_map1_opcode0x78_vv2_557_l1},
|
|
/*h(9636)=558 */ {9636, xed3_phash_find_mapevex_map1_opcode0x78_vv2_558_l1},
|
|
/*h(8649)=559 */ {8649, xed3_phash_find_mapevex_map1_opcode0x78_vv2_559_l1},
|
|
/*h(7662)=560 */ {7662, xed3_phash_find_mapevex_map1_opcode0x78_vv2_560_l1},
|
|
/*h(1507)=561 */ {1507, xed3_phash_find_mapevex_map1_opcode0x78_vv2_561_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16867)=564 */ {16867, xed3_phash_find_mapevex_map1_opcode0x78_vv2_564_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5544)=566 */ {5544, xed3_phash_find_mapevex_map1_opcode0x78_vv2_566_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21891)=568 */ {21891, xed3_phash_find_mapevex_map1_opcode0x78_vv2_568_l1},
|
|
/*h(20904)=569 */ {20904, xed3_phash_find_mapevex_map1_opcode0x78_vv2_569_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8594)=571 */ {8594, xed3_phash_find_mapevex_map1_opcode0x78_vv2_571_l1},
|
|
/*h(2439)=572 */ {2439, xed3_phash_find_mapevex_map1_opcode0x78_vv2_572_l1},
|
|
/*h(1452)=573 */ {1452, xed3_phash_find_mapevex_map1_opcode0x78_vv2_573_l1},
|
|
/*h(465)=574 */ {465, xed3_phash_find_mapevex_map1_opcode0x78_vv2_574_l1},
|
|
/*h(17799)=575 */ {17799, xed3_phash_find_mapevex_map1_opcode0x78_vv2_575_l1},
|
|
/*h(16812)=576 */ {16812, xed3_phash_find_mapevex_map1_opcode0x78_vv2_576_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9670)=578 */ {9670, xed3_phash_find_mapevex_map1_opcode0x78_vv2_578_l1},
|
|
/*h(8683)=579 */ {8683, xed3_phash_find_mapevex_map1_opcode0x78_vv2_579_l1},
|
|
/*h(26017)=580 */ {26017, xed3_phash_find_mapevex_map1_opcode0x78_vv2_580_l1},
|
|
/*h(25030)=581 */ {25030, xed3_phash_find_mapevex_map1_opcode0x78_vv2_581_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17888)=583 */ {17888, xed3_phash_find_mapevex_map1_opcode0x78_vv2_583_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5578)=585 */ {5578, xed3_phash_find_mapevex_map1_opcode0x78_vv2_585_l1},
|
|
/*h(4591)=586 */ {4591, xed3_phash_find_mapevex_map1_opcode0x78_vv2_586_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21925)=588 */ {21925, xed3_phash_find_mapevex_map1_opcode0x78_vv2_588_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9615)=590 */ {9615, xed3_phash_find_mapevex_map1_opcode0x78_vv2_590_l1},
|
|
/*h(8628)=591 */ {8628, xed3_phash_find_mapevex_map1_opcode0x78_vv2_591_l1},
|
|
/*h(1486)=592 */ {1486, xed3_phash_find_mapevex_map1_opcode0x78_vv2_592_l1},
|
|
/*h(24975)=593 */ {24975, xed3_phash_find_mapevex_map1_opcode0x78_vv2_593_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17833)=595 */ {17833, xed3_phash_find_mapevex_map1_opcode0x78_vv2_595_l1},
|
|
/*h(16846)=596 */ {16846, xed3_phash_find_mapevex_map1_opcode0x78_vv2_596_l1},
|
|
/*h(5523)=597 */ {5523, xed3_phash_find_mapevex_map1_opcode0x78_vv2_597_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26051)=600 */ {26051, xed3_phash_find_mapevex_map1_opcode0x78_vv2_600_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13741)=602 */ {13741, xed3_phash_find_mapevex_map1_opcode0x78_vv2_602_l1},
|
|
/*h(7586)=603 */ {7586, xed3_phash_find_mapevex_map1_opcode0x78_vv2_603_l1},
|
|
/*h(6599)=604 */ {6599, xed3_phash_find_mapevex_map1_opcode0x78_vv2_604_l1},
|
|
/*h(1431)=605 */ {1431, xed3_phash_find_mapevex_map1_opcode0x78_vv2_605_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21959)=607 */ {21959, xed3_phash_find_mapevex_map1_opcode0x78_vv2_607_l1},
|
|
/*h(16791)=608 */ {16791, xed3_phash_find_mapevex_map1_opcode0x78_vv2_608_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9649)=610 */ {9649, xed3_phash_find_mapevex_map1_opcode0x78_vv2_610_l1},
|
|
/*h(3494)=611 */ {3494, xed3_phash_find_mapevex_map1_opcode0x78_vv2_611_l1},
|
|
/*h(25996)=612 */ {25996, xed3_phash_find_mapevex_map1_opcode0x78_vv2_612_l1},
|
|
/*h(25009)=613 */ {25009, xed3_phash_find_mapevex_map1_opcode0x78_vv2_613_l1},
|
|
/*h(17867)=614 */ {17867, xed3_phash_find_mapevex_map1_opcode0x78_vv2_614_l1},
|
|
/*h(16880)=615 */ {16880, xed3_phash_find_mapevex_map1_opcode0x78_vv2_615_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5557)=617 */ {5557, xed3_phash_find_mapevex_map1_opcode0x78_vv2_617_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21904)=619 */ {21904, xed3_phash_find_mapevex_map1_opcode0x78_vv2_619_l1},
|
|
/*h(20917)=620 */ {20917, xed3_phash_find_mapevex_map1_opcode0x78_vv2_620_l1},
|
|
/*h(14762)=621 */ {14762, xed3_phash_find_mapevex_map1_opcode0x78_vv2_621_l1},
|
|
/*h(13775)=622 */ {13775, xed3_phash_find_mapevex_map1_opcode0x78_vv2_622_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(29135)=625 */ {29135, xed3_phash_find_mapevex_map1_opcode0x78_vv2_625_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17812)=627 */ {17812, xed3_phash_find_mapevex_map1_opcode0x78_vv2_627_l1},
|
|
/*h(10670)=628 */ {10670, xed3_phash_find_mapevex_map1_opcode0x78_vv2_628_l1},
|
|
/*h(9683)=629 */ {9683, xed3_phash_find_mapevex_map1_opcode0x78_vv2_629_l1},
|
|
/*h(4515)=630 */ {4515, xed3_phash_find_mapevex_map1_opcode0x78_vv2_630_l1},
|
|
/*h(26030)=631 */ {26030, xed3_phash_find_mapevex_map1_opcode0x78_vv2_631_l1},
|
|
/*h(25043)=632 */ {25043, xed3_phash_find_mapevex_map1_opcode0x78_vv2_632_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17901)=634 */ {17901, xed3_phash_find_mapevex_map1_opcode0x78_vv2_634_l1},
|
|
/*h(11746)=635 */ {11746, xed3_phash_find_mapevex_map1_opcode0x78_vv2_635_l1},
|
|
/*h(1410)=636 */ {1410, xed3_phash_find_mapevex_map1_opcode0x78_vv2_636_l1},
|
|
/*h(423)=637 */ {423, xed3_phash_find_mapevex_map1_opcode0x78_vv2_637_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21938)=639 */ {21938, xed3_phash_find_mapevex_map1_opcode0x78_vv2_639_l1},
|
|
/*h(15783)=640 */ {15783, xed3_phash_find_mapevex_map1_opcode0x78_vv2_640_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8641)=642 */ {8641, xed3_phash_find_mapevex_map1_opcode0x78_vv2_642_l1},
|
|
/*h(7654)=643 */ {7654, xed3_phash_find_mapevex_map1_opcode0x78_vv2_643_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17846)=646 */ {17846, xed3_phash_find_mapevex_map1_opcode0x78_vv2_646_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5536)=649 */ {5536, xed3_phash_find_mapevex_map1_opcode0x78_vv2_649_l1},
|
|
/*h(3562)=650 */ {3562, xed3_phash_find_mapevex_map1_opcode0x78_vv2_650_l1},
|
|
/*h(26064)=651 */ {26064, xed3_phash_find_mapevex_map1_opcode0x78_vv2_651_l1},
|
|
/*h(20896)=652 */ {20896, xed3_phash_find_mapevex_map1_opcode0x78_vv2_652_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8586)=654 */ {8586, xed3_phash_find_mapevex_map1_opcode0x78_vv2_654_l1},
|
|
/*h(7599)=655 */ {7599, xed3_phash_find_mapevex_map1_opcode0x78_vv2_655_l1},
|
|
/*h(30101)=656 */ {30101, xed3_phash_find_mapevex_map1_opcode0x78_vv2_656_l1},
|
|
/*h(457)=657 */ {457, xed3_phash_find_mapevex_map1_opcode0x78_vv2_657_l1},
|
|
/*h(21972)=658 */ {21972, xed3_phash_find_mapevex_map1_opcode0x78_vv2_658_l1},
|
|
/*h(16804)=659 */ {16804, xed3_phash_find_mapevex_map1_opcode0x78_vv2_659_l1},
|
|
/*h(14830)=660 */ {14830, xed3_phash_find_mapevex_map1_opcode0x78_vv2_660_l1},
|
|
/*h(4494)=661 */ {4494, xed3_phash_find_mapevex_map1_opcode0x78_vv2_661_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5570)=668 */ {5570, xed3_phash_find_mapevex_map1_opcode0x78_vv2_668_l1},
|
|
/*h(402)=669 */ {402, xed3_phash_find_mapevex_map1_opcode0x78_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26098)=671 */ {26098, xed3_phash_find_mapevex_map1_opcode0x78_vv2_671_l1},
|
|
/*h(15762)=672 */ {15762, xed3_phash_find_mapevex_map1_opcode0x78_vv2_672_l1},
|
|
/*h(9607)=673 */ {9607, xed3_phash_find_mapevex_map1_opcode0x78_vv2_673_l1},
|
|
/*h(8620)=674 */ {8620, xed3_phash_find_mapevex_map1_opcode0x78_vv2_674_l1},
|
|
/*h(30135)=675 */ {30135, xed3_phash_find_mapevex_map1_opcode0x78_vv2_675_l1},
|
|
/*h(24967)=676 */ {24967, xed3_phash_find_mapevex_map1_opcode0x78_vv2_676_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17825)=678 */ {17825, xed3_phash_find_mapevex_map1_opcode0x78_vv2_678_l1},
|
|
/*h(11670)=679 */ {11670, xed3_phash_find_mapevex_map1_opcode0x78_vv2_679_l1},
|
|
/*h(5515)=680 */ {5515, xed3_phash_find_mapevex_map1_opcode0x78_vv2_680_l1},
|
|
/*h(4528)=681 */ {4528, xed3_phash_find_mapevex_map1_opcode0x78_vv2_681_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20875)=683 */ {20875, xed3_phash_find_mapevex_map1_opcode0x78_vv2_683_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13733)=685 */ {13733, xed3_phash_find_mapevex_map1_opcode0x78_vv2_685_l1},
|
|
/*h(11759)=686 */ {11759, xed3_phash_find_mapevex_map1_opcode0x78_vv2_686_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1423)=688 */ {1423, xed3_phash_find_mapevex_map1_opcode0x78_vv2_688_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16783)=691 */ {16783, xed3_phash_find_mapevex_map1_opcode0x78_vv2_691_l1},
|
|
/*h(9641)=692 */ {9641, xed3_phash_find_mapevex_map1_opcode0x78_vv2_692_l1},
|
|
/*h(8654)=693 */ {8654, xed3_phash_find_mapevex_map1_opcode0x78_vv2_693_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25988)=695 */ {25988, xed3_phash_find_mapevex_map1_opcode0x78_vv2_695_l1},
|
|
/*h(25001)=696 */ {25001, xed3_phash_find_mapevex_map1_opcode0x78_vv2_696_l1},
|
|
/*h(17859)=697 */ {17859, xed3_phash_find_mapevex_map1_opcode0x78_vv2_697_l1},
|
|
/*h(16872)=698 */ {16872, xed3_phash_find_mapevex_map1_opcode0x78_vv2_698_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5549)=700 */ {5549, xed3_phash_find_mapevex_map1_opcode0x78_vv2_700_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21896)=702 */ {21896, xed3_phash_find_mapevex_map1_opcode0x78_vv2_702_l1},
|
|
/*h(20909)=703 */ {20909, xed3_phash_find_mapevex_map1_opcode0x78_vv2_703_l1},
|
|
/*h(14754)=704 */ {14754, xed3_phash_find_mapevex_map1_opcode0x78_vv2_704_l1},
|
|
/*h(13767)=705 */ {13767, xed3_phash_find_mapevex_map1_opcode0x78_vv2_705_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1457)=707 */ {1457, xed3_phash_find_mapevex_map1_opcode0x78_vv2_707_l1},
|
|
/*h(470)=708 */ {470, xed3_phash_find_mapevex_map1_opcode0x78_vv2_708_l1},
|
|
/*h(17804)=709 */ {17804, xed3_phash_find_mapevex_map1_opcode0x78_vv2_709_l1},
|
|
/*h(21985)=710 */ {21985, xed3_phash_find_mapevex_map1_opcode0x78_vv2_710_l1},
|
|
/*h(15830)=711 */ {15830, xed3_phash_find_mapevex_map1_opcode0x78_vv2_711_l1},
|
|
/*h(9675)=712 */ {9675, xed3_phash_find_mapevex_map1_opcode0x78_vv2_712_l1},
|
|
/*h(8688)=713 */ {8688, xed3_phash_find_mapevex_map1_opcode0x78_vv2_713_l1},
|
|
/*h(26022)=714 */ {26022, xed3_phash_find_mapevex_map1_opcode0x78_vv2_714_l1},
|
|
/*h(25035)=715 */ {25035, xed3_phash_find_mapevex_map1_opcode0x78_vv2_715_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17893)=717 */ {17893, xed3_phash_find_mapevex_map1_opcode0x78_vv2_717_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5583)=719 */ {5583, xed3_phash_find_mapevex_map1_opcode0x78_vv2_719_l1},
|
|
/*h(4596)=720 */ {4596, xed3_phash_find_mapevex_map1_opcode0x78_vv2_720_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21930)=722 */ {21930, xed3_phash_find_mapevex_map1_opcode0x78_vv2_722_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9620)=724 */ {9620, xed3_phash_find_mapevex_map1_opcode0x78_vv2_724_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2478)=726 */ {2478, xed3_phash_find_mapevex_map1_opcode0x78_vv2_726_l1},
|
|
/*h(1491)=727 */ {1491, xed3_phash_find_mapevex_map1_opcode0x78_vv2_727_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17838)=729 */ {17838, xed3_phash_find_mapevex_map1_opcode0x78_vv2_729_l1},
|
|
/*h(16851)=730 */ {16851, xed3_phash_find_mapevex_map1_opcode0x78_vv2_730_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9709)=732 */ {9709, xed3_phash_find_mapevex_map1_opcode0x78_vv2_732_l1},
|
|
/*h(3554)=733 */ {3554, xed3_phash_find_mapevex_map1_opcode0x78_vv2_733_l1},
|
|
/*h(26056)=734 */ {26056, xed3_phash_find_mapevex_map1_opcode0x78_vv2_734_l1},
|
|
/*h(25069)=735 */ {25069, xed3_phash_find_mapevex_map1_opcode0x78_vv2_735_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8578)=737 */ {8578, xed3_phash_find_mapevex_map1_opcode0x78_vv2_737_l1},
|
|
/*h(7591)=738 */ {7591, xed3_phash_find_mapevex_map1_opcode0x78_vv2_738_l1},
|
|
/*h(30093)=739 */ {30093, xed3_phash_find_mapevex_map1_opcode0x78_vv2_739_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21964)=741 */ {21964, xed3_phash_find_mapevex_map1_opcode0x78_vv2_741_l1},
|
|
/*h(20977)=742 */ {20977, xed3_phash_find_mapevex_map1_opcode0x78_vv2_742_l1},
|
|
/*h(14822)=743 */ {14822, xed3_phash_find_mapevex_map1_opcode0x78_vv2_743_l1},
|
|
/*h(9654)=744 */ {9654, xed3_phash_find_mapevex_map1_opcode0x78_vv2_744_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26001)=746 */ {26001, xed3_phash_find_mapevex_map1_opcode0x78_vv2_746_l1},
|
|
/*h(25014)=747 */ {25014, xed3_phash_find_mapevex_map1_opcode0x78_vv2_747_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17872)=749 */ {17872, xed3_phash_find_mapevex_map1_opcode0x78_vv2_749_l1},
|
|
/*h(10730)=750 */ {10730, xed3_phash_find_mapevex_map1_opcode0x78_vv2_750_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(394)=752 */ {394, xed3_phash_find_mapevex_map1_opcode0x78_vv2_752_l1},
|
|
/*h(21909)=753 */ {21909, xed3_phash_find_mapevex_map1_opcode0x78_vv2_753_l1},
|
|
/*h(26090)=754 */ {26090, xed3_phash_find_mapevex_map1_opcode0x78_vv2_754_l1},
|
|
/*h(15754)=755 */ {15754, xed3_phash_find_mapevex_map1_opcode0x78_vv2_755_l1},
|
|
/*h(8612)=756 */ {8612, xed3_phash_find_mapevex_map1_opcode0x78_vv2_756_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30127)=758 */ {30127, xed3_phash_find_mapevex_map1_opcode0x78_vv2_758_l1},
|
|
/*h(483)=759 */ {483, xed3_phash_find_mapevex_map1_opcode0x78_vv2_759_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21998)=761 */ {21998, xed3_phash_find_mapevex_map1_opcode0x78_vv2_761_l1},
|
|
/*h(11662)=762 */ {11662, xed3_phash_find_mapevex_map1_opcode0x78_vv2_762_l1},
|
|
/*h(5507)=763 */ {5507, xed3_phash_find_mapevex_map1_opcode0x78_vv2_763_l1},
|
|
/*h(4520)=764 */ {4520, xed3_phash_find_mapevex_map1_opcode0x78_vv2_764_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26035)=766 */ {26035, xed3_phash_find_mapevex_map1_opcode0x78_vv2_766_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17906)=768 */ {17906, xed3_phash_find_mapevex_map1_opcode0x78_vv2_768_l1},
|
|
/*h(7570)=769 */ {7570, xed3_phash_find_mapevex_map1_opcode0x78_vv2_769_l1},
|
|
/*h(1415)=770 */ {1415, xed3_phash_find_mapevex_map1_opcode0x78_vv2_770_l1},
|
|
/*h(428)=771 */ {428, xed3_phash_find_mapevex_map1_opcode0x78_vv2_771_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21943)=773 */ {21943, xed3_phash_find_mapevex_map1_opcode0x78_vv2_773_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9633)=775 */ {9633, xed3_phash_find_mapevex_map1_opcode0x78_vv2_775_l1},
|
|
/*h(8646)=776 */ {8646, xed3_phash_find_mapevex_map1_opcode0x78_vv2_776_l1},
|
|
/*h(3478)=777 */ {3478, xed3_phash_find_mapevex_map1_opcode0x78_vv2_777_l1},
|
|
/*h(1504)=778 */ {1504, xed3_phash_find_mapevex_map1_opcode0x78_vv2_778_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16864)=781 */ {16864, xed3_phash_find_mapevex_map1_opcode0x78_vv2_781_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5541)=783 */ {5541, xed3_phash_find_mapevex_map1_opcode0x78_vv2_783_l1},
|
|
/*h(3567)=784 */ {3567, xed3_phash_find_mapevex_map1_opcode0x78_vv2_784_l1},
|
|
/*h(21888)=785 */ {21888, xed3_phash_find_mapevex_map1_opcode0x78_vv2_785_l1},
|
|
/*h(20901)=786 */ {20901, xed3_phash_find_mapevex_map1_opcode0x78_vv2_786_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8591)=788 */ {8591, xed3_phash_find_mapevex_map1_opcode0x78_vv2_788_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1449)=790 */ {1449, xed3_phash_find_mapevex_map1_opcode0x78_vv2_790_l1},
|
|
/*h(462)=791 */ {462, xed3_phash_find_mapevex_map1_opcode0x78_vv2_791_l1},
|
|
/*h(17796)=792 */ {17796, xed3_phash_find_mapevex_map1_opcode0x78_vv2_792_l1},
|
|
/*h(16809)=793 */ {16809, xed3_phash_find_mapevex_map1_opcode0x78_vv2_793_l1},
|
|
/*h(15822)=794 */ {15822, xed3_phash_find_mapevex_map1_opcode0x78_vv2_794_l1},
|
|
/*h(9667)=795 */ {9667, xed3_phash_find_mapevex_map1_opcode0x78_vv2_795_l1},
|
|
/*h(8680)=796 */ {8680, xed3_phash_find_mapevex_map1_opcode0x78_vv2_796_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25027)=798 */ {25027, xed3_phash_find_mapevex_map1_opcode0x78_vv2_798_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12717)=800 */ {12717, xed3_phash_find_mapevex_map1_opcode0x78_vv2_800_l1},
|
|
/*h(11730)=801 */ {11730, xed3_phash_find_mapevex_map1_opcode0x78_vv2_801_l1},
|
|
/*h(5575)=802 */ {5575, xed3_phash_find_mapevex_map1_opcode0x78_vv2_802_l1},
|
|
/*h(407)=803 */ {407, xed3_phash_find_mapevex_map1_opcode0x78_vv2_803_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21922)=805 */ {21922, xed3_phash_find_mapevex_map1_opcode0x78_vv2_805_l1},
|
|
/*h(15767)=806 */ {15767, xed3_phash_find_mapevex_map1_opcode0x78_vv2_806_l1},
|
|
/*h(9612)=807 */ {9612, xed3_phash_find_mapevex_map1_opcode0x78_vv2_807_l1},
|
|
/*h(7638)=808 */ {7638, xed3_phash_find_mapevex_map1_opcode0x78_vv2_808_l1},
|
|
/*h(2470)=809 */ {2470, xed3_phash_find_mapevex_map1_opcode0x78_vv2_809_l1},
|
|
/*h(1483)=810 */ {1483, xed3_phash_find_mapevex_map1_opcode0x78_vv2_810_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17830)=812 */ {17830, xed3_phash_find_mapevex_map1_opcode0x78_vv2_812_l1},
|
|
/*h(16843)=813 */ {16843, xed3_phash_find_mapevex_map1_opcode0x78_vv2_813_l1},
|
|
/*h(5520)=814 */ {5520, xed3_phash_find_mapevex_map1_opcode0x78_vv2_814_l1},
|
|
/*h(9701)=815 */ {9701, xed3_phash_find_mapevex_map1_opcode0x78_vv2_815_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26048)=817 */ {26048, xed3_phash_find_mapevex_map1_opcode0x78_vv2_817_l1},
|
|
/*h(25061)=818 */ {25061, xed3_phash_find_mapevex_map1_opcode0x78_vv2_818_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12751)=820 */ {12751, xed3_phash_find_mapevex_map1_opcode0x78_vv2_820_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30085)=822 */ {30085, xed3_phash_find_mapevex_map1_opcode0x78_vv2_822_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21956)=824 */ {21956, xed3_phash_find_mapevex_map1_opcode0x78_vv2_824_l1},
|
|
/*h(16788)=825 */ {16788, xed3_phash_find_mapevex_map1_opcode0x78_vv2_825_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9646)=827 */ {9646, xed3_phash_find_mapevex_map1_opcode0x78_vv2_827_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25993)=829 */ {25993, xed3_phash_find_mapevex_map1_opcode0x78_vv2_829_l1},
|
|
/*h(25006)=830 */ {25006, xed3_phash_find_mapevex_map1_opcode0x78_vv2_830_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17864)=832 */ {17864, xed3_phash_find_mapevex_map1_opcode0x78_vv2_832_l1},
|
|
/*h(10722)=833 */ {10722, xed3_phash_find_mapevex_map1_opcode0x78_vv2_833_l1},
|
|
/*h(5554)=834 */ {5554, xed3_phash_find_mapevex_map1_opcode0x78_vv2_834_l1},
|
|
/*h(4567)=835 */ {4567, xed3_phash_find_mapevex_map1_opcode0x78_vv2_835_l1},
|
|
/*h(21901)=836 */ {21901, xed3_phash_find_mapevex_map1_opcode0x78_vv2_836_l1},
|
|
/*h(20914)=837 */ {20914, xed3_phash_find_mapevex_map1_opcode0x78_vv2_837_l1},
|
|
/*h(15746)=838 */ {15746, xed3_phash_find_mapevex_map1_opcode0x78_vv2_838_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30119)=841 */ {30119, xed3_phash_find_mapevex_map1_opcode0x78_vv2_841_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17809)=844 */ {17809, xed3_phash_find_mapevex_map1_opcode0x78_vv2_844_l1},
|
|
/*h(11654)=845 */ {11654, xed3_phash_find_mapevex_map1_opcode0x78_vv2_845_l1},
|
|
/*h(9680)=846 */ {9680, xed3_phash_find_mapevex_map1_opcode0x78_vv2_846_l1},
|
|
/*h(4512)=847 */ {4512, xed3_phash_find_mapevex_map1_opcode0x78_vv2_847_l1},
|
|
/*h(2538)=848 */ {2538, xed3_phash_find_mapevex_map1_opcode0x78_vv2_848_l1},
|
|
/*h(26027)=849 */ {26027, xed3_phash_find_mapevex_map1_opcode0x78_vv2_849_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13717)=851 */ {13717, xed3_phash_find_mapevex_map1_opcode0x78_vv2_851_l1},
|
|
/*h(7562)=852 */ {7562, xed3_phash_find_mapevex_map1_opcode0x78_vv2_852_l1},
|
|
/*h(6575)=853 */ {6575, xed3_phash_find_mapevex_map1_opcode0x78_vv2_853_l1},
|
|
/*h(5588)=854 */ {5588, xed3_phash_find_mapevex_map1_opcode0x78_vv2_854_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21935)=856 */ {21935, xed3_phash_find_mapevex_map1_opcode0x78_vv2_856_l1},
|
|
/*h(20948)=857 */ {20948, xed3_phash_find_mapevex_map1_opcode0x78_vv2_857_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3470)=859 */ {3470, xed3_phash_find_mapevex_map1_opcode0x78_vv2_859_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17843)=863 */ {17843, xed3_phash_find_mapevex_map1_opcode0x78_vv2_863_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9714)=866 */ {9714, xed3_phash_find_mapevex_map1_opcode0x78_vv2_866_l1},
|
|
/*h(3559)=867 */ {3559, xed3_phash_find_mapevex_map1_opcode0x78_vv2_867_l1},
|
|
/*h(26061)=868 */ {26061, xed3_phash_find_mapevex_map1_opcode0x78_vv2_868_l1},
|
|
/*h(25074)=869 */ {25074, xed3_phash_find_mapevex_map1_opcode0x78_vv2_869_l1},
|
|
/*h(14738)=870 */ {14738, xed3_phash_find_mapevex_map1_opcode0x78_vv2_870_l1},
|
|
/*h(13751)=871 */ {13751, xed3_phash_find_mapevex_map1_opcode0x78_vv2_871_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1441)=873 */ {1441, xed3_phash_find_mapevex_map1_opcode0x78_vv2_873_l1},
|
|
/*h(29111)=874 */ {29111, xed3_phash_find_mapevex_map1_opcode0x78_vv2_874_l1},
|
|
/*h(21969)=875 */ {21969, xed3_phash_find_mapevex_map1_opcode0x78_vv2_875_l1},
|
|
/*h(16801)=876 */ {16801, xed3_phash_find_mapevex_map1_opcode0x78_vv2_876_l1},
|
|
/*h(15814)=877 */ {15814, xed3_phash_find_mapevex_map1_opcode0x78_vv2_877_l1},
|
|
/*h(4491)=878 */ {4491, xed3_phash_find_mapevex_map1_opcode0x78_vv2_878_l1},
|
|
/*h(8672)=879 */ {8672, xed3_phash_find_mapevex_map1_opcode0x78_vv2_879_l1},
|
|
/*h(26006)=880 */ {26006, xed3_phash_find_mapevex_map1_opcode0x78_vv2_880_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17877)=883 */ {17877, xed3_phash_find_mapevex_map1_opcode0x78_vv2_883_l1},
|
|
/*h(11722)=884 */ {11722, xed3_phash_find_mapevex_map1_opcode0x78_vv2_884_l1},
|
|
/*h(10735)=885 */ {10735, xed3_phash_find_mapevex_map1_opcode0x78_vv2_885_l1},
|
|
/*h(399)=886 */ {399, xed3_phash_find_mapevex_map1_opcode0x78_vv2_886_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26095)=888 */ {26095, xed3_phash_find_mapevex_map1_opcode0x78_vv2_888_l1},
|
|
/*h(15759)=889 */ {15759, xed3_phash_find_mapevex_map1_opcode0x78_vv2_889_l1},
|
|
/*h(9604)=890 */ {9604, xed3_phash_find_mapevex_map1_opcode0x78_vv2_890_l1},
|
|
/*h(7630)=891 */ {7630, xed3_phash_find_mapevex_map1_opcode0x78_vv2_891_l1},
|
|
/*h(1475)=892 */ {1475, xed3_phash_find_mapevex_map1_opcode0x78_vv2_892_l1},
|
|
/*h(24964)=893 */ {24964, xed3_phash_find_mapevex_map1_opcode0x78_vv2_893_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22003)=895 */ {22003, xed3_phash_find_mapevex_map1_opcode0x78_vv2_895_l1},
|
|
/*h(16835)=896 */ {16835, xed3_phash_find_mapevex_map1_opcode0x78_vv2_896_l1},
|
|
/*h(5512)=897 */ {5512, xed3_phash_find_mapevex_map1_opcode0x78_vv2_897_l1},
|
|
/*h(4525)=898 */ {4525, xed3_phash_find_mapevex_map1_opcode0x78_vv2_898_l1},
|
|
/*h(3538)=899 */ {3538, xed3_phash_find_mapevex_map1_opcode0x78_vv2_899_l1},
|
|
/*h(20872)=900 */ {20872, xed3_phash_find_mapevex_map1_opcode0x78_vv2_900_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17911)=902 */ {17911, xed3_phash_find_mapevex_map1_opcode0x78_vv2_902_l1},
|
|
/*h(7575)=903 */ {7575, xed3_phash_find_mapevex_map1_opcode0x78_vv2_903_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1420)=905 */ {1420, xed3_phash_find_mapevex_map1_opcode0x78_vv2_905_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16780)=908 */ {16780, xed3_phash_find_mapevex_map1_opcode0x78_vv2_908_l1},
|
|
/*h(14806)=909 */ {14806, xed3_phash_find_mapevex_map1_opcode0x78_vv2_909_l1},
|
|
/*h(9638)=910 */ {9638, xed3_phash_find_mapevex_map1_opcode0x78_vv2_910_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25985)=912 */ {25985, xed3_phash_find_mapevex_map1_opcode0x78_vv2_912_l1},
|
|
/*h(24998)=913 */ {24998, xed3_phash_find_mapevex_map1_opcode0x78_vv2_913_l1},
|
|
/*h(17856)=914 */ {17856, xed3_phash_find_mapevex_map1_opcode0x78_vv2_914_l1},
|
|
/*h(16869)=915 */ {16869, xed3_phash_find_mapevex_map1_opcode0x78_vv2_915_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5546)=917 */ {5546, xed3_phash_find_mapevex_map1_opcode0x78_vv2_917_l1},
|
|
/*h(4559)=918 */ {4559, xed3_phash_find_mapevex_map1_opcode0x78_vv2_918_l1},
|
|
/*h(21893)=919 */ {21893, xed3_phash_find_mapevex_map1_opcode0x78_vv2_919_l1},
|
|
/*h(20906)=920 */ {20906, xed3_phash_find_mapevex_map1_opcode0x78_vv2_920_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8596)=922 */ {8596, xed3_phash_find_mapevex_map1_opcode0x78_vv2_922_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1454)=924 */ {1454, xed3_phash_find_mapevex_map1_opcode0x78_vv2_924_l1},
|
|
/*h(467)=925 */ {467, xed3_phash_find_mapevex_map1_opcode0x78_vv2_925_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17801)=927 */ {17801, xed3_phash_find_mapevex_map1_opcode0x78_vv2_927_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9672)=929 */ {9672, xed3_phash_find_mapevex_map1_opcode0x78_vv2_929_l1},
|
|
/*h(8685)=930 */ {8685, xed3_phash_find_mapevex_map1_opcode0x78_vv2_930_l1},
|
|
/*h(2530)=931 */ {2530, xed3_phash_find_mapevex_map1_opcode0x78_vv2_931_l1},
|
|
/*h(26019)=932 */ {26019, xed3_phash_find_mapevex_map1_opcode0x78_vv2_932_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13709)=934 */ {13709, xed3_phash_find_mapevex_map1_opcode0x78_vv2_934_l1},
|
|
/*h(11735)=935 */ {11735, xed3_phash_find_mapevex_map1_opcode0x78_vv2_935_l1},
|
|
/*h(5580)=936 */ {5580, xed3_phash_find_mapevex_map1_opcode0x78_vv2_936_l1},
|
|
/*h(29069)=937 */ {29069, xed3_phash_find_mapevex_map1_opcode0x78_vv2_937_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21927)=939 */ {21927, xed3_phash_find_mapevex_map1_opcode0x78_vv2_939_l1},
|
|
/*h(20940)=940 */ {20940, xed3_phash_find_mapevex_map1_opcode0x78_vv2_940_l1},
|
|
/*h(9617)=941 */ {9617, xed3_phash_find_mapevex_map1_opcode0x78_vv2_941_l1},
|
|
/*h(3462)=942 */ {3462, xed3_phash_find_mapevex_map1_opcode0x78_vv2_942_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1488)=944 */ {1488, xed3_phash_find_mapevex_map1_opcode0x78_vv2_944_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17835)=946 */ {17835, xed3_phash_find_mapevex_map1_opcode0x78_vv2_946_l1},
|
|
/*h(16848)=947 */ {16848, xed3_phash_find_mapevex_map1_opcode0x78_vv2_947_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5525)=949 */ {5525, xed3_phash_find_mapevex_map1_opcode0x78_vv2_949_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26053)=951 */ {26053, xed3_phash_find_mapevex_map1_opcode0x78_vv2_951_l1},
|
|
/*h(20885)=952 */ {20885, xed3_phash_find_mapevex_map1_opcode0x78_vv2_952_l1},
|
|
/*h(13743)=953 */ {13743, xed3_phash_find_mapevex_map1_opcode0x78_vv2_953_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5614)=956 */ {5614, xed3_phash_find_mapevex_map1_opcode0x78_vv2_956_l1},
|
|
/*h(29103)=957 */ {29103, xed3_phash_find_mapevex_map1_opcode0x78_vv2_957_l1},
|
|
/*h(21961)=958 */ {21961, xed3_phash_find_mapevex_map1_opcode0x78_vv2_958_l1},
|
|
/*h(20974)=959 */ {20974, xed3_phash_find_mapevex_map1_opcode0x78_vv2_959_l1},
|
|
/*h(10638)=960 */ {10638, xed3_phash_find_mapevex_map1_opcode0x78_vv2_960_l1},
|
|
/*h(9651)=961 */ {9651, xed3_phash_find_mapevex_map1_opcode0x78_vv2_961_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25998)=963 */ {25998, xed3_phash_find_mapevex_map1_opcode0x78_vv2_963_l1},
|
|
/*h(25011)=964 */ {25011, xed3_phash_find_mapevex_map1_opcode0x78_vv2_964_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17869)=966 */ {17869, xed3_phash_find_mapevex_map1_opcode0x78_vv2_966_l1},
|
|
/*h(11714)=967 */ {11714, xed3_phash_find_mapevex_map1_opcode0x78_vv2_967_l1},
|
|
/*h(5559)=968 */ {5559, xed3_phash_find_mapevex_map1_opcode0x78_vv2_968_l1},
|
|
/*h(391)=969 */ {391, xed3_phash_find_mapevex_map1_opcode0x78_vv2_969_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21906)=971 */ {21906, xed3_phash_find_mapevex_map1_opcode0x78_vv2_971_l1},
|
|
/*h(15751)=972 */ {15751, xed3_phash_find_mapevex_map1_opcode0x78_vv2_972_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7622)=974 */ {7622, xed3_phash_find_mapevex_map1_opcode0x78_vv2_974_l1},
|
|
/*h(2454)=975 */ {2454, xed3_phash_find_mapevex_map1_opcode0x78_vv2_975_l1},
|
|
/*h(480)=976 */ {480, xed3_phash_find_mapevex_map1_opcode0x78_vv2_976_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17814)=978 */ {17814, xed3_phash_find_mapevex_map1_opcode0x78_vv2_978_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5504)=980 */ {5504, xed3_phash_find_mapevex_map1_opcode0x78_vv2_980_l1},
|
|
/*h(4517)=981 */ {4517, xed3_phash_find_mapevex_map1_opcode0x78_vv2_981_l1},
|
|
/*h(3530)=982 */ {3530, xed3_phash_find_mapevex_map1_opcode0x78_vv2_982_l1},
|
|
/*h(26032)=983 */ {26032, xed3_phash_find_mapevex_map1_opcode0x78_vv2_983_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17903)=985 */ {17903, xed3_phash_find_mapevex_map1_opcode0x78_vv2_985_l1},
|
|
/*h(7567)=986 */ {7567, xed3_phash_find_mapevex_map1_opcode0x78_vv2_986_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1412)=988 */ {1412, xed3_phash_find_mapevex_map1_opcode0x78_vv2_988_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21940)=990 */ {21940, xed3_phash_find_mapevex_map1_opcode0x78_vv2_990_l1},
|
|
/*h(16772)=991 */ {16772, xed3_phash_find_mapevex_map1_opcode0x78_vv2_991_l1},
|
|
/*h(14798)=992 */ {14798, xed3_phash_find_mapevex_map1_opcode0x78_vv2_992_l1},
|
|
/*h(8643)=993 */ {8643, xed3_phash_find_mapevex_map1_opcode0x78_vv2_993_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10706)=999 */ {10706, xed3_phash_find_mapevex_map1_opcode0x78_vv2_999_l1},
|
|
/*h(5538)=1000 */ {5538, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1000_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26066)=1002 */ {26066, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1002_l1},
|
|
/*h(20898)=1003 */ {20898, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1003_l1},
|
|
/*h(14743)=1004 */ {14743, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1004_l1},
|
|
/*h(8588)=1005 */ {8588, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1005_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30103)=1007 */ {30103, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1007_l1},
|
|
/*h(459)=1008 */ {459, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1008_l1},
|
|
/*h(17793)=1009 */ {17793, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1009_l1},
|
|
/*h(21974)=1010 */ {21974, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1010_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9664)=1012 */ {9664, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1012_l1},
|
|
/*h(4496)=1013 */ {4496, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1013_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25024)=1015 */ {25024, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1015_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13701)=1017 */ {13701, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1017_l1},
|
|
/*h(11727)=1018 */ {11727, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1018_l1},
|
|
/*h(5572)=1019 */ {5572, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1019_l1},
|
|
/*h(404)=1020 */ {404, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1020_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26100)=1022 */ {26100, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1022_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9609)=1024 */ {9609, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1024_l1},
|
|
/*h(8622)=1025 */ {8622, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1025_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1480)=1027 */ {1480, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1027_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17827)=1029 */ {17827, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1029_l1},
|
|
/*h(16840)=1030 */ {16840, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1030_l1},
|
|
/*h(5517)=1031 */ {5517, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1031_l1},
|
|
/*h(9698)=1032 */ {9698, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1032_l1},
|
|
/*h(3543)=1033 */ {3543, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1033_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20877)=1035 */ {20877, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1035_l1},
|
|
/*h(13735)=1036 */ {13735, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1036_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1425)=1039 */ {1425, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1039_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21953)=1041 */ {21953, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1041_l1},
|
|
/*h(16785)=1042 */ {16785, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1042_l1},
|
|
/*h(10630)=1043 */ {10630, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1043_l1},
|
|
/*h(9643)=1044 */ {9643, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1044_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25990)=1046 */ {25990, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1046_l1},
|
|
/*h(25003)=1047 */ {25003, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1047_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17861)=1049 */ {17861, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1049_l1},
|
|
/*h(6538)=1050 */ {6538, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1050_l1},
|
|
/*h(5551)=1051 */ {5551, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1051_l1},
|
|
/*h(4564)=1052 */ {4564, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1052_l1},
|
|
/*h(21898)=1053 */ {21898, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1053_l1},
|
|
/*h(20911)=1054 */ {20911, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1054_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1459)=1058 */ {1459, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1058_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17806)=1061 */ {17806, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1061_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9677)=1063 */ {9677, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1063_l1},
|
|
/*h(3522)=1064 */ {3522, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1064_l1},
|
|
/*h(2535)=1065 */ {2535, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1065_l1},
|
|
/*h(26024)=1066 */ {26024, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1066_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17895)=1068 */ {17895, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1068_l1},
|
|
/*h(7559)=1069 */ {7559, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1069_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5585)=1071 */ {5585, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1071_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21932)=1073 */ {21932, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1073_l1},
|
|
/*h(20945)=1074 */ {20945, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1074_l1},
|
|
/*h(9622)=1075 */ {9622, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1075_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1493)=1078 */ {1493, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1078_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17840)=1080 */ {17840, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1080_l1},
|
|
/*h(16853)=1081 */ {16853, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1081_l1},
|
|
/*h(10698)=1082 */ {10698, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1082_l1},
|
|
/*h(9711)=1083 */ {9711, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1083_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26058)=1085 */ {26058, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1085_l1},
|
|
/*h(25071)=1086 */ {25071, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1086_l1},
|
|
/*h(14735)=1087 */ {14735, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1087_l1},
|
|
/*h(8580)=1088 */ {8580, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1088_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30095)=1090 */ {30095, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1090_l1},
|
|
/*h(451)=1091 */ {451, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1091_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21966)=1093 */ {21966, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1093_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4488)=1095 */ {4488, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1095_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26003)=1097 */ {26003, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1097_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17874)=1100 */ {17874, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1100_l1},
|
|
/*h(11719)=1101 */ {11719, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1101_l1},
|
|
/*h(6551)=1102 */ {6551, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1102_l1},
|
|
/*h(396)=1103 */ {396, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21911)=1105 */ {21911, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1105_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9601)=1107 */ {9601, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1107_l1},
|
|
/*h(8614)=1108 */ {8614, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1108_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1472)=1110 */ {1472, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1110_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22000)=1112 */ {22000, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1112_l1},
|
|
/*h(16832)=1113 */ {16832, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1113_l1},
|
|
/*h(5509)=1114 */ {5509, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1114_l1},
|
|
/*h(4522)=1115 */ {4522, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1115_l1},
|
|
/*h(3535)=1116 */ {3535, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1116_l1},
|
|
/*h(26037)=1117 */ {26037, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1117_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17908)=1119 */ {17908, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1119_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1417)=1122 */ {1417, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15790)=1125 */ {15790, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9635)=1127 */ {9635, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1506)=1129 */ {1506, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1129_l1},
|
|
/*h(24995)=1130 */ {24995, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12685)=1132 */ {12685, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1132_l1},
|
|
/*h(10711)=1133 */ {10711, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1133_l1},
|
|
/*h(5543)=1134 */ {5543, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1134_l1},
|
|
/*h(4556)=1135 */ {4556, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1135_l1},
|
|
/*h(21890)=1136 */ {21890, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1136_l1},
|
|
/*h(26071)=1137 */ {26071, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8593)=1139 */ {8593, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1139_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1451)=1141 */ {1451, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1141_l1},
|
|
/*h(464)=1142 */ {464, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1142_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17798)=1144 */ {17798, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1144_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9669)=1146 */ {9669, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1146_l1},
|
|
/*h(4501)=1147 */ {4501, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26016)=1149 */ {26016, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1149_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12719)=1152 */ {12719, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5577)=1154 */ {5577, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21924)=1156 */ {21924, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1156_l1},
|
|
/*h(20937)=1157 */ {20937, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1157_l1},
|
|
/*h(9614)=1158 */ {9614, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1158_l1},
|
|
/*h(8627)=1159 */ {8627, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1485)=1161 */ {1485, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1161_l1},
|
|
/*h(498)=1162 */ {498, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1162_l1},
|
|
/*h(17832)=1163 */ {17832, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1163_l1},
|
|
/*h(16845)=1164 */ {16845, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1164_l1},
|
|
/*h(10690)=1165 */ {10690, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1165_l1},
|
|
/*h(5522)=1166 */ {5522, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1166_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26050)=1168 */ {26050, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1168_l1},
|
|
/*h(20882)=1169 */ {20882, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1169_l1},
|
|
/*h(14727)=1170 */ {14727, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6598)=1172 */ {6598, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1172_l1},
|
|
/*h(30087)=1173 */ {30087, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21958)=1175 */ {21958, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1175_l1},
|
|
/*h(16790)=1176 */ {16790, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9648)=1178 */ {9648, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1178_l1},
|
|
/*h(8661)=1179 */ {8661, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1179_l1},
|
|
/*h(25995)=1180 */ {25995, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1180_l1},
|
|
/*h(25008)=1181 */ {25008, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1181_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17866)=1183 */ {17866, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1183_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5556)=1185 */ {5556, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1185_l1},
|
|
/*h(388)=1186 */ {388, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1186_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21903)=1188 */ {21903, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1188_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17811)=1195 */ {17811, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1195_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9682)=1197 */ {9682, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1197_l1},
|
|
/*h(4514)=1198 */ {4514, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1198_l1},
|
|
/*h(3527)=1199 */ {3527, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1199_l1},
|
|
/*h(26029)=1200 */ {26029, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1200_l1},
|
|
/*h(25042)=1201 */ {25042, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1201_l1},
|
|
/*h(13719)=1202 */ {13719, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1409)=1205 */ {1409, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1205_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21937)=1207 */ {21937, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1207_l1},
|
|
/*h(15782)=1208 */ {15782, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8640)=1210 */ {8640, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1210_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17845)=1214 */ {17845, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1214_l1},
|
|
/*h(12677)=1215 */ {12677, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1215_l1},
|
|
/*h(11690)=1216 */ {11690, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1216_l1},
|
|
/*h(9716)=1217 */ {9716, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1217_l1},
|
|
/*h(4548)=1218 */ {4548, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1218_l1},
|
|
/*h(26063)=1219 */ {26063, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1219_l1},
|
|
/*h(25076)=1220 */ {25076, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8585)=1222 */ {8585, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1222_l1},
|
|
/*h(7598)=1223 */ {7598, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1223_l1},
|
|
/*h(1443)=1224 */ {1443, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1224_l1},
|
|
/*h(456)=1225 */ {456, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21971)=1227 */ {21971, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4493)=1230 */ {4493, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1230_l1},
|
|
/*h(2519)=1231 */ {2519, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1231_l1},
|
|
/*h(30189)=1232 */ {30189, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1232_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17879)=1234 */ {17879, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1234_l1},
|
|
/*h(12711)=1235 */ {12711, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1235_l1},
|
|
/*h(5569)=1236 */ {5569, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1236_l1},
|
|
/*h(401)=1237 */ {401, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1237_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26097)=1239 */ {26097, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1239_l1},
|
|
/*h(20929)=1240 */ {20929, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1240_l1},
|
|
/*h(9606)=1241 */ {9606, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1241_l1},
|
|
/*h(8619)=1242 */ {8619, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1242_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1477)=1244 */ {1477, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17824)=1246 */ {17824, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1246_l1},
|
|
/*h(16837)=1247 */ {16837, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1247_l1},
|
|
/*h(15850)=1248 */ {15850, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1248_l1},
|
|
/*h(5514)=1249 */ {5514, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1249_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20874)=1252 */ {20874, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1252_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11758)=1255 */ {11758, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1255_l1},
|
|
/*h(1422)=1256 */ {1422, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1256_l1},
|
|
/*h(435)=1257 */ {435, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1257_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16782)=1259 */ {16782, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9640)=1261 */ {9640, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25987)=1263 */ {25987, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1263_l1},
|
|
/*h(25000)=1264 */ {25000, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1264_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17858)=1266 */ {17858, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1266_l1},
|
|
/*h(6535)=1267 */ {6535, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1267_l1},
|
|
/*h(5548)=1268 */ {5548, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1268_l1},
|
|
/*h(4561)=1269 */ {4561, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1269_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21895)=1271 */ {21895, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1271_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8598)=1274 */ {8598, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1274_l1},
|
|
/*h(1456)=1275 */ {1456, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1275_l1},
|
|
/*h(469)=1276 */ {469, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17803)=1278 */ {17803, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1278_l1},
|
|
/*h(16816)=1279 */ {16816, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1279_l1},
|
|
/*h(9674)=1280 */ {9674, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1280_l1},
|
|
/*h(8687)=1281 */ {8687, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26021)=1283 */ {26021, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13711)=1285 */ {13711, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1285_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5582)=1288 */ {5582, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1288_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21929)=1290 */ {21929, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1290_l1},
|
|
/*h(20942)=1291 */ {20942, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1291_l1},
|
|
/*h(9619)=1292 */ {9619, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1292_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1490)=1295 */ {1490, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1295_l1},
|
|
/*h(24979)=1296 */ {24979, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1296_l1},
|
|
/*h(17837)=1297 */ {17837, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1297_l1},
|
|
/*h(16850)=1298 */ {16850, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1298_l1},
|
|
/*h(11682)=1299 */ {11682, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1299_l1},
|
|
/*h(5527)=1300 */ {5527, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1300_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26055)=1302 */ {26055, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1302_l1},
|
|
/*h(20887)=1303 */ {20887, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1303_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8577)=1305 */ {8577, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1305_l1},
|
|
/*h(7590)=1306 */ {7590, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1306_l1},
|
|
/*h(5616)=1307 */ {5616, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1307_l1},
|
|
/*h(448)=1308 */ {448, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1308_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21963)=1310 */ {21963, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1310_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9653)=1312 */ {9653, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1312_l1},
|
|
/*h(3498)=1313 */ {3498, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1313_l1},
|
|
/*h(26000)=1314 */ {26000, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1314_l1},
|
|
/*h(30181)=1315 */ {30181, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17871)=1317 */ {17871, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1317_l1},
|
|
/*h(16884)=1318 */ {16884, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1318_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(393)=1320 */ {393, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21908)=1322 */ {21908, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1322_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(14766)=1324 */ {14766, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1324_l1},
|
|
/*h(8611)=1325 */ {8611, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(482)=1327 */ {482, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1327_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21997)=1329 */ {21997, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1329_l1},
|
|
/*h(15842)=1330 */ {15842, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1330_l1},
|
|
/*h(5506)=1331 */ {5506, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1331_l1},
|
|
/*h(9687)=1332 */ {9687, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26034)=1334 */ {26034, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1334_l1},
|
|
/*h(20866)=1335 */ {20866, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17905)=1337 */ {17905, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1337_l1},
|
|
/*h(11750)=1338 */ {11750, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1338_l1},
|
|
/*h(1414)=1339 */ {1414, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1339_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21942)=1341 */ {21942, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1341_l1},
|
|
/*h(16774)=1342 */ {16774, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1342_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9632)=1344 */ {9632, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1344_l1},
|
|
/*h(7658)=1345 */ {7658, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24992)=1347 */ {24992, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1347_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11695)=1350 */ {11695, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1350_l1},
|
|
/*h(5540)=1351 */ {5540, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1351_l1},
|
|
/*h(3566)=1352 */ {3566, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1352_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26068)=1354 */ {26068, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8590)=1357 */ {8590, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1357_l1},
|
|
/*h(1448)=1358 */ {1448, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1358_l1},
|
|
/*h(461)=1359 */ {461, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1359_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17795)=1361 */ {17795, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1361_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9666)=1363 */ {9666, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1363_l1},
|
|
/*h(4498)=1364 */ {4498, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25026)=1366 */ {25026, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1366_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13703)=1368 */ {13703, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1368_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5574)=1371 */ {5574, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1371_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21921)=1373 */ {21921, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1373_l1},
|
|
/*h(15766)=1374 */ {15766, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1374_l1},
|
|
/*h(9611)=1375 */ {9611, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1375_l1},
|
|
/*h(8624)=1376 */ {8624, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1376_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1482)=1378 */ {1482, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1378_l1},
|
|
/*h(495)=1379 */ {495, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1379_l1},
|
|
/*h(17829)=1380 */ {17829, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1380_l1},
|
|
/*h(16842)=1381 */ {16842, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1381_l1},
|
|
/*h(15855)=1382 */ {15855, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1382_l1},
|
|
/*h(5519)=1383 */ {5519, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20879)=1386 */ {20879, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1386_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1427)=1390 */ {1427, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1390_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21955)=1393 */ {21955, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1393_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9645)=1395 */ {9645, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1395_l1},
|
|
/*h(3490)=1396 */ {3490, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1396_l1},
|
|
/*h(25992)=1397 */ {25992, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1397_l1},
|
|
/*h(1516)=1398 */ {1516, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1398_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17863)=1400 */ {17863, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1400_l1},
|
|
/*h(16876)=1401 */ {16876, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1401_l1},
|
|
/*h(5553)=1402 */ {5553, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1402_l1},
|
|
/*h(385)=1403 */ {385, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21900)=1405 */ {21900, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1405_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(14758)=1407 */ {14758, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1407_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1461)=1410 */ {1461, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1410_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17808)=1412 */ {17808, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1412_l1},
|
|
/*h(16821)=1413 */ {16821, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1413_l1},
|
|
/*h(10666)=1414 */ {10666, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1414_l1},
|
|
/*h(9679)=1415 */ {9679, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26026)=1417 */ {26026, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1417_l1},
|
|
/*h(25039)=1418 */ {25039, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1418_l1},
|
|
/*h(17897)=1419 */ {17897, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1419_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6574)=1421 */ {6574, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1421_l1},
|
|
/*h(5587)=1422 */ {5587, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1422_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21934)=1424 */ {21934, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1424_l1},
|
|
/*h(20947)=1425 */ {20947, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1425_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13805)=1427 */ {13805, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1427_l1},
|
|
/*h(7650)=1428 */ {7650, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1428_l1},
|
|
/*h(1495)=1429 */ {1495, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1429_l1},
|
|
/*h(29165)=1430 */ {29165, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1430_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17842)=1432 */ {17842, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1432_l1},
|
|
/*h(11687)=1433 */ {11687, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1433_l1},
|
|
/*h(9713)=1434 */ {9713, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1434_l1},
|
|
/*h(3558)=1435 */ {3558, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26060)=1437 */ {26060, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1437_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8582)=1439 */ {8582, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1439_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1440)=1441 */ {1440, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1441_l1},
|
|
/*h(453)=1442 */ {453, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21968)=1444 */ {21968, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1444_l1},
|
|
/*h(20981)=1445 */ {20981, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1445_l1},
|
|
/*h(14826)=1446 */ {14826, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1446_l1},
|
|
/*h(3503)=1447 */ {3503, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26005)=1449 */ {26005, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1449_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17876)=1451 */ {17876, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1451_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10734)=1453 */ {10734, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1453_l1},
|
|
/*h(398)=1454 */ {398, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1454_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26094)=1456 */ {26094, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1456_l1},
|
|
/*h(15758)=1457 */ {15758, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1457_l1},
|
|
/*h(9603)=1458 */ {9603, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1458_l1},
|
|
/*h(8616)=1459 */ {8616, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1459_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1474)=1461 */ {1474, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1461_l1},
|
|
/*h(487)=1462 */ {487, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1462_l1},
|
|
/*h(22002)=1463 */ {22002, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1463_l1},
|
|
/*h(11666)=1464 */ {11666, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1464_l1},
|
|
/*h(15847)=1465 */ {15847, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1465_l1},
|
|
/*h(5511)=1466 */ {5511, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1466_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26039)=1468 */ {26039, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1468_l1},
|
|
/*h(20871)=1469 */ {20871, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1469_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17910)=1471 */ {17910, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1471_l1},
|
|
/*h(7574)=1472 */ {7574, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1472_l1},
|
|
/*h(1419)=1473 */ {1419, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1473_l1},
|
|
/*h(432)=1474 */ {432, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1474_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16779)=1476 */ {16779, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1476_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9637)=1478 */ {9637, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1478_l1},
|
|
/*h(7663)=1479 */ {7663, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1479_l1},
|
|
/*h(25984)=1480 */ {25984, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1480_l1},
|
|
/*h(24997)=1481 */ {24997, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1481_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12687)=1483 */ {12687, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1483_l1},
|
|
/*h(16868)=1484 */ {16868, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1484_l1},
|
|
/*h(5545)=1485 */ {5545, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1485_l1},
|
|
/*h(4558)=1486 */ {4558, xed3_phash_find_mapevex_map1_opcode0x78_vv2_1486_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 1488ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8644)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8644;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25028)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_93_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8676)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8676, 4201},
|
|
/*h(4495)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4495, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25060)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25060, 4201},
|
|
/*h(20879)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20879, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8652)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8652;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25036)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25036;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_10_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8684)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8684, 4201},
|
|
/*h(4503)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4503, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25068)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25068, 4201},
|
|
/*h(20887)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20887, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8660)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8660;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25044)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25044;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8692)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8692, 4201},
|
|
/*h(9679)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9679, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25076)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25076;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_776_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8646)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25030)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8678)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8678, 4201},
|
|
/*h(4497)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4497, 4242},
|
|
/*h(9665)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9665, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20881)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20881, 4242},
|
|
/*h(25062)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25062, 4201},
|
|
/*h(26049)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26049, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_693_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8654)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25038)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8686)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8686, 4201},
|
|
/*h(9673)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9673, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25070)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25070, 4201},
|
|
/*h(26057)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26057, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4481)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4481, 4242},
|
|
/*h(8662)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8662, 4201},
|
|
/*h(9649)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9649, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25046)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25046, 4201},
|
|
/*h(20865)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20865, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9681)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9681, 6083},
|
|
/*h(4513)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4513, 4242},
|
|
/*h(8694)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {8694, 4201}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_83_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25078)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {25078, 4201},
|
|
/*h(20897)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20897, 4242},
|
|
/*h(26065)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26065, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(453)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 453;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16837)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_649_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5536)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5536, 6094},
|
|
/*h(9717)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9717, 6082},
|
|
/*h(4549)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4549, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20933)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20933, 4202},
|
|
/*h(26101)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26101, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8645)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8645, 4202},
|
|
/*h(13813)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13813, 6082},
|
|
/*h(9632)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9632, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26016)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26016, 6097},
|
|
/*h(30197)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30197, 6082},
|
|
/*h(25029)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25029, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_552_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11754)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11754, 4296},
|
|
/*h(12741)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12741, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1455)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1455, 6096},
|
|
/*h(468)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {468, 4204},
|
|
/*h(29125)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29125, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(485)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {485, 4202},
|
|
/*h(24961)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24961, 4238},
|
|
/*h(1472)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1472, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_915_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16869)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16869;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(400)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {400, 4240},
|
|
/*h(4581)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4581, 4202},
|
|
/*h(5568)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5568, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20965)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20965, 4202},
|
|
/*h(21952)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21952, 6080},
|
|
/*h(16784)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16784, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1013_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4496)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4496, 4242},
|
|
/*h(8677)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8677, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_818_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25061)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25061;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8592)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8592, 4238},
|
|
/*h(12773)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12773, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29157)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29157, 4202},
|
|
/*h(24976)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24976, 4238},
|
|
/*h(500)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {500, 4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1359_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(461)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1164_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16845)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16845;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_566_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5544)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5544, 6094},
|
|
/*h(4557)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4557, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20941)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20941;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9640)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9640, 6097},
|
|
/*h(8653)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8653, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1066_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26024)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26024, 6097},
|
|
/*h(25037)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25037, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12749)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12749;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29133)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29133;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1027_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1480)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1480, 6078},
|
|
/*h(493)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {493, 4202},
|
|
/*h(24969)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24969, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_832_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17864)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17864, 6078},
|
|
/*h(16877)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16877, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4589)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21960)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21960, 6080},
|
|
/*h(20973)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20973, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_930_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8685)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8685;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_735_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25069)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25069;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12781)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12781;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29165)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29165;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(469)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 469;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1081_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16853)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16853;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4565)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4565, 4202},
|
|
/*h(5552)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5552, 6094},
|
|
/*h(384)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {384, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21936)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21936, 6094},
|
|
/*h(16768)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16768, 4240},
|
|
/*h(20949)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20949, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8661)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8661;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_983_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25045)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25045, 4202},
|
|
/*h(26032)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26032, 6097},
|
|
/*h(20864)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20864, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8576)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8576, 4238},
|
|
/*h(12757)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12757, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(484)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {484, 4204},
|
|
/*h(29141)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29141, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_944_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24977)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24977, 4238},
|
|
/*h(501)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {501, 4202},
|
|
/*h(1488)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1488, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_749_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17872)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17872, 6078},
|
|
/*h(16885)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16885, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4597)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20981)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_847_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4512)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4512, 4242},
|
|
/*h(8693)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8693, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20896)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20896, 4242},
|
|
/*h(25077)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25077, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_54_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8608)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8608, 4238},
|
|
/*h(12789)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12789, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24992)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24992, 4238},
|
|
/*h(29173)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29173, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(455)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {455, 4202},
|
|
/*h(5623)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5623, 6082},
|
|
/*h(1442)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1442, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16839)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16839, 4202},
|
|
/*h(22007)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {22007, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1000_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4551)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4551, 4202},
|
|
/*h(5538)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5538, 6094},
|
|
/*h(9719)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9719, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_805_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26103)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26103, 6082},
|
|
/*h(21922)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21922, 6094},
|
|
/*h(20935)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20935, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3479)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {3479, 4295},
|
|
/*h(8647)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8647, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25031)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_903_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7575)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7575, 4295},
|
|
/*h(12743)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12743, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_708_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(470)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {470, 4204},
|
|
/*h(29127)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29127, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(487)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17858)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17858, 6078},
|
|
/*h(16871)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16871, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(402)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {402, 4240},
|
|
/*h(4583)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4583, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20967)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4498)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4498, 4242},
|
|
/*h(8679)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8679, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20882)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20882, 4242},
|
|
/*h(25063)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25063, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8594)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8594, 4238},
|
|
/*h(12775)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12775, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24978)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24978, 4238},
|
|
/*h(502)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {502, 4204},
|
|
/*h(29159)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29159, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1450)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1450, 6092},
|
|
/*h(463)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {463, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17834)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17834, 6092},
|
|
/*h(16847)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16847, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_918_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4559)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4559;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_722_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21930)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21930, 6094},
|
|
/*h(20943)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20943, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8655)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1418_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25039)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25039;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_820_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12751)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_625_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29135)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(495)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17866)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17866, 6078},
|
|
/*h(16879)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16879, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_586_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4591)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20975)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8687)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1086_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25071)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12783)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_293_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29167)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29167;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1458)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1458, 6092},
|
|
/*h(471)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {471, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17842)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17842, 6092},
|
|
/*h(16855)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16855, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_835_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4567)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_639_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16770)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16770, 4240},
|
|
/*h(20951)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20951, 4202},
|
|
/*h(21938)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21938, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4482)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4482, 4242},
|
|
/*h(3495)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3495, 4294},
|
|
/*h(8663)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8663, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20866)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20866, 4242},
|
|
/*h(25047)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25047, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_737_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8578)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8578, 4238},
|
|
/*h(12759)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12759, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(486)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {486, 4204},
|
|
/*h(29143)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29143, 4202},
|
|
/*h(24962)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24962, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(503)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {503, 4202},
|
|
/*h(24979)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24979, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16887)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {16887, 4202},
|
|
/*h(11719)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {11719, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(418)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {418, 4240},
|
|
/*h(4599)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4599, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(16802)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16802, 4240},
|
|
/*h(15815)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {15815, 4294},
|
|
/*h(20983)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {20983, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4514)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4514, 4242},
|
|
/*h(8695)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8695, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1003_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20898)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20898, 4242},
|
|
/*h(25079)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {25079, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8610)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8610, 4238},
|
|
/*h(12791)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {12791, 4202}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29175)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {29175, 4202},
|
|
/*h(24994)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24994, 4238},
|
|
/*h(1505)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1505, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8640)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8640;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1015_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25024)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25024;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_879_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8672)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8672;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_683_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25056)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25056, 4203},
|
|
/*h(20875)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20875, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8648)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8648, 4203},
|
|
/*h(9635)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9635, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_932_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25032)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25032, 4203},
|
|
/*h(26019)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26019, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_796_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8680)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8680;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_600_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26051)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26051, 6083},
|
|
/*h(20883)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20883, 4242},
|
|
/*h(25064)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25064, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1044_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8656)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8656, 4203},
|
|
/*h(9643)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9643, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_849_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25040)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25040, 4203},
|
|
/*h(26027)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26027, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_713_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8688)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8688;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25072)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25072;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8642)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25026)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1230_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8674)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8674, 4203},
|
|
/*h(4493)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4493, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1035_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25058)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25058, 4203},
|
|
/*h(20877)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20877, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1479_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8650)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8650, 4203},
|
|
/*h(7663)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {7663, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25034)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25034, 4203},
|
|
/*h(26021)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26021, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8682)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8682, 4203},
|
|
/*h(4501)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4501, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_952_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25066)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25066, 4203},
|
|
/*h(20885)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20885, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8658)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8658, 4203},
|
|
/*h(3490)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3490, 4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25042)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25042;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1064_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3522)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3522, 4296},
|
|
/*h(8690)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8690, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_869_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25074)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25074;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_642_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8641)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25025)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4492)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4492, 4241},
|
|
/*h(8673)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8673, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20876)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20876, 4241},
|
|
/*h(25057)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25057, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8649)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8649;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25033)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25033;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4500)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4500, 4241},
|
|
/*h(8681)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8681, 4203},
|
|
/*h(9668)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9668, 6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20884)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20884, 4241},
|
|
/*h(25065)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25065, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8657)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8657;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25041)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25041;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9676)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9676, 6081},
|
|
/*h(8689)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8689, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26060)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26060, 6081},
|
|
/*h(25073)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25073, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_993_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8643)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8643;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_798_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25027)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25027;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_661_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4494)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4494, 4241},
|
|
/*h(8675)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8675, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_466_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20878)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20878, 4241},
|
|
/*h(25059)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25059, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_910_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9638)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9638, 6095},
|
|
/*h(8651)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8651, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_715_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25035)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25035;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_579_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8683)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8683;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20886)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20886, 4241},
|
|
/*h(25067)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25067, 4203},
|
|
/*h(26054)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26054, 6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_827_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9646)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9646, 6095},
|
|
/*h(8659)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8659, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25043)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25043;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8691)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8691;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26062)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26062, 6081},
|
|
/*h(25075)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {25075, 4203}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29109)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29109, 4237},
|
|
/*h(5620)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5620, 6079},
|
|
/*h(452)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {452, 4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16836)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16836, 4204},
|
|
/*h(22004)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {22004, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1484_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16868)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(460)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {460, 4204},
|
|
/*h(1447)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1447, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16844)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16844, 4204},
|
|
/*h(17831)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17831, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(492)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {492, 4204},
|
|
/*h(24968)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24968, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1401_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16876)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16876;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16852)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16852, 4204},
|
|
/*h(17839)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17839, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16884)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16884;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_874_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(454)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {454, 4204},
|
|
/*h(29111)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29111, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_678_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17825)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17825, 6092},
|
|
/*h(22006)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {22006, 6079},
|
|
/*h(16838)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16838, 4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16870)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_791_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(462)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16846)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(494)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {494, 4204},
|
|
/*h(24970)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24970, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16878)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16854)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16854, 4204},
|
|
/*h(11686)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {11686, 4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11718)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {11718, 4292},
|
|
/*h(16886)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {16886, 4204}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(448)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16832)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_976_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(480)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 480;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_781_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16864)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16864;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(456)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1030_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16840)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_893_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(488)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {488, 4205},
|
|
/*h(24964)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24964, 4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_698_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16872)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(464)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 464;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_947_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16848)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16848;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_810_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(24972)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24972, 4236},
|
|
/*h(496)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {496, 4205},
|
|
/*h(1483)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1483, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_615_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16880)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16880;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_171_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(450)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {450, 4205},
|
|
/*h(5618)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5618, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1464_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11666)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {11666, 4297},
|
|
/*h(16834)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16834, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(482)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 482;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16866)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16866, 4205},
|
|
/*h(12685)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12685, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_88_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(458)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16842)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(490)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {490, 4205},
|
|
/*h(24966)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24966, 4236},
|
|
/*h(1477)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1477, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1049_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17861)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {17861, 6082},
|
|
/*h(12693)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12693, 4237},
|
|
/*h(16874)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16874, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(466)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {466, 4205},
|
|
/*h(1453)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1453, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16850)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1162_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(498)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_966_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16882)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16882, 4205},
|
|
/*h(17869)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {17869, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_739_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30093)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30093, 6096},
|
|
/*h(5617)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5617, 6080},
|
|
/*h(449)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {449, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16833)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16833, 4205},
|
|
/*h(22001)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {22001, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(481)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 481;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16865)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16865;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(457)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 457;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17828)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17828, 6091},
|
|
/*h(16841)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16841, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(489)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {489, 4205},
|
|
/*h(24965)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24965, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16873)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(465)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 465;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17836)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17836, 6091},
|
|
/*h(16849)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {16849, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(497)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {497, 4205},
|
|
/*h(24973)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24973, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16881)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16881;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1091_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(451)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 451;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_896_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16835)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_759_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(483)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 483;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_564_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16867)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16867;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1008_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(459)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 459;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_813_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16843)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(491)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {491, 4205},
|
|
/*h(24967)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24967, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16875)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_925_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(467)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 467;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_730_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16851)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16851;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_593_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24975)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24975, 4237},
|
|
/*h(499)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {499, 4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16883)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4205}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16883;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4548)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1022_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26100)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26100, 6081},
|
|
/*h(20932)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20932, 4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_886_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4580)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4580, 4206},
|
|
/*h(399)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {399, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20964)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20964, 4206},
|
|
/*h(16783)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16783, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4556)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4556;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_940_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20940)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20940;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_803_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4588)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4588, 4206},
|
|
/*h(407)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {407, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20972)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20972, 4206},
|
|
/*h(16791)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16791, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1052_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4564)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4564;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_857_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20948)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20948;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_720_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4596)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_525_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20980)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20980;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_81_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4550)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20934)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20934, 4206},
|
|
/*h(15766)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {15766, 4293}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4582)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4582, 4206},
|
|
/*h(401)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {401, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1042_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20966)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20966, 4206},
|
|
/*h(16785)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16785, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4558)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20942)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4590)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4590, 4206},
|
|
/*h(5577)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5577, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_959_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20974)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4206}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4566)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4566, 4206},
|
|
/*h(385)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {385, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1208_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20950)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20950, 4206},
|
|
/*h(15782)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15782, 4292},
|
|
/*h(16769)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16769, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1071_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4598)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {4598, 4206},
|
|
/*h(5585)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5585, 6080},
|
|
/*h(417)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {417, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_876_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20982)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {20982, 4206},
|
|
/*h(16801)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16801, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4544)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4544;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20928)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4576)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4576, 4207},
|
|
/*h(395)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {395, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20960)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20960, 4207},
|
|
/*h(16779)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16779, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4552)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4552;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20936)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20936;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5571)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5571, 6080},
|
|
/*h(403)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {403, 4240},
|
|
/*h(4584)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4584, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21955)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21955, 6080},
|
|
/*h(20968)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20968, 4207},
|
|
/*h(16787)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16787, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4560)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4560;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20944)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20944;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_17_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4592)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4592, 4207},
|
|
/*h(5579)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5579, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20976)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20976, 4207},
|
|
/*h(21963)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21963, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_866_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9714)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9714, 6083},
|
|
/*h(4546)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4546, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_671_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20930)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20930, 4207},
|
|
/*h(26098)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26098, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4578)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20962)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20962, 4207},
|
|
/*h(16781)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16781, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_783_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4554)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4554, 4207},
|
|
/*h(5541)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5541, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_588_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20938)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20938, 4207},
|
|
/*h(21925)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21925, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4586)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4586, 4207},
|
|
/*h(405)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {405, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20970)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_700_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4562)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4562, 4207},
|
|
/*h(5549)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5549, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20946)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20946, 4207},
|
|
/*h(21933)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21933, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4594)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15810)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15810, 4296},
|
|
/*h(20978)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20978, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3558)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3558, 4292},
|
|
/*h(4545)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4545, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20929)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(396)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {396, 4239},
|
|
/*h(4577)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4577, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_908_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16780)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16780, 4239},
|
|
/*h(20961)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20961, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3566)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3566, 4292},
|
|
/*h(4553)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4553, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20937)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20937;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1020_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(29061)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29061, 4237},
|
|
/*h(4585)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4585, 4207},
|
|
/*h(404)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {404, 4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_825_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16788)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16788, 4239},
|
|
/*h(20969)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20969, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4561)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4561;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1074_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20945)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20945;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_937_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4593)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4593, 4207},
|
|
/*h(29069)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29069, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_742_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20977)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20977;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_298_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4547)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4547;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20931)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20931;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(398)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {398, 4239},
|
|
/*h(4579)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4579, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16782)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16782, 4239},
|
|
/*h(20963)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20963, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4555)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4555;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_20_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20939)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20939;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(29063)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29063, 4237},
|
|
/*h(4587)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4587, 4207},
|
|
/*h(5574)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5574, 6079},
|
|
/*h(406)=3 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {406, 4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16790)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16790, 4239},
|
|
/*h(20971)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20971, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4563)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4563;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1425_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20947)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20947;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4595)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4595, 4207},
|
|
/*h(29071)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29071, 4237},
|
|
/*h(5582)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5582, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1093_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21966)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21966, 6079},
|
|
/*h(20979)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {20979, 4207}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1088_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8580)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8580;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_756_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8612)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8612;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_561_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24996)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24996, 4236},
|
|
/*h(1507)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1507, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1005_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8588)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8588;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_674_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8620)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1515)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1515, 6078},
|
|
/*h(25004)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25004, 4236},
|
|
/*h(25991)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25991, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((10*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_922_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8596)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8596;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_727_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24980)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24980, 4236},
|
|
/*h(1491)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1491, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8628)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8628;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25012)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25012, 4236},
|
|
/*h(25999)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25999, 6096},
|
|
/*h(1523)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1523, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8582)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8614)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_913_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24998)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8590)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24974)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24974, 4236},
|
|
/*h(1485)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1485, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1025_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8622)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_830_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25006)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8598)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1078_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(24982)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {24982, 4236},
|
|
/*h(1493)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1493, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_942_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3462)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3462, 4292},
|
|
/*h(8630)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {8630, 4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_747_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25014)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4236}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25014;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(389)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {389, 4237},
|
|
/*h(5557)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5557, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16773)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16773, 4237},
|
|
/*h(21941)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21941, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3498)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3498, 4296},
|
|
/*h(4485)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4485, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26037)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26037, 6096},
|
|
/*h(20869)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20869, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_520_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7594)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7594, 4296},
|
|
/*h(8581)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8581, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12677)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12677;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(421)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 421;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15818)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15818, 4296},
|
|
/*h(16805)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16805, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_981_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4517)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_786_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20901)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8613)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8613, 4237},
|
|
/*h(13781)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13781, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24997)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_883_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17877)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {17877, 6082},
|
|
/*h(12709)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12709, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_688_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(436)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {436, 4239},
|
|
/*h(1423)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1423, 6096},
|
|
/*h(29093)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29093, 4237},
|
|
/*h(5604)=3 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5604, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(397)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 397;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8589)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8589;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(429)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 429;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_8_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15826)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {15826, 4300},
|
|
/*h(16813)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16813, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_898_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4525)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4525;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_703_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20909)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8621)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8621;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1398_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1516)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1516, 6077},
|
|
/*h(25005)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25005, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_800_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12717)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12717;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_605_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1431)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1431, 6096},
|
|
/*h(29101)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29101, 4237},
|
|
/*h(5612)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5612, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21957)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {21957, 6082},
|
|
/*h(16789)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16789, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8597)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8597;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24981)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_854_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(420)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {420, 4239},
|
|
/*h(29077)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29077, 4237},
|
|
/*h(5588)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5588, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(437)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 437;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16821)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_815_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4533)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4533, 4237},
|
|
/*h(9701)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9701, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_620_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20917)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20917;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_22_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9616)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9616, 6097},
|
|
/*h(13797)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13797, 6082},
|
|
/*h(8629)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8629, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1524)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1524, 6077},
|
|
/*h(30181)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30181, 6082},
|
|
/*h(25013)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25013, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_717_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12725)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12725, 4237},
|
|
/*h(17893)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {17893, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_969_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(391)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 391;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_773_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16775)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16775, 4237},
|
|
/*h(21943)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21943, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4487)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20871)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_871_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8583)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8583, 4237},
|
|
/*h(13751)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13751, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17847)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17847, 6096},
|
|
/*h(12679)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12679, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(423)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 423;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16807)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9687)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9687, 6082},
|
|
/*h(4519)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4519, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20903)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20903, 4237},
|
|
/*h(26071)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26071, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_539_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(13783)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13783, 6082},
|
|
/*h(9602)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9602, 6097},
|
|
/*h(8615)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8615, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(1510)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1510, 6077},
|
|
/*h(30167)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30167, 6082},
|
|
/*h(24999)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24999, 4237},
|
|
/*h(25986)=3 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25986, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12711)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1039_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(29095)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29095, 4237},
|
|
/*h(438)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {438, 4239},
|
|
/*h(5606)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5606, 6079},
|
|
/*h(1425)=3 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1425, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 11) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_788_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8591)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12687)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_554_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(431)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 431;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_359_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16815)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5514)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5514, 6094},
|
|
/*h(4527)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4527, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1054_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20911)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9610)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9610, 6097},
|
|
/*h(8623)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8623, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25007)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25007, 4237},
|
|
/*h(25994)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25994, 6097},
|
|
/*h(1518)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1518, 6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12719)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_957_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(29103)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 29103;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_705_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13767)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13767, 6082},
|
|
/*h(8599)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8599, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1494)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1494, 6077},
|
|
/*h(30151)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30151, 6082},
|
|
/*h(24983)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {24983, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(12695)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12695, 4237},
|
|
/*h(17863)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {17863, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(5590)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5590, 6079},
|
|
/*h(422)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {422, 4239},
|
|
/*h(1409)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1409, 6092},
|
|
/*h(29079)=3 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {29079, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5607)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5607, 6082},
|
|
/*h(439)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {439, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11655)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {11655, 4294},
|
|
/*h(16823)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {16823, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5522)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5522, 6094},
|
|
/*h(4535)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4535, 4237},
|
|
/*h(9703)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9703, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_971_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21906)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21906, 6094},
|
|
/*h(26087)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26087, 6082},
|
|
/*h(20919)=2 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {20919, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8631)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8631, 4237},
|
|
/*h(3463)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3463, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(25015)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25015, 4237},
|
|
/*h(1526)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1526, 6077},
|
|
/*h(26002)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26002, 6097},
|
|
/*h(30183)=3 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30183, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1069_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7559)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {7559, 4294},
|
|
/*h(12727)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12727, 4237}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24960)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_303_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8584)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8584;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8616)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8616;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25000)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1376_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8624)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8624;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25008)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25008;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8586)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8618)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8618, 4238},
|
|
/*h(9605)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9605, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25002)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25002, 4238},
|
|
/*h(1513)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1513, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8626)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8626, 4238},
|
|
/*h(9613)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9613, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25010)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {25010, 4238},
|
|
/*h(1521)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1521, 6078},
|
|
/*h(25997)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {25997, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8577)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8577;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_974_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7622)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7622, 4292},
|
|
/*h(8609)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8609, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_778_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1504)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1504, 6078},
|
|
/*h(24993)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24993, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8585)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8585;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_891_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7630)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7630, 4292},
|
|
/*h(8617)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8617, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_696_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25001)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25001;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1139_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8593)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8593;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_808_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7638)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {7638, 4298},
|
|
/*h(8625)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {8625, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25009)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25009;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8579)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8579;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1461_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1474)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1474, 6078},
|
|
/*h(24963)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24963, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8611)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1130_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(24995)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 24995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_86_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8587)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8587;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1482)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1482, 6078},
|
|
/*h(24971)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {24971, 4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8619)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1047_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25003)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8595)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8595;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8627)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8627;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_964_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25011)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4238}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25011;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1186_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(388)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 388;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_991_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16772)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16772;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_659_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16804)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_771_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(428)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 428;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_576_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16812)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16812;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_493_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16820)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16820, 4239},
|
|
/*h(21988)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21988, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_49_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(390)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 390;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16774)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {4239}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1010_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16806)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16806, 4239},
|
|
/*h(21974)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21974, 6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(430)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {430, 4239},
|
|
/*h(1417)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1417, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_927_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16814)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16814, 4239},
|
|
/*h(17801)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17801, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_844_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21990)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {21990, 6079},
|
|
/*h(16822)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {16822, 4239},
|
|
/*h(17809)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17809, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(416)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {416, 4240},
|
|
/*h(5584)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5584, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16800)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16800, 4240},
|
|
/*h(21968)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21968, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(392)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 392;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16776)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16776;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(424)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 424;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16808)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16808, 4240},
|
|
/*h(17795)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17795, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(432)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 432;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16816)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16816;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_834_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(386)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {386, 4240},
|
|
/*h(5554)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5554, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_752_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(394)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 394;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_556_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16778)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(426)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 426;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16810)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16810, 4240},
|
|
/*h(15823)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {15823, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21954)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21954, 6080},
|
|
/*h(16786)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16786, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(434)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 434;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(11650)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11650, 4296},
|
|
/*h(15831)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {15831, 4299},
|
|
/*h(16818)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16818, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(393)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 393;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15790)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15790, 4292},
|
|
/*h(16777)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16777, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_988_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1412)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1412, 6091},
|
|
/*h(425)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {425, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_793_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16809)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16809;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_905_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1420)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1420, 6091},
|
|
/*h(5601)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5601, 6080},
|
|
/*h(433)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {433, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_710_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16817)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16817, 4240},
|
|
/*h(21985)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21985, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(387)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {387, 4240},
|
|
/*h(5555)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5555, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_71_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(16771)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 16771;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(419)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {419, 4240},
|
|
/*h(5587)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5587, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(16803)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16803, 4240},
|
|
/*h(21971)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21971, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1414)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1414, 6091},
|
|
/*h(427)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {427, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17798)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17798, 6091},
|
|
/*h(16811)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16811, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(435)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 435;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1061_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(17806)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17806, 6091},
|
|
/*h(21987)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21987, 6080},
|
|
/*h(16819)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {16819, 4240}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_393_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4484)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4484;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_198_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20868)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9684)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9684, 6081},
|
|
/*h(4516)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4516, 4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20900)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20900, 4241},
|
|
/*h(26068)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26068, 6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1466_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4524)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4524, 4241},
|
|
/*h(5511)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5511, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20908)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20908, 4241},
|
|
/*h(21895)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21895, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(9700)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9700, 6081},
|
|
/*h(4532)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4532, 4241},
|
|
/*h(5519)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5519, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(20916)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20916, 4241},
|
|
/*h(21903)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21903, 6096},
|
|
/*h(26084)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26084, 6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_744_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9654)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9654, 6095},
|
|
/*h(4486)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4486, 4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_549_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20870)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20870, 4241},
|
|
/*h(26038)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {26038, 6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4518)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(26070)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26070, 6081},
|
|
/*h(20902)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20902, 4241},
|
|
/*h(21889)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21889, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4526)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20910)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20910, 4241},
|
|
/*h(21897)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21897, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4502)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4502, 4241},
|
|
/*h(9670)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9670, 6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4534)=0 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4534;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15750)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15750, 4292},
|
|
/*h(20918)=1 EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {20918, 4241}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1178_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9648)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9648, 6097},
|
|
/*h(4480)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4480, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1095_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4488)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4488;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_900_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20872)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20872;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_764_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4520)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4520;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_569_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20904)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_817_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20880)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20880, 4242},
|
|
/*h(26048)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26048, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4528)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4528;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20912)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20912;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4490)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4490, 4242},
|
|
/*h(3503)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {3503, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20874)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4522)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4522;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_920_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20906)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1032_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4530)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4530, 4242},
|
|
/*h(9698)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9698, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_837_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20914)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20914;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4489)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20873)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5508)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5508, 6093},
|
|
/*h(4521)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4521, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21892)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21892, 6093},
|
|
/*h(20905)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20905, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5516)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5516, 6093},
|
|
/*h(9697)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9697, 6083},
|
|
/*h(4529)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4529, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(21900)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21900, 6093},
|
|
/*h(26081)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26081, 6083},
|
|
/*h(20913)=2 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20913, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_961_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9651)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9651, 6097},
|
|
/*h(4483)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4483, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_766_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(20867)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20867, 4242},
|
|
/*h(26035)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26035, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4515)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4515;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26067)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26067, 6083},
|
|
/*h(20899)=1 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {20899, 4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_878_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4491)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4491;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_547_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4523)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4523;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20907)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_795_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4499)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4499, 4242},
|
|
/*h(9667)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9667, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_464_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4531)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4531;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(20915)=0 EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {4242}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 20915;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2438)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2438, 4255},
|
|
/*h(1451)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1451, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_348_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6534)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6534, 4255},
|
|
/*h(5547)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5547, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1043_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10630)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10630;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14726)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2502)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6598)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5526)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5526, 6093},
|
|
/*h(9707)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9707, 6083},
|
|
/*h(10694)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10694, 4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1075_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14790)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {14790, 4255},
|
|
/*h(9622)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9622, 6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_809_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2470)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6566)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6566, 4255},
|
|
/*h(11734)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {11734, 4298}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_711_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10662)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10662, 4255},
|
|
/*h(15830)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {15830, 4298}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14758)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2534)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2534, 4255},
|
|
/*h(26023)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26023, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_841_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(6630)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6630, 4255},
|
|
/*h(1462)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1462, 6091},
|
|
/*h(30119)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30119, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5558)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5558, 6093},
|
|
/*h(10726)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10726, 4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_743_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14822)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1058_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2446)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2446, 4255},
|
|
/*h(1459)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1459, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6542)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_960_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10638)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_167_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14734)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2510)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1090_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5619)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5619, 6080},
|
|
/*h(30095)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30095, 6096},
|
|
/*h(6606)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6606, 4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10702)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {10702, 4255},
|
|
/*h(9715)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9715, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_992_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14798)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_726_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2478)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6574)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10670)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14766)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2542)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2542, 4255},
|
|
/*h(26031)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {26031, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_758_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6638)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6638, 4255},
|
|
/*h(30127)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30127, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10734)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14830)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4255}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_975_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2454)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4256}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6550)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4256}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_877_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10646)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {10646, 4256},
|
|
/*h(15814)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {15814, 4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_84_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14742)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4256}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14742;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2439)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6535)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_475_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9644)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9644, 6095},
|
|
/*h(10631)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {10631, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14727)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25992)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25992, 6097},
|
|
/*h(2503)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2503, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_604_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6599)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6599;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1299_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11682)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11682, 4296},
|
|
/*h(10695)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {10695, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_507_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9623)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9623, 6096},
|
|
/*h(14791)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {14791, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1484)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1484, 6077},
|
|
/*h(2471)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2471, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_936_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5580)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5580, 6079},
|
|
/*h(6567)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {6567, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10663)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_838_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15746)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15746, 4296},
|
|
/*h(14759)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {14759, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1065_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2535)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2450)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2450, 4260},
|
|
/*h(6631)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {6631, 4257},
|
|
/*h(7618)=2 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7618, 4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_968_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5559)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5559, 6096},
|
|
/*h(10727)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {10727, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10642)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {10642, 4260},
|
|
/*h(9655)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9655, 6096},
|
|
/*h(14823)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {14823, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2447)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2447;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5556)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5556, 6093},
|
|
/*h(6543)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {6543, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9652)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {9652, 6095},
|
|
/*h(10639)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {10639, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1087_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14735)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26000)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26000, 6097},
|
|
/*h(2511)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2511, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6607)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6607;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1216_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(11690)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11690, 4296},
|
|
/*h(10703)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {10703, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14799)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2479)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2479, 4257},
|
|
/*h(30149)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30149, 6082},
|
|
/*h(1492)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1492, 6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_853_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6575)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_60_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10671)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_755_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(15754)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {15754, 4296},
|
|
/*h(14767)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {14767, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_982_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3530)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3530, 4296},
|
|
/*h(2543)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {2543, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7626)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7626, 4296},
|
|
/*h(6639)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {6639, 4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_885_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10735)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10735;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14831)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4257}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_406_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7623)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {7623, 4294},
|
|
/*h(2455)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {2455, 4258}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6551)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4258}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10647)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4258}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10647;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1004_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14743)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4258}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2434)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2434, 4259},
|
|
/*h(6615)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {6615, 4262}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6530)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6530, 4259},
|
|
/*h(10711)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {10711, 4262}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10626)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1036_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14722)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14722, 4259},
|
|
/*h(13735)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13735, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(25987)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25987, 6097},
|
|
/*h(1511)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1511, 6082},
|
|
/*h(2498)=2 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2498, 4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6594)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6594, 4259},
|
|
/*h(1426)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1426, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10690)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14786)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2466)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2466, 4259},
|
|
/*h(7634)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {7634, 4300}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_802_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6562)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6562, 4259},
|
|
/*h(5575)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5575, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10658)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {10658, 4259},
|
|
/*h(9671)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9671, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_704_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14754)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_931_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2530)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2530;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6626)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_833_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10722)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9650)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9650, 6097},
|
|
/*h(14818)=1 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14818, 4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_355_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2442)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1050_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6538)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_258_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10634)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {10634, 4259},
|
|
/*h(9647)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9647, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_953_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(14730)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {14730, 4259},
|
|
/*h(13743)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13743, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2506)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {2506, 4259},
|
|
/*h(1519)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1519, 6082},
|
|
/*h(25995)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25995, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6602)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1082_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10698)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10698;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14794)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2474)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_719_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6570)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {6570, 4259},
|
|
/*h(5583)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5583, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10666)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_621_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14762)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_848_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2538)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6634)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6634;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_750_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10730)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14826)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() FIX_ROUND_LEN128()*/ {4259}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_967_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6546)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {6546, 4260},
|
|
/*h(11714)=1 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {11714, 4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_870_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14738)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4260}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14738;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_311_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2518)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4261}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1007_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1446)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1446, 6091},
|
|
/*h(30103)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30103, 6096},
|
|
/*h(6614)=2 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {6614, 4261}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10710)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {10710, 4261},
|
|
/*h(5542)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5542, 6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_909_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14806)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4261}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14806;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1231_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2519)=0 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4262}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2519;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9639)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {9639, 6096},
|
|
/*h(14807)=1 EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {14807, 4262}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1097_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1527)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1527, 6082},
|
|
/*h(2514)=1 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {2514, 4263},
|
|
/*h(26003)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26003, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_304_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6610)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4263}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6610;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_999_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10706)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4263}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(14802)=0 EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_LDOP_Q() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4263}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 14802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7558)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_845_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11654)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3526)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_611_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3494)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7590)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_643_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7654)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11750)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_545_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15846)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_859_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3470)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_67_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7566)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7566;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_762_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11662)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15758)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3534)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3534;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_99_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11726)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_794_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15822)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_528_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3502)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3502;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7598)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11694)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7662)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11758)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15854)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 NOEVSR ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4292}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15854;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_777_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3478)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4293}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7574)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4293}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_679_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11670)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4293}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_972_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15751)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3527)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3527;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_738_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7591)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11687)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15783)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_867_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3559)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3559;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_74_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3474)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {3474, 4297},
|
|
/*h(7655)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {7655, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_769_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7570)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {7570, 4297},
|
|
/*h(11751)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {11751, 4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1465_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15847)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15847;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3471)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3471;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_986_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7567)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11663)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11663;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_889_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15759)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3535)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7631)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7631;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1018_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11727)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11727;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7599)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7599;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1350_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11695)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11695;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_557_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15791)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15791;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_784_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3567)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3567;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_686_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11759)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15855)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 NOEVSR ZEROING=0 MASK=0*/ {4294}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15855;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11671)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4295}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_806_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15767)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4295}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15767;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3458)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {3458, 4296},
|
|
/*h(7639)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {7639, 4299}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_935_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7554)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {7554, 4296},
|
|
/*h(11735)=1 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {11735, 4299}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7586)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_506_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15778)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15778;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_733_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3554)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3554;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1428_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7650)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7650;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11746)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1330_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15842)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_157_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3466)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_852_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7562)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11658)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11658;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_884_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11722)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11722;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15786)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15786;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_650_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3562)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7658)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7658;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15850)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() FIX_ROUND_LEN128()*/ {4296}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_672_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15762)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4297}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3542)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE FIX_ROUND_LEN128()*/ {4298}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1033_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3543)=0 EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 NOEVSR ZEROING=0 MASK=0 EVEXRR_ONE*/ {4299}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_899_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3538)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4300}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_801_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(11730)=0 EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_LDOP_D() EVEXRR_ONE FIX_ROUND_LEN128()*/ {4300}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 11730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1476)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1476, 6077},
|
|
/*h(30133)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30133, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17860)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17860;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30165)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30165, 6082},
|
|
/*h(25984)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25984, 6097},
|
|
/*h(1508)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1508, 6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17892)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {17892, 6077},
|
|
/*h(13711)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13711, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17868)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17868;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17900)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {17900, 6077},
|
|
/*h(13719)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13719, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17876)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17876;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17908)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_675_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1478)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1478, 6077},
|
|
/*h(30135)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30135, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17862)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17894)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_592_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1486)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1486;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17870)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17902)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17878)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1471_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17910)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6077}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_914_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17856)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17856;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17888)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17888;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_695_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1512)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1512, 6078},
|
|
/*h(25988)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25988, 6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17896)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_612_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1520)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1520, 6078},
|
|
/*h(25996)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25996, 6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17904)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17904;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1506)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_934_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17890)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17890, 6078},
|
|
/*h(13709)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13709, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1046_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1514)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1514, 6078},
|
|
/*h(25990)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25990, 6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_851_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17898)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {17898, 6078},
|
|
/*h(13717)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13717, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1490)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1490;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17874)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17874;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_963_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(25998)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {25998, 6095},
|
|
/*h(1522)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {1522, 6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_768_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17906)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_541_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1473)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1473;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_346_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17857)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17857;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17889)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17889;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1481)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1481;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17865)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17865;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17897)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17897;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1489)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1489;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17873)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17873;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1337_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17905)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17905;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_892_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1475)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1475;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_697_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17859)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17859;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_366_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17891)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17867)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17867;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17899)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17899;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_532_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17875)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17875;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17907)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6078}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1019_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5572)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5572;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_824_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21956)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21956;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_741_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21964)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21964;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21996)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21996;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_658_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21972)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21972;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21958)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_956_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5614)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_761_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21998)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6079}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_873_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5622)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {5622, 6079},
|
|
/*h(1441)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1441, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1473_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5600)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5600, 6080},
|
|
/*h(1419)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1419, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21984)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21984, 6080},
|
|
/*h(17803)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17803, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5576)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5576;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5608)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5608, 6080},
|
|
/*h(1427)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1427, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21992)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21992, 6080},
|
|
/*h(17811)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17811, 6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5616)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5616;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1112_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22000)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22000;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_668_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5570)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5570;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_336_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5602)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5602, 6080},
|
|
/*h(1421)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1421, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21986)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21986, 6080},
|
|
/*h(17805)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17805, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5578)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5578;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21962)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_253_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5610)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5610, 6080},
|
|
/*h(1429)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {1429, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21994)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21994, 6080},
|
|
/*h(17813)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {17813, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_502_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5586)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21970)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22002)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5569)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5569;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1041_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21953)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21953;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_958_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21961)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21961;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_822_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1428)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1428, 6091},
|
|
/*h(30085)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30085, 6096},
|
|
/*h(5609)=2 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5609, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_627_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17812)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17812, 6091},
|
|
/*h(21993)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21993, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_875_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21969)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21969;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1422)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1422, 6091},
|
|
/*h(5603)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5603, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(30087)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30087, 6096},
|
|
/*h(5611)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {5611, 6080},
|
|
/*h(1430)=2 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1430, 6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_978_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17814)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {17814, 6091},
|
|
/*h(21995)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {21995, 6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_895_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(22003)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6080}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 22003;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_31_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26052)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26052;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9708)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9708, 6081},
|
|
/*h(5527)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5527, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26092)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26092, 6081},
|
|
/*h(21911)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21911, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9716)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9716;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9702)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9702, 6081},
|
|
/*h(5521)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5521, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26086)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26086, 6081},
|
|
/*h(21905)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21905, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9678)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9710)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9710;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26094)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6081}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26094;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9686)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9686, 6081},
|
|
/*h(5505)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5505, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9718)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {9718, 6081},
|
|
/*h(5537)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5537, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26102)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {26102, 6081},
|
|
/*h(21921)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21921, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5573)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5573;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9669)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9669;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_951_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26053)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26053;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13765)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13765;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_912_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1509)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1509, 6082},
|
|
/*h(25985)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25985, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1424)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1424, 6092},
|
|
/*h(5605)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5605, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17808)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17808, 6092},
|
|
/*h(21989)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {21989, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21904)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21904, 6094},
|
|
/*h(26085)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26085, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5581)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5581;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21965)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21965;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1063_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9677)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9677;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_868_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26061)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26061;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13773)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13773;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30157)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30157;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_829_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1517)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1517, 6082},
|
|
/*h(25993)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {25993, 6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_634_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17901)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5613)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5613;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21997)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_732_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9709)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9709;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26093)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26093;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13805)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13805;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30189)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30189;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1408)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1408, 6092},
|
|
/*h(5589)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5589, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17792)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17792, 6092},
|
|
/*h(21973)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {21973, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_980_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5504)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5504, 6094},
|
|
/*h(9685)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {9685, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_785_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21888)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21888, 6094},
|
|
/*h(26069)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {26069, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_746_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26001)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26001, 6097},
|
|
/*h(1525)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {1525, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17909)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1440)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1440, 6092},
|
|
/*h(5621)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5621, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17824)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17824, 6092},
|
|
/*h(22005)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {22005, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1479)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1479;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_607_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21959)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26055)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26055;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1068_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17895)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17810)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17810, 6092},
|
|
/*h(21991)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {21991, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9618)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9618, 6097},
|
|
/*h(13799)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13799, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1487)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17871)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_524_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21967)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1219_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26063)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26063;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_622_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13775)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13775;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30159)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30159;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_985_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17903)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5615)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5615;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21999)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1083_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9711)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_888_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26095)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26095;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13807)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30191)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30191;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1429_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1495)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17879)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17879;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_636_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1410)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {1410, 6092},
|
|
/*h(5591)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {5591, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(17794)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {17794, 6092},
|
|
/*h(21975)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {21975, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_902_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17911)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9634)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {9634, 6097},
|
|
/*h(13815)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13815, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26018)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {26018, 6097},
|
|
/*h(30199)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {30199, 6082}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1012_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9664)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9664;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9696)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9696, 6083},
|
|
/*h(5515)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5515, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26080)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26080, 6083},
|
|
/*h(21899)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21899, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_929_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9672)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9672;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_734_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26056)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26056;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_597_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9704)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9704, 6083},
|
|
/*h(5523)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {5523, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26088)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26088, 6083},
|
|
/*h(21907)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {21907, 6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_846_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9680)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9680;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26064)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26064;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_514_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9712)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26096)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26096;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9666)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26050)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26050;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_836_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(26082)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26082, 6083},
|
|
/*h(21901)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {21901, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9674)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9674;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1085_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26058)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26058;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_949_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(9706)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9706, 6083},
|
|
/*h(5525)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {5525, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_754_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26090)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26090;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9682)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1002_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26066)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5524)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5524, 6093},
|
|
/*h(9705)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9705, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21908)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21908, 6093},
|
|
/*h(26089)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26089, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9713)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9713;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26097)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26097;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5518)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {5518, 6093},
|
|
/*h(9699)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {9699, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21902)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21902, 6093},
|
|
/*h(26083)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26083, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_712_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9675)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9675;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_517_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26059)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26059;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(21910)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {21910, 6093},
|
|
/*h(26091)=1 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {26091, 6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_629_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9683)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9683;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26099)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6083}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26099;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_792_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17796)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17796;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_656_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1444)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1444, 6091},
|
|
/*h(30101)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30101, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_709_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17804)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17804;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_573_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1452)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1452;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1460)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1460, 6091},
|
|
/*h(30117)=1 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {30117, 6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17844)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17844;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_812_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17830)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_924_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1454)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1454;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_729_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17838)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17846)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6091}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1416)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1416;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17800)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1448)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1448;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17832)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1456)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1456;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1080_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17840)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17826)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17826;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_553_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1418)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1418;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17802)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1009_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17793)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17793;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_790_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1449)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1449;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_595_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17833)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17833;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_707_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1457)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1457;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17841)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17841;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1411)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1411;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1443)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1443;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1029_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17827)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17827;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_946_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17835)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17835;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_863_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17843)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6092}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17843;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5540)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5540;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21924)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21924;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5548)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5548;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1073_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21932)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_990_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21940)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21940;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_546_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5510)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21894)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21926)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5550)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21934)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21942)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6093}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21920)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21920;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_897_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5512)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5512;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_702_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21896)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21928)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_814_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5520)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5520;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1331_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5506)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21890)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1053_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21898)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_917_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5546)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5546;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5513)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5513;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5545)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5545;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1290_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21929)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21929;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5553)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5553;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1207_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21937)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21937;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_763_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5507)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5507;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_568_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21891)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21891;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_431_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5539)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5539;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21923)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21923;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_153_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21931)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21931;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21939)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21939;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_890_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9604)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9604;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_558_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9636)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9636;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26020)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26020;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_807_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9612)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9612;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26028)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26028;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_724_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9620)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9620;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26004)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26004;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26036)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26036;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9606)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_714_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26022)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9614)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_631_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26030)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_880_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26006)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6095}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1413)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1413;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17797)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17797;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5509)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5509;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_919_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21893)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21893;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(25989)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 25989;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1017_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13701)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13701;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1445)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1445;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1380_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17829)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17829;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9637)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9637;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_685_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13733)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13733;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1031_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5517)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5517;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17837)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17837;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9645)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9645;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26029)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26029;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_602_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13741)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13741;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_407_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(30125)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 30125;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_753_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21909)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9621)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9621;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1449_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26005)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1461)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1461;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17845)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17845;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9653)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9653;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13749)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13749;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_770_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1415)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1415;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17799)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9607)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9607;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13703)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5543)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_939_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21927)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17807)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_590_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9615)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9615;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1051_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5551)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_856_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(21935)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 21935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(17815)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 17815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_312_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26007)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_273_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1463)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1463;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1468_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26039)=0 EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6096}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26039;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9600)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9600;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9608)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9608;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9642)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9642;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26026)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26034)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26034;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9601)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9601;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_775_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9633)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9633;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26017)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26017;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1024_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9609)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9609;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_692_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9641)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9641;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_497_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26025)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26025;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_941_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9617)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9617;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(26033)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 26033;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9603)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9603;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1375_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9611)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9611;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2_1292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(9619)=0 EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6097}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 9619;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x79_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1488] = {
|
|
/*h(21892)=0 */ {21892, xed3_phash_find_mapevex_map1_opcode0x79_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8595)=3 */ {8595, xed3_phash_find_mapevex_map1_opcode0x79_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1453)=5 */ {1453, xed3_phash_find_mapevex_map1_opcode0x79_vv2_5_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17800)=7 */ {17800, xed3_phash_find_mapevex_map1_opcode0x79_vv2_7_l1},
|
|
/*h(15826)=8 */ {15826, xed3_phash_find_mapevex_map1_opcode0x79_vv2_8_l1},
|
|
/*h(9671)=9 */ {9671, xed3_phash_find_mapevex_map1_opcode0x79_vv2_9_l1},
|
|
/*h(4503)=10 */ {4503, xed3_phash_find_mapevex_map1_opcode0x79_vv2_10_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26018)=12 */ {26018, xed3_phash_find_mapevex_map1_opcode0x79_vv2_12_l1},
|
|
/*h(25031)=13 */ {25031, xed3_phash_find_mapevex_map1_opcode0x79_vv2_13_l1},
|
|
/*h(17889)=14 */ {17889, xed3_phash_find_mapevex_map1_opcode0x79_vv2_14_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11734)=16 */ {11734, xed3_phash_find_mapevex_map1_opcode0x79_vv2_16_l1},
|
|
/*h(5579)=17 */ {5579, xed3_phash_find_mapevex_map1_opcode0x79_vv2_17_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21926)=19 */ {21926, xed3_phash_find_mapevex_map1_opcode0x79_vv2_19_l1},
|
|
/*h(20939)=20 */ {20939, xed3_phash_find_mapevex_map1_opcode0x79_vv2_20_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9616)=22 */ {9616, xed3_phash_find_mapevex_map1_opcode0x79_vv2_22_l1},
|
|
/*h(2474)=23 */ {2474, xed3_phash_find_mapevex_map1_opcode0x79_vv2_23_l1},
|
|
/*h(1487)=24 */ {1487, xed3_phash_find_mapevex_map1_opcode0x79_vv2_24_l1},
|
|
/*h(24976)=25 */ {24976, xed3_phash_find_mapevex_map1_opcode0x79_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17834)=27 */ {17834, xed3_phash_find_mapevex_map1_opcode0x79_vv2_27_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5524)=29 */ {5524, xed3_phash_find_mapevex_map1_opcode0x79_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26052)=31 */ {26052, xed3_phash_find_mapevex_map1_opcode0x79_vv2_31_l1},
|
|
/*h(20884)=32 */ {20884, xed3_phash_find_mapevex_map1_opcode0x79_vv2_32_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5613)=36 */ {5613, xed3_phash_find_mapevex_map1_opcode0x79_vv2_36_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21960)=39 */ {21960, xed3_phash_find_mapevex_map1_opcode0x79_vv2_39_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9650)=41 */ {9650, xed3_phash_find_mapevex_map1_opcode0x79_vv2_41_l1},
|
|
/*h(3495)=42 */ {3495, xed3_phash_find_mapevex_map1_opcode0x79_vv2_42_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25997)=44 */ {25997, xed3_phash_find_mapevex_map1_opcode0x79_vv2_44_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17868)=46 */ {17868, xed3_phash_find_mapevex_map1_opcode0x79_vv2_46_l1},
|
|
/*h(16881)=47 */ {16881, xed3_phash_find_mapevex_map1_opcode0x79_vv2_47_l1},
|
|
/*h(5558)=48 */ {5558, xed3_phash_find_mapevex_map1_opcode0x79_vv2_48_l1},
|
|
/*h(390)=49 */ {390, xed3_phash_find_mapevex_map1_opcode0x79_vv2_49_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21905)=51 */ {21905, xed3_phash_find_mapevex_map1_opcode0x79_vv2_51_l1},
|
|
/*h(15750)=52 */ {15750, xed3_phash_find_mapevex_map1_opcode0x79_vv2_52_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8608)=54 */ {8608, xed3_phash_find_mapevex_map1_opcode0x79_vv2_54_l1},
|
|
/*h(6634)=55 */ {6634, xed3_phash_find_mapevex_map1_opcode0x79_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17813)=58 */ {17813, xed3_phash_find_mapevex_map1_opcode0x79_vv2_58_l1},
|
|
/*h(11658)=59 */ {11658, xed3_phash_find_mapevex_map1_opcode0x79_vv2_59_l1},
|
|
/*h(10671)=60 */ {10671, xed3_phash_find_mapevex_map1_opcode0x79_vv2_60_l1},
|
|
/*h(9684)=61 */ {9684, xed3_phash_find_mapevex_map1_opcode0x79_vv2_61_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26031)=63 */ {26031, xed3_phash_find_mapevex_map1_opcode0x79_vv2_63_l1},
|
|
/*h(25044)=64 */ {25044, xed3_phash_find_mapevex_map1_opcode0x79_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17902)=66 */ {17902, xed3_phash_find_mapevex_map1_opcode0x79_vv2_66_l1},
|
|
/*h(7566)=67 */ {7566, xed3_phash_find_mapevex_map1_opcode0x79_vv2_67_l1},
|
|
/*h(1411)=68 */ {1411, xed3_phash_find_mapevex_map1_opcode0x79_vv2_68_l1},
|
|
/*h(424)=69 */ {424, xed3_phash_find_mapevex_map1_opcode0x79_vv2_69_l1},
|
|
/*h(21939)=70 */ {21939, xed3_phash_find_mapevex_map1_opcode0x79_vv2_70_l1},
|
|
/*h(16771)=71 */ {16771, xed3_phash_find_mapevex_map1_opcode0x79_vv2_71_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8642)=73 */ {8642, xed3_phash_find_mapevex_map1_opcode0x79_vv2_73_l1},
|
|
/*h(3474)=74 */ {3474, xed3_phash_find_mapevex_map1_opcode0x79_vv2_74_l1},
|
|
/*h(30157)=75 */ {30157, xed3_phash_find_mapevex_map1_opcode0x79_vv2_75_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17847)=78 */ {17847, xed3_phash_find_mapevex_map1_opcode0x79_vv2_78_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5537)=80 */ {5537, xed3_phash_find_mapevex_map1_opcode0x79_vv2_80_l1},
|
|
/*h(4550)=81 */ {4550, xed3_phash_find_mapevex_map1_opcode0x79_vv2_81_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26065)=83 */ {26065, xed3_phash_find_mapevex_map1_opcode0x79_vv2_83_l1},
|
|
/*h(14742)=84 */ {14742, xed3_phash_find_mapevex_map1_opcode0x79_vv2_84_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8587)=86 */ {8587, xed3_phash_find_mapevex_map1_opcode0x79_vv2_86_l1},
|
|
/*h(1445)=87 */ {1445, xed3_phash_find_mapevex_map1_opcode0x79_vv2_87_l1},
|
|
/*h(458)=88 */ {458, xed3_phash_find_mapevex_map1_opcode0x79_vv2_88_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17792)=90 */ {17792, xed3_phash_find_mapevex_map1_opcode0x79_vv2_90_l1},
|
|
/*h(15818)=91 */ {15818, xed3_phash_find_mapevex_map1_opcode0x79_vv2_91_l1},
|
|
/*h(14831)=92 */ {14831, xed3_phash_find_mapevex_map1_opcode0x79_vv2_92_l1},
|
|
/*h(4495)=93 */ {4495, xed3_phash_find_mapevex_map1_opcode0x79_vv2_93_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30191)=95 */ {30191, xed3_phash_find_mapevex_map1_opcode0x79_vv2_95_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11726)=99 */ {11726, xed3_phash_find_mapevex_map1_opcode0x79_vv2_99_l1},
|
|
/*h(5571)=100 */ {5571, xed3_phash_find_mapevex_map1_opcode0x79_vv2_100_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26099)=102 */ {26099, xed3_phash_find_mapevex_map1_opcode0x79_vv2_102_l1},
|
|
/*h(20931)=103 */ {20931, xed3_phash_find_mapevex_map1_opcode0x79_vv2_103_l1},
|
|
/*h(9608)=104 */ {9608, xed3_phash_find_mapevex_map1_opcode0x79_vv2_104_l1},
|
|
/*h(8621)=105 */ {8621, xed3_phash_find_mapevex_map1_opcode0x79_vv2_105_l1},
|
|
/*h(7634)=106 */ {7634, xed3_phash_find_mapevex_map1_opcode0x79_vv2_106_l1},
|
|
/*h(1479)=107 */ {1479, xed3_phash_find_mapevex_map1_opcode0x79_vv2_107_l1},
|
|
/*h(24968)=108 */ {24968, xed3_phash_find_mapevex_map1_opcode0x79_vv2_108_l1},
|
|
/*h(17826)=109 */ {17826, xed3_phash_find_mapevex_map1_opcode0x79_vv2_109_l1},
|
|
/*h(22007)=110 */ {22007, xed3_phash_find_mapevex_map1_opcode0x79_vv2_110_l1},
|
|
/*h(11671)=111 */ {11671, xed3_phash_find_mapevex_map1_opcode0x79_vv2_111_l1},
|
|
/*h(5516)=112 */ {5516, xed3_phash_find_mapevex_map1_opcode0x79_vv2_112_l1},
|
|
/*h(3542)=113 */ {3542, xed3_phash_find_mapevex_map1_opcode0x79_vv2_113_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20876)=115 */ {20876, xed3_phash_find_mapevex_map1_opcode0x79_vv2_115_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1424)=119 */ {1424, xed3_phash_find_mapevex_map1_opcode0x79_vv2_119_l1},
|
|
/*h(437)=120 */ {437, xed3_phash_find_mapevex_map1_opcode0x79_vv2_120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21952)=122 */ {21952, xed3_phash_find_mapevex_map1_opcode0x79_vv2_122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9642)=124 */ {9642, xed3_phash_find_mapevex_map1_opcode0x79_vv2_124_l1},
|
|
/*h(8655)=125 */ {8655, xed3_phash_find_mapevex_map1_opcode0x79_vv2_125_l1},
|
|
/*h(25989)=126 */ {25989, xed3_phash_find_mapevex_map1_opcode0x79_vv2_126_l1},
|
|
/*h(1513)=127 */ {1513, xed3_phash_find_mapevex_map1_opcode0x79_vv2_127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17860)=129 */ {17860, xed3_phash_find_mapevex_map1_opcode0x79_vv2_129_l1},
|
|
/*h(16873)=130 */ {16873, xed3_phash_find_mapevex_map1_opcode0x79_vv2_130_l1},
|
|
/*h(5550)=131 */ {5550, xed3_phash_find_mapevex_map1_opcode0x79_vv2_131_l1},
|
|
/*h(4563)=132 */ {4563, xed3_phash_find_mapevex_map1_opcode0x79_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21897)=134 */ {21897, xed3_phash_find_mapevex_map1_opcode0x79_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12781)=137 */ {12781, xed3_phash_find_mapevex_map1_opcode0x79_vv2_137_l1},
|
|
/*h(6626)=138 */ {6626, xed3_phash_find_mapevex_map1_opcode0x79_vv2_138_l1},
|
|
/*h(1458)=139 */ {1458, xed3_phash_find_mapevex_map1_opcode0x79_vv2_139_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17805)=141 */ {17805, xed3_phash_find_mapevex_map1_opcode0x79_vv2_141_l1},
|
|
/*h(15831)=142 */ {15831, xed3_phash_find_mapevex_map1_opcode0x79_vv2_142_l1},
|
|
/*h(10663)=143 */ {10663, xed3_phash_find_mapevex_map1_opcode0x79_vv2_143_l1},
|
|
/*h(9676)=144 */ {9676, xed3_phash_find_mapevex_map1_opcode0x79_vv2_144_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26023)=146 */ {26023, xed3_phash_find_mapevex_map1_opcode0x79_vv2_146_l1},
|
|
/*h(25036)=147 */ {25036, xed3_phash_find_mapevex_map1_opcode0x79_vv2_147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17894)=149 */ {17894, xed3_phash_find_mapevex_map1_opcode0x79_vv2_149_l1},
|
|
/*h(7558)=150 */ {7558, xed3_phash_find_mapevex_map1_opcode0x79_vv2_150_l1},
|
|
/*h(5584)=151 */ {5584, xed3_phash_find_mapevex_map1_opcode0x79_vv2_151_l1},
|
|
/*h(4597)=152 */ {4597, xed3_phash_find_mapevex_map1_opcode0x79_vv2_152_l1},
|
|
/*h(21931)=153 */ {21931, xed3_phash_find_mapevex_map1_opcode0x79_vv2_153_l1},
|
|
/*h(20944)=154 */ {20944, xed3_phash_find_mapevex_map1_opcode0x79_vv2_154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9621)=156 */ {9621, xed3_phash_find_mapevex_map1_opcode0x79_vv2_156_l1},
|
|
/*h(3466)=157 */ {3466, xed3_phash_find_mapevex_map1_opcode0x79_vv2_157_l1},
|
|
/*h(30149)=158 */ {30149, xed3_phash_find_mapevex_map1_opcode0x79_vv2_158_l1},
|
|
/*h(24981)=159 */ {24981, xed3_phash_find_mapevex_map1_opcode0x79_vv2_159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17839)=161 */ {17839, xed3_phash_find_mapevex_map1_opcode0x79_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9710)=163 */ {9710, xed3_phash_find_mapevex_map1_opcode0x79_vv2_163_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26057)=166 */ {26057, xed3_phash_find_mapevex_map1_opcode0x79_vv2_166_l1},
|
|
/*h(14734)=167 */ {14734, xed3_phash_find_mapevex_map1_opcode0x79_vv2_167_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8579)=169 */ {8579, xed3_phash_find_mapevex_map1_opcode0x79_vv2_169_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5618)=171 */ {5618, xed3_phash_find_mapevex_map1_opcode0x79_vv2_171_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21965)=173 */ {21965, xed3_phash_find_mapevex_map1_opcode0x79_vv2_173_l1},
|
|
/*h(15810)=174 */ {15810, xed3_phash_find_mapevex_map1_opcode0x79_vv2_174_l1},
|
|
/*h(9655)=175 */ {9655, xed3_phash_find_mapevex_map1_opcode0x79_vv2_175_l1},
|
|
/*h(4487)=176 */ {4487, xed3_phash_find_mapevex_map1_opcode0x79_vv2_176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26002)=178 */ {26002, xed3_phash_find_mapevex_map1_opcode0x79_vv2_178_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17873)=180 */ {17873, xed3_phash_find_mapevex_map1_opcode0x79_vv2_180_l1},
|
|
/*h(11718)=181 */ {11718, xed3_phash_find_mapevex_map1_opcode0x79_vv2_181_l1},
|
|
/*h(6550)=182 */ {6550, xed3_phash_find_mapevex_map1_opcode0x79_vv2_182_l1},
|
|
/*h(395)=183 */ {395, xed3_phash_find_mapevex_map1_opcode0x79_vv2_183_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21910)=185 */ {21910, xed3_phash_find_mapevex_map1_opcode0x79_vv2_185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9600)=187 */ {9600, xed3_phash_find_mapevex_map1_opcode0x79_vv2_187_l1},
|
|
/*h(13781)=188 */ {13781, xed3_phash_find_mapevex_map1_opcode0x79_vv2_188_l1},
|
|
/*h(7626)=189 */ {7626, xed3_phash_find_mapevex_map1_opcode0x79_vv2_189_l1},
|
|
/*h(24960)=190 */ {24960, xed3_phash_find_mapevex_map1_opcode0x79_vv2_190_l1},
|
|
/*h(484)=191 */ {484, xed3_phash_find_mapevex_map1_opcode0x79_vv2_191_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21999)=193 */ {21999, xed3_phash_find_mapevex_map1_opcode0x79_vv2_193_l1},
|
|
/*h(11663)=194 */ {11663, xed3_phash_find_mapevex_map1_opcode0x79_vv2_194_l1},
|
|
/*h(5508)=195 */ {5508, xed3_phash_find_mapevex_map1_opcode0x79_vv2_195_l1},
|
|
/*h(3534)=196 */ {3534, xed3_phash_find_mapevex_map1_opcode0x79_vv2_196_l1},
|
|
/*h(26036)=197 */ {26036, xed3_phash_find_mapevex_map1_opcode0x79_vv2_197_l1},
|
|
/*h(20868)=198 */ {20868, xed3_phash_find_mapevex_map1_opcode0x79_vv2_198_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17907)=200 */ {17907, xed3_phash_find_mapevex_map1_opcode0x79_vv2_200_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1416)=202 */ {1416, xed3_phash_find_mapevex_map1_opcode0x79_vv2_202_l1},
|
|
/*h(429)=203 */ {429, xed3_phash_find_mapevex_map1_opcode0x79_vv2_203_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16776)=205 */ {16776, xed3_phash_find_mapevex_map1_opcode0x79_vv2_205_l1},
|
|
/*h(14802)=206 */ {14802, xed3_phash_find_mapevex_map1_opcode0x79_vv2_206_l1},
|
|
/*h(9634)=207 */ {9634, xed3_phash_find_mapevex_map1_opcode0x79_vv2_207_l1},
|
|
/*h(3479)=208 */ {3479, xed3_phash_find_mapevex_map1_opcode0x79_vv2_208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1505)=210 */ {1505, xed3_phash_find_mapevex_map1_opcode0x79_vv2_210_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16865)=213 */ {16865, xed3_phash_find_mapevex_map1_opcode0x79_vv2_213_l1},
|
|
/*h(5542)=214 */ {5542, xed3_phash_find_mapevex_map1_opcode0x79_vv2_214_l1},
|
|
/*h(4555)=215 */ {4555, xed3_phash_find_mapevex_map1_opcode0x79_vv2_215_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21889)=217 */ {21889, xed3_phash_find_mapevex_map1_opcode0x79_vv2_217_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8592)=220 */ {8592, xed3_phash_find_mapevex_map1_opcode0x79_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1450)=222 */ {1450, xed3_phash_find_mapevex_map1_opcode0x79_vv2_222_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17797)=224 */ {17797, xed3_phash_find_mapevex_map1_opcode0x79_vv2_224_l1},
|
|
/*h(15823)=225 */ {15823, xed3_phash_find_mapevex_map1_opcode0x79_vv2_225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9668)=227 */ {9668, xed3_phash_find_mapevex_map1_opcode0x79_vv2_227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25028)=230 */ {25028, xed3_phash_find_mapevex_map1_opcode0x79_vv2_230_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5576)=234 */ {5576, xed3_phash_find_mapevex_map1_opcode0x79_vv2_234_l1},
|
|
/*h(4589)=235 */ {4589, xed3_phash_find_mapevex_map1_opcode0x79_vv2_235_l1},
|
|
/*h(21923)=236 */ {21923, xed3_phash_find_mapevex_map1_opcode0x79_vv2_236_l1},
|
|
/*h(20936)=237 */ {20936, xed3_phash_find_mapevex_map1_opcode0x79_vv2_237_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9613)=239 */ {9613, xed3_phash_find_mapevex_map1_opcode0x79_vv2_239_l1},
|
|
/*h(7639)=240 */ {7639, xed3_phash_find_mapevex_map1_opcode0x79_vv2_240_l1},
|
|
/*h(1484)=241 */ {1484, xed3_phash_find_mapevex_map1_opcode0x79_vv2_241_l1},
|
|
/*h(24973)=242 */ {24973, xed3_phash_find_mapevex_map1_opcode0x79_vv2_242_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17831)=244 */ {17831, xed3_phash_find_mapevex_map1_opcode0x79_vv2_244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5521)=246 */ {5521, xed3_phash_find_mapevex_map1_opcode0x79_vv2_246_l1},
|
|
/*h(4534)=247 */ {4534, xed3_phash_find_mapevex_map1_opcode0x79_vv2_247_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26049)=249 */ {26049, xed3_phash_find_mapevex_map1_opcode0x79_vv2_249_l1},
|
|
/*h(14726)=250 */ {14726, xed3_phash_find_mapevex_map1_opcode0x79_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1429)=253 */ {1429, xed3_phash_find_mapevex_map1_opcode0x79_vv2_253_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21957)=256 */ {21957, xed3_phash_find_mapevex_map1_opcode0x79_vv2_256_l1},
|
|
/*h(20970)=257 */ {20970, xed3_phash_find_mapevex_map1_opcode0x79_vv2_257_l1},
|
|
/*h(9647)=258 */ {9647, xed3_phash_find_mapevex_map1_opcode0x79_vv2_258_l1},
|
|
/*h(8660)=259 */ {8660, xed3_phash_find_mapevex_map1_opcode0x79_vv2_259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25994)=261 */ {25994, xed3_phash_find_mapevex_map1_opcode0x79_vv2_261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17865)=263 */ {17865, xed3_phash_find_mapevex_map1_opcode0x79_vv2_263_l1},
|
|
/*h(16878)=264 */ {16878, xed3_phash_find_mapevex_map1_opcode0x79_vv2_264_l1},
|
|
/*h(6542)=265 */ {6542, xed3_phash_find_mapevex_map1_opcode0x79_vv2_265_l1},
|
|
/*h(5555)=266 */ {5555, xed3_phash_find_mapevex_map1_opcode0x79_vv2_266_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21902)=268 */ {21902, xed3_phash_find_mapevex_map1_opcode0x79_vv2_268_l1},
|
|
/*h(20915)=269 */ {20915, xed3_phash_find_mapevex_map1_opcode0x79_vv2_269_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13773)=271 */ {13773, xed3_phash_find_mapevex_map1_opcode0x79_vv2_271_l1},
|
|
/*h(7618)=272 */ {7618, xed3_phash_find_mapevex_map1_opcode0x79_vv2_272_l1},
|
|
/*h(1463)=273 */ {1463, xed3_phash_find_mapevex_map1_opcode0x79_vv2_273_l1},
|
|
/*h(29133)=274 */ {29133, xed3_phash_find_mapevex_map1_opcode0x79_vv2_274_l1},
|
|
/*h(17810)=275 */ {17810, xed3_phash_find_mapevex_map1_opcode0x79_vv2_275_l1},
|
|
/*h(11655)=276 */ {11655, xed3_phash_find_mapevex_map1_opcode0x79_vv2_276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9681)=278 */ {9681, xed3_phash_find_mapevex_map1_opcode0x79_vv2_278_l1},
|
|
/*h(3526)=279 */ {3526, xed3_phash_find_mapevex_map1_opcode0x79_vv2_279_l1},
|
|
/*h(26028)=280 */ {26028, xed3_phash_find_mapevex_map1_opcode0x79_vv2_280_l1},
|
|
/*h(25041)=281 */ {25041, xed3_phash_find_mapevex_map1_opcode0x79_vv2_281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17899)=283 */ {17899, xed3_phash_find_mapevex_map1_opcode0x79_vv2_283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1408)=285 */ {1408, xed3_phash_find_mapevex_map1_opcode0x79_vv2_285_l1},
|
|
/*h(421)=286 */ {421, xed3_phash_find_mapevex_map1_opcode0x79_vv2_286_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21936)=288 */ {21936, xed3_phash_find_mapevex_map1_opcode0x79_vv2_288_l1},
|
|
/*h(14794)=289 */ {14794, xed3_phash_find_mapevex_map1_opcode0x79_vv2_289_l1},
|
|
/*h(13807)=290 */ {13807, xed3_phash_find_mapevex_map1_opcode0x79_vv2_290_l1},
|
|
/*h(3471)=291 */ {3471, xed3_phash_find_mapevex_map1_opcode0x79_vv2_291_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(29167)=293 */ {29167, xed3_phash_find_mapevex_map1_opcode0x79_vv2_293_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17844)=295 */ {17844, xed3_phash_find_mapevex_map1_opcode0x79_vv2_295_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9715)=297 */ {9715, xed3_phash_find_mapevex_map1_opcode0x79_vv2_297_l1},
|
|
/*h(4547)=298 */ {4547, xed3_phash_find_mapevex_map1_opcode0x79_vv2_298_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26062)=300 */ {26062, xed3_phash_find_mapevex_map1_opcode0x79_vv2_300_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8584)=303 */ {8584, xed3_phash_find_mapevex_map1_opcode0x79_vv2_303_l1},
|
|
/*h(6610)=304 */ {6610, xed3_phash_find_mapevex_map1_opcode0x79_vv2_304_l1},
|
|
/*h(1442)=305 */ {1442, xed3_phash_find_mapevex_map1_opcode0x79_vv2_305_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21970)=307 */ {21970, xed3_phash_find_mapevex_map1_opcode0x79_vv2_307_l1},
|
|
/*h(15815)=308 */ {15815, xed3_phash_find_mapevex_map1_opcode0x79_vv2_308_l1},
|
|
/*h(10647)=309 */ {10647, xed3_phash_find_mapevex_map1_opcode0x79_vv2_309_l1},
|
|
/*h(4492)=310 */ {4492, xed3_phash_find_mapevex_map1_opcode0x79_vv2_310_l1},
|
|
/*h(2518)=311 */ {2518, xed3_phash_find_mapevex_map1_opcode0x79_vv2_311_l1},
|
|
/*h(26007)=312 */ {26007, xed3_phash_find_mapevex_map1_opcode0x79_vv2_312_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17878)=314 */ {17878, xed3_phash_find_mapevex_map1_opcode0x79_vv2_314_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5568)=317 */ {5568, xed3_phash_find_mapevex_map1_opcode0x79_vv2_317_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26096)=319 */ {26096, xed3_phash_find_mapevex_map1_opcode0x79_vv2_319_l1},
|
|
/*h(20928)=320 */ {20928, xed3_phash_find_mapevex_map1_opcode0x79_vv2_320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9605)=322 */ {9605, xed3_phash_find_mapevex_map1_opcode0x79_vv2_322_l1},
|
|
/*h(7631)=323 */ {7631, xed3_phash_find_mapevex_map1_opcode0x79_vv2_323_l1},
|
|
/*h(30133)=324 */ {30133, xed3_phash_find_mapevex_map1_opcode0x79_vv2_324_l1},
|
|
/*h(24965)=325 */ {24965, xed3_phash_find_mapevex_map1_opcode0x79_vv2_325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22004)=327 */ {22004, xed3_phash_find_mapevex_map1_opcode0x79_vv2_327_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5513)=329 */ {5513, xed3_phash_find_mapevex_map1_opcode0x79_vv2_329_l1},
|
|
/*h(4526)=330 */ {4526, xed3_phash_find_mapevex_map1_opcode0x79_vv2_330_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20873)=332 */ {20873, xed3_phash_find_mapevex_map1_opcode0x79_vv2_332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1421)=336 */ {1421, xed3_phash_find_mapevex_map1_opcode0x79_vv2_336_l1},
|
|
/*h(434)=337 */ {434, xed3_phash_find_mapevex_map1_opcode0x79_vv2_337_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16781)=339 */ {16781, xed3_phash_find_mapevex_map1_opcode0x79_vv2_339_l1},
|
|
/*h(10626)=340 */ {10626, xed3_phash_find_mapevex_map1_opcode0x79_vv2_340_l1},
|
|
/*h(9639)=341 */ {9639, xed3_phash_find_mapevex_map1_opcode0x79_vv2_341_l1},
|
|
/*h(8652)=342 */ {8652, xed3_phash_find_mapevex_map1_opcode0x79_vv2_342_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25986)=344 */ {25986, xed3_phash_find_mapevex_map1_opcode0x79_vv2_344_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17857)=346 */ {17857, xed3_phash_find_mapevex_map1_opcode0x79_vv2_346_l1},
|
|
/*h(16870)=347 */ {16870, xed3_phash_find_mapevex_map1_opcode0x79_vv2_347_l1},
|
|
/*h(5547)=348 */ {5547, xed3_phash_find_mapevex_map1_opcode0x79_vv2_348_l1},
|
|
/*h(4560)=349 */ {4560, xed3_phash_find_mapevex_map1_opcode0x79_vv2_349_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21894)=351 */ {21894, xed3_phash_find_mapevex_map1_opcode0x79_vv2_351_l1},
|
|
/*h(20907)=352 */ {20907, xed3_phash_find_mapevex_map1_opcode0x79_vv2_352_l1},
|
|
/*h(13765)=353 */ {13765, xed3_phash_find_mapevex_map1_opcode0x79_vv2_353_l1},
|
|
/*h(8597)=354 */ {8597, xed3_phash_find_mapevex_map1_opcode0x79_vv2_354_l1},
|
|
/*h(2442)=355 */ {2442, xed3_phash_find_mapevex_map1_opcode0x79_vv2_355_l1},
|
|
/*h(1455)=356 */ {1455, xed3_phash_find_mapevex_map1_opcode0x79_vv2_356_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17802)=358 */ {17802, xed3_phash_find_mapevex_map1_opcode0x79_vv2_358_l1},
|
|
/*h(16815)=359 */ {16815, xed3_phash_find_mapevex_map1_opcode0x79_vv2_359_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9673)=361 */ {9673, xed3_phash_find_mapevex_map1_opcode0x79_vv2_361_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26020)=363 */ {26020, xed3_phash_find_mapevex_map1_opcode0x79_vv2_363_l1},
|
|
/*h(25033)=364 */ {25033, xed3_phash_find_mapevex_map1_opcode0x79_vv2_364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17891)=366 */ {17891, xed3_phash_find_mapevex_map1_opcode0x79_vv2_366_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5581)=368 */ {5581, xed3_phash_find_mapevex_map1_opcode0x79_vv2_368_l1},
|
|
/*h(4594)=369 */ {4594, xed3_phash_find_mapevex_map1_opcode0x79_vv2_369_l1},
|
|
/*h(21928)=370 */ {21928, xed3_phash_find_mapevex_map1_opcode0x79_vv2_370_l1},
|
|
/*h(20941)=371 */ {20941, xed3_phash_find_mapevex_map1_opcode0x79_vv2_371_l1},
|
|
/*h(14786)=372 */ {14786, xed3_phash_find_mapevex_map1_opcode0x79_vv2_372_l1},
|
|
/*h(9618)=373 */ {9618, xed3_phash_find_mapevex_map1_opcode0x79_vv2_373_l1},
|
|
/*h(3463)=374 */ {3463, xed3_phash_find_mapevex_map1_opcode0x79_vv2_374_l1},
|
|
/*h(1489)=375 */ {1489, xed3_phash_find_mapevex_map1_opcode0x79_vv2_375_l1},
|
|
/*h(24978)=376 */ {24978, xed3_phash_find_mapevex_map1_opcode0x79_vv2_376_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17836)=378 */ {17836, xed3_phash_find_mapevex_map1_opcode0x79_vv2_378_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5526)=380 */ {5526, xed3_phash_find_mapevex_map1_opcode0x79_vv2_380_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26054)=383 */ {26054, xed3_phash_find_mapevex_map1_opcode0x79_vv2_383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8576)=386 */ {8576, xed3_phash_find_mapevex_map1_opcode0x79_vv2_386_l1},
|
|
/*h(6602)=387 */ {6602, xed3_phash_find_mapevex_map1_opcode0x79_vv2_387_l1},
|
|
/*h(5615)=388 */ {5615, xed3_phash_find_mapevex_map1_opcode0x79_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21962)=390 */ {21962, xed3_phash_find_mapevex_map1_opcode0x79_vv2_390_l1},
|
|
/*h(20975)=391 */ {20975, xed3_phash_find_mapevex_map1_opcode0x79_vv2_391_l1},
|
|
/*h(9652)=392 */ {9652, xed3_phash_find_mapevex_map1_opcode0x79_vv2_392_l1},
|
|
/*h(4484)=393 */ {4484, xed3_phash_find_mapevex_map1_opcode0x79_vv2_393_l1},
|
|
/*h(2510)=394 */ {2510, xed3_phash_find_mapevex_map1_opcode0x79_vv2_394_l1},
|
|
/*h(25999)=395 */ {25999, xed3_phash_find_mapevex_map1_opcode0x79_vv2_395_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17870)=397 */ {17870, xed3_phash_find_mapevex_map1_opcode0x79_vv2_397_l1},
|
|
/*h(16883)=398 */ {16883, xed3_phash_find_mapevex_map1_opcode0x79_vv2_398_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(392)=400 */ {392, xed3_phash_find_mapevex_map1_opcode0x79_vv2_400_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21907)=402 */ {21907, xed3_phash_find_mapevex_map1_opcode0x79_vv2_402_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8610)=405 */ {8610, xed3_phash_find_mapevex_map1_opcode0x79_vv2_405_l1},
|
|
/*h(7623)=406 */ {7623, xed3_phash_find_mapevex_map1_opcode0x79_vv2_406_l1},
|
|
/*h(30125)=407 */ {30125, xed3_phash_find_mapevex_map1_opcode0x79_vv2_407_l1},
|
|
/*h(481)=408 */ {481, xed3_phash_find_mapevex_map1_opcode0x79_vv2_408_l1},
|
|
/*h(17815)=409 */ {17815, xed3_phash_find_mapevex_map1_opcode0x79_vv2_409_l1},
|
|
/*h(21996)=410 */ {21996, xed3_phash_find_mapevex_map1_opcode0x79_vv2_410_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5505)=412 */ {5505, xed3_phash_find_mapevex_map1_opcode0x79_vv2_412_l1},
|
|
/*h(4518)=413 */ {4518, xed3_phash_find_mapevex_map1_opcode0x79_vv2_413_l1},
|
|
/*h(26033)=414 */ {26033, xed3_phash_find_mapevex_map1_opcode0x79_vv2_414_l1},
|
|
/*h(20865)=415 */ {20865, xed3_phash_find_mapevex_map1_opcode0x79_vv2_415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17904)=417 */ {17904, xed3_phash_find_mapevex_map1_opcode0x79_vv2_417_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1413)=419 */ {1413, xed3_phash_find_mapevex_map1_opcode0x79_vv2_419_l1},
|
|
/*h(426)=420 */ {426, xed3_phash_find_mapevex_map1_opcode0x79_vv2_420_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21941)=422 */ {21941, xed3_phash_find_mapevex_map1_opcode0x79_vv2_422_l1},
|
|
/*h(15786)=423 */ {15786, xed3_phash_find_mapevex_map1_opcode0x79_vv2_423_l1},
|
|
/*h(14799)=424 */ {14799, xed3_phash_find_mapevex_map1_opcode0x79_vv2_424_l1},
|
|
/*h(8644)=425 */ {8644, xed3_phash_find_mapevex_map1_opcode0x79_vv2_425_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30159)=427 */ {30159, xed3_phash_find_mapevex_map1_opcode0x79_vv2_427_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11694)=430 */ {11694, xed3_phash_find_mapevex_map1_opcode0x79_vv2_430_l1},
|
|
/*h(5539)=431 */ {5539, xed3_phash_find_mapevex_map1_opcode0x79_vv2_431_l1},
|
|
/*h(4552)=432 */ {4552, xed3_phash_find_mapevex_map1_opcode0x79_vv2_432_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26067)=434 */ {26067, xed3_phash_find_mapevex_map1_opcode0x79_vv2_434_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8589)=437 */ {8589, xed3_phash_find_mapevex_map1_opcode0x79_vv2_437_l1},
|
|
/*h(6615)=438 */ {6615, xed3_phash_find_mapevex_map1_opcode0x79_vv2_438_l1},
|
|
/*h(1447)=439 */ {1447, xed3_phash_find_mapevex_map1_opcode0x79_vv2_439_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17794)=441 */ {17794, xed3_phash_find_mapevex_map1_opcode0x79_vv2_441_l1},
|
|
/*h(16807)=442 */ {16807, xed3_phash_find_mapevex_map1_opcode0x79_vv2_442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9665)=444 */ {9665, xed3_phash_find_mapevex_map1_opcode0x79_vv2_444_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25025)=447 */ {25025, xed3_phash_find_mapevex_map1_opcode0x79_vv2_447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5573)=451 */ {5573, xed3_phash_find_mapevex_map1_opcode0x79_vv2_451_l1},
|
|
/*h(405)=452 */ {405, xed3_phash_find_mapevex_map1_opcode0x79_vv2_452_l1},
|
|
/*h(21920)=453 */ {21920, xed3_phash_find_mapevex_map1_opcode0x79_vv2_453_l1},
|
|
/*h(26101)=454 */ {26101, xed3_phash_find_mapevex_map1_opcode0x79_vv2_454_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9610)=456 */ {9610, xed3_phash_find_mapevex_map1_opcode0x79_vv2_456_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1481)=458 */ {1481, xed3_phash_find_mapevex_map1_opcode0x79_vv2_458_l1},
|
|
/*h(24970)=459 */ {24970, xed3_phash_find_mapevex_map1_opcode0x79_vv2_459_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17828)=461 */ {17828, xed3_phash_find_mapevex_map1_opcode0x79_vv2_461_l1},
|
|
/*h(15854)=462 */ {15854, xed3_phash_find_mapevex_map1_opcode0x79_vv2_462_l1},
|
|
/*h(5518)=463 */ {5518, xed3_phash_find_mapevex_map1_opcode0x79_vv2_463_l1},
|
|
/*h(4531)=464 */ {4531, xed3_phash_find_mapevex_map1_opcode0x79_vv2_464_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20878)=466 */ {20878, xed3_phash_find_mapevex_map1_opcode0x79_vv2_466_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12749)=469 */ {12749, xed3_phash_find_mapevex_map1_opcode0x79_vv2_469_l1},
|
|
/*h(1426)=470 */ {1426, xed3_phash_find_mapevex_map1_opcode0x79_vv2_470_l1},
|
|
/*h(5607)=471 */ {5607, xed3_phash_find_mapevex_map1_opcode0x79_vv2_471_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21954)=473 */ {21954, xed3_phash_find_mapevex_map1_opcode0x79_vv2_473_l1},
|
|
/*h(20967)=474 */ {20967, xed3_phash_find_mapevex_map1_opcode0x79_vv2_474_l1},
|
|
/*h(9644)=475 */ {9644, xed3_phash_find_mapevex_map1_opcode0x79_vv2_475_l1},
|
|
/*h(8657)=476 */ {8657, xed3_phash_find_mapevex_map1_opcode0x79_vv2_476_l1},
|
|
/*h(2502)=477 */ {2502, xed3_phash_find_mapevex_map1_opcode0x79_vv2_477_l1},
|
|
/*h(25991)=478 */ {25991, xed3_phash_find_mapevex_map1_opcode0x79_vv2_478_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17862)=480 */ {17862, xed3_phash_find_mapevex_map1_opcode0x79_vv2_480_l1},
|
|
/*h(16875)=481 */ {16875, xed3_phash_find_mapevex_map1_opcode0x79_vv2_481_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5552)=483 */ {5552, xed3_phash_find_mapevex_map1_opcode0x79_vv2_483_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21899)=485 */ {21899, xed3_phash_find_mapevex_map1_opcode0x79_vv2_485_l1},
|
|
/*h(20912)=486 */ {20912, xed3_phash_find_mapevex_map1_opcode0x79_vv2_486_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12783)=488 */ {12783, xed3_phash_find_mapevex_map1_opcode0x79_vv2_488_l1},
|
|
/*h(2447)=489 */ {2447, xed3_phash_find_mapevex_map1_opcode0x79_vv2_489_l1},
|
|
/*h(30117)=490 */ {30117, xed3_phash_find_mapevex_map1_opcode0x79_vv2_490_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17807)=492 */ {17807, xed3_phash_find_mapevex_map1_opcode0x79_vv2_492_l1},
|
|
/*h(21988)=493 */ {21988, xed3_phash_find_mapevex_map1_opcode0x79_vv2_493_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9678)=495 */ {9678, xed3_phash_find_mapevex_map1_opcode0x79_vv2_495_l1},
|
|
/*h(8691)=496 */ {8691, xed3_phash_find_mapevex_map1_opcode0x79_vv2_496_l1},
|
|
/*h(26025)=497 */ {26025, xed3_phash_find_mapevex_map1_opcode0x79_vv2_497_l1},
|
|
/*h(25038)=498 */ {25038, xed3_phash_find_mapevex_map1_opcode0x79_vv2_498_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17896)=500 */ {17896, xed3_phash_find_mapevex_map1_opcode0x79_vv2_500_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5586)=502 */ {5586, xed3_phash_find_mapevex_map1_opcode0x79_vv2_502_l1},
|
|
/*h(418)=503 */ {418, xed3_phash_find_mapevex_map1_opcode0x79_vv2_503_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21933)=505 */ {21933, xed3_phash_find_mapevex_map1_opcode0x79_vv2_505_l1},
|
|
/*h(15778)=506 */ {15778, xed3_phash_find_mapevex_map1_opcode0x79_vv2_506_l1},
|
|
/*h(9623)=507 */ {9623, xed3_phash_find_mapevex_map1_opcode0x79_vv2_507_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30151)=510 */ {30151, xed3_phash_find_mapevex_map1_opcode0x79_vv2_510_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17841)=512 */ {17841, xed3_phash_find_mapevex_map1_opcode0x79_vv2_512_l1},
|
|
/*h(11686)=513 */ {11686, xed3_phash_find_mapevex_map1_opcode0x79_vv2_513_l1},
|
|
/*h(9712)=514 */ {9712, xed3_phash_find_mapevex_map1_opcode0x79_vv2_514_l1},
|
|
/*h(4544)=515 */ {4544, xed3_phash_find_mapevex_map1_opcode0x79_vv2_515_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26059)=517 */ {26059, xed3_phash_find_mapevex_map1_opcode0x79_vv2_517_l1},
|
|
/*h(25072)=518 */ {25072, xed3_phash_find_mapevex_map1_opcode0x79_vv2_518_l1},
|
|
/*h(13749)=519 */ {13749, xed3_phash_find_mapevex_map1_opcode0x79_vv2_519_l1},
|
|
/*h(7594)=520 */ {7594, xed3_phash_find_mapevex_map1_opcode0x79_vv2_520_l1},
|
|
/*h(6607)=521 */ {6607, xed3_phash_find_mapevex_map1_opcode0x79_vv2_521_l1},
|
|
/*h(5620)=522 */ {5620, xed3_phash_find_mapevex_map1_opcode0x79_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21967)=524 */ {21967, xed3_phash_find_mapevex_map1_opcode0x79_vv2_524_l1},
|
|
/*h(20980)=525 */ {20980, xed3_phash_find_mapevex_map1_opcode0x79_vv2_525_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4489)=527 */ {4489, xed3_phash_find_mapevex_map1_opcode0x79_vv2_527_l1},
|
|
/*h(3502)=528 */ {3502, xed3_phash_find_mapevex_map1_opcode0x79_vv2_528_l1},
|
|
/*h(26004)=529 */ {26004, xed3_phash_find_mapevex_map1_opcode0x79_vv2_529_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17875)=532 */ {17875, xed3_phash_find_mapevex_map1_opcode0x79_vv2_532_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(397)=534 */ {397, xed3_phash_find_mapevex_map1_opcode0x79_vv2_534_l1},
|
|
/*h(4578)=535 */ {4578, xed3_phash_find_mapevex_map1_opcode0x79_vv2_535_l1},
|
|
/*h(26093)=536 */ {26093, xed3_phash_find_mapevex_map1_opcode0x79_vv2_536_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9602)=539 */ {9602, xed3_phash_find_mapevex_map1_opcode0x79_vv2_539_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1473)=541 */ {1473, xed3_phash_find_mapevex_map1_opcode0x79_vv2_541_l1},
|
|
/*h(24962)=542 */ {24962, xed3_phash_find_mapevex_map1_opcode0x79_vv2_542_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22001)=544 */ {22001, xed3_phash_find_mapevex_map1_opcode0x79_vv2_544_l1},
|
|
/*h(15846)=545 */ {15846, xed3_phash_find_mapevex_map1_opcode0x79_vv2_545_l1},
|
|
/*h(5510)=546 */ {5510, xed3_phash_find_mapevex_map1_opcode0x79_vv2_546_l1},
|
|
/*h(4523)=547 */ {4523, xed3_phash_find_mapevex_map1_opcode0x79_vv2_547_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26038)=549 */ {26038, xed3_phash_find_mapevex_map1_opcode0x79_vv2_549_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17909)=551 */ {17909, xed3_phash_find_mapevex_map1_opcode0x79_vv2_551_l1},
|
|
/*h(11754)=552 */ {11754, xed3_phash_find_mapevex_map1_opcode0x79_vv2_552_l1},
|
|
/*h(1418)=553 */ {1418, xed3_phash_find_mapevex_map1_opcode0x79_vv2_553_l1},
|
|
/*h(431)=554 */ {431, xed3_phash_find_mapevex_map1_opcode0x79_vv2_554_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16778)=556 */ {16778, xed3_phash_find_mapevex_map1_opcode0x79_vv2_556_l1},
|
|
/*h(15791)=557 */ {15791, xed3_phash_find_mapevex_map1_opcode0x79_vv2_557_l1},
|
|
/*h(9636)=558 */ {9636, xed3_phash_find_mapevex_map1_opcode0x79_vv2_558_l1},
|
|
/*h(8649)=559 */ {8649, xed3_phash_find_mapevex_map1_opcode0x79_vv2_559_l1},
|
|
/*h(7662)=560 */ {7662, xed3_phash_find_mapevex_map1_opcode0x79_vv2_560_l1},
|
|
/*h(1507)=561 */ {1507, xed3_phash_find_mapevex_map1_opcode0x79_vv2_561_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16867)=564 */ {16867, xed3_phash_find_mapevex_map1_opcode0x79_vv2_564_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5544)=566 */ {5544, xed3_phash_find_mapevex_map1_opcode0x79_vv2_566_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21891)=568 */ {21891, xed3_phash_find_mapevex_map1_opcode0x79_vv2_568_l1},
|
|
/*h(20904)=569 */ {20904, xed3_phash_find_mapevex_map1_opcode0x79_vv2_569_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8594)=571 */ {8594, xed3_phash_find_mapevex_map1_opcode0x79_vv2_571_l1},
|
|
/*h(2439)=572 */ {2439, xed3_phash_find_mapevex_map1_opcode0x79_vv2_572_l1},
|
|
/*h(1452)=573 */ {1452, xed3_phash_find_mapevex_map1_opcode0x79_vv2_573_l1},
|
|
/*h(465)=574 */ {465, xed3_phash_find_mapevex_map1_opcode0x79_vv2_574_l1},
|
|
/*h(17799)=575 */ {17799, xed3_phash_find_mapevex_map1_opcode0x79_vv2_575_l1},
|
|
/*h(16812)=576 */ {16812, xed3_phash_find_mapevex_map1_opcode0x79_vv2_576_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9670)=578 */ {9670, xed3_phash_find_mapevex_map1_opcode0x79_vv2_578_l1},
|
|
/*h(8683)=579 */ {8683, xed3_phash_find_mapevex_map1_opcode0x79_vv2_579_l1},
|
|
/*h(26017)=580 */ {26017, xed3_phash_find_mapevex_map1_opcode0x79_vv2_580_l1},
|
|
/*h(25030)=581 */ {25030, xed3_phash_find_mapevex_map1_opcode0x79_vv2_581_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17888)=583 */ {17888, xed3_phash_find_mapevex_map1_opcode0x79_vv2_583_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5578)=585 */ {5578, xed3_phash_find_mapevex_map1_opcode0x79_vv2_585_l1},
|
|
/*h(4591)=586 */ {4591, xed3_phash_find_mapevex_map1_opcode0x79_vv2_586_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21925)=588 */ {21925, xed3_phash_find_mapevex_map1_opcode0x79_vv2_588_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9615)=590 */ {9615, xed3_phash_find_mapevex_map1_opcode0x79_vv2_590_l1},
|
|
/*h(8628)=591 */ {8628, xed3_phash_find_mapevex_map1_opcode0x79_vv2_591_l1},
|
|
/*h(1486)=592 */ {1486, xed3_phash_find_mapevex_map1_opcode0x79_vv2_592_l1},
|
|
/*h(24975)=593 */ {24975, xed3_phash_find_mapevex_map1_opcode0x79_vv2_593_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17833)=595 */ {17833, xed3_phash_find_mapevex_map1_opcode0x79_vv2_595_l1},
|
|
/*h(16846)=596 */ {16846, xed3_phash_find_mapevex_map1_opcode0x79_vv2_596_l1},
|
|
/*h(5523)=597 */ {5523, xed3_phash_find_mapevex_map1_opcode0x79_vv2_597_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26051)=600 */ {26051, xed3_phash_find_mapevex_map1_opcode0x79_vv2_600_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13741)=602 */ {13741, xed3_phash_find_mapevex_map1_opcode0x79_vv2_602_l1},
|
|
/*h(7586)=603 */ {7586, xed3_phash_find_mapevex_map1_opcode0x79_vv2_603_l1},
|
|
/*h(6599)=604 */ {6599, xed3_phash_find_mapevex_map1_opcode0x79_vv2_604_l1},
|
|
/*h(1431)=605 */ {1431, xed3_phash_find_mapevex_map1_opcode0x79_vv2_605_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21959)=607 */ {21959, xed3_phash_find_mapevex_map1_opcode0x79_vv2_607_l1},
|
|
/*h(16791)=608 */ {16791, xed3_phash_find_mapevex_map1_opcode0x79_vv2_608_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9649)=610 */ {9649, xed3_phash_find_mapevex_map1_opcode0x79_vv2_610_l1},
|
|
/*h(3494)=611 */ {3494, xed3_phash_find_mapevex_map1_opcode0x79_vv2_611_l1},
|
|
/*h(25996)=612 */ {25996, xed3_phash_find_mapevex_map1_opcode0x79_vv2_612_l1},
|
|
/*h(25009)=613 */ {25009, xed3_phash_find_mapevex_map1_opcode0x79_vv2_613_l1},
|
|
/*h(17867)=614 */ {17867, xed3_phash_find_mapevex_map1_opcode0x79_vv2_614_l1},
|
|
/*h(16880)=615 */ {16880, xed3_phash_find_mapevex_map1_opcode0x79_vv2_615_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5557)=617 */ {5557, xed3_phash_find_mapevex_map1_opcode0x79_vv2_617_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21904)=619 */ {21904, xed3_phash_find_mapevex_map1_opcode0x79_vv2_619_l1},
|
|
/*h(20917)=620 */ {20917, xed3_phash_find_mapevex_map1_opcode0x79_vv2_620_l1},
|
|
/*h(14762)=621 */ {14762, xed3_phash_find_mapevex_map1_opcode0x79_vv2_621_l1},
|
|
/*h(13775)=622 */ {13775, xed3_phash_find_mapevex_map1_opcode0x79_vv2_622_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(29135)=625 */ {29135, xed3_phash_find_mapevex_map1_opcode0x79_vv2_625_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17812)=627 */ {17812, xed3_phash_find_mapevex_map1_opcode0x79_vv2_627_l1},
|
|
/*h(10670)=628 */ {10670, xed3_phash_find_mapevex_map1_opcode0x79_vv2_628_l1},
|
|
/*h(9683)=629 */ {9683, xed3_phash_find_mapevex_map1_opcode0x79_vv2_629_l1},
|
|
/*h(4515)=630 */ {4515, xed3_phash_find_mapevex_map1_opcode0x79_vv2_630_l1},
|
|
/*h(26030)=631 */ {26030, xed3_phash_find_mapevex_map1_opcode0x79_vv2_631_l1},
|
|
/*h(25043)=632 */ {25043, xed3_phash_find_mapevex_map1_opcode0x79_vv2_632_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17901)=634 */ {17901, xed3_phash_find_mapevex_map1_opcode0x79_vv2_634_l1},
|
|
/*h(11746)=635 */ {11746, xed3_phash_find_mapevex_map1_opcode0x79_vv2_635_l1},
|
|
/*h(1410)=636 */ {1410, xed3_phash_find_mapevex_map1_opcode0x79_vv2_636_l1},
|
|
/*h(423)=637 */ {423, xed3_phash_find_mapevex_map1_opcode0x79_vv2_637_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21938)=639 */ {21938, xed3_phash_find_mapevex_map1_opcode0x79_vv2_639_l1},
|
|
/*h(15783)=640 */ {15783, xed3_phash_find_mapevex_map1_opcode0x79_vv2_640_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8641)=642 */ {8641, xed3_phash_find_mapevex_map1_opcode0x79_vv2_642_l1},
|
|
/*h(7654)=643 */ {7654, xed3_phash_find_mapevex_map1_opcode0x79_vv2_643_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17846)=646 */ {17846, xed3_phash_find_mapevex_map1_opcode0x79_vv2_646_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5536)=649 */ {5536, xed3_phash_find_mapevex_map1_opcode0x79_vv2_649_l1},
|
|
/*h(3562)=650 */ {3562, xed3_phash_find_mapevex_map1_opcode0x79_vv2_650_l1},
|
|
/*h(26064)=651 */ {26064, xed3_phash_find_mapevex_map1_opcode0x79_vv2_651_l1},
|
|
/*h(20896)=652 */ {20896, xed3_phash_find_mapevex_map1_opcode0x79_vv2_652_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8586)=654 */ {8586, xed3_phash_find_mapevex_map1_opcode0x79_vv2_654_l1},
|
|
/*h(7599)=655 */ {7599, xed3_phash_find_mapevex_map1_opcode0x79_vv2_655_l1},
|
|
/*h(30101)=656 */ {30101, xed3_phash_find_mapevex_map1_opcode0x79_vv2_656_l1},
|
|
/*h(457)=657 */ {457, xed3_phash_find_mapevex_map1_opcode0x79_vv2_657_l1},
|
|
/*h(21972)=658 */ {21972, xed3_phash_find_mapevex_map1_opcode0x79_vv2_658_l1},
|
|
/*h(16804)=659 */ {16804, xed3_phash_find_mapevex_map1_opcode0x79_vv2_659_l1},
|
|
/*h(14830)=660 */ {14830, xed3_phash_find_mapevex_map1_opcode0x79_vv2_660_l1},
|
|
/*h(4494)=661 */ {4494, xed3_phash_find_mapevex_map1_opcode0x79_vv2_661_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5570)=668 */ {5570, xed3_phash_find_mapevex_map1_opcode0x79_vv2_668_l1},
|
|
/*h(402)=669 */ {402, xed3_phash_find_mapevex_map1_opcode0x79_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26098)=671 */ {26098, xed3_phash_find_mapevex_map1_opcode0x79_vv2_671_l1},
|
|
/*h(15762)=672 */ {15762, xed3_phash_find_mapevex_map1_opcode0x79_vv2_672_l1},
|
|
/*h(9607)=673 */ {9607, xed3_phash_find_mapevex_map1_opcode0x79_vv2_673_l1},
|
|
/*h(8620)=674 */ {8620, xed3_phash_find_mapevex_map1_opcode0x79_vv2_674_l1},
|
|
/*h(30135)=675 */ {30135, xed3_phash_find_mapevex_map1_opcode0x79_vv2_675_l1},
|
|
/*h(24967)=676 */ {24967, xed3_phash_find_mapevex_map1_opcode0x79_vv2_676_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17825)=678 */ {17825, xed3_phash_find_mapevex_map1_opcode0x79_vv2_678_l1},
|
|
/*h(11670)=679 */ {11670, xed3_phash_find_mapevex_map1_opcode0x79_vv2_679_l1},
|
|
/*h(5515)=680 */ {5515, xed3_phash_find_mapevex_map1_opcode0x79_vv2_680_l1},
|
|
/*h(4528)=681 */ {4528, xed3_phash_find_mapevex_map1_opcode0x79_vv2_681_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20875)=683 */ {20875, xed3_phash_find_mapevex_map1_opcode0x79_vv2_683_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13733)=685 */ {13733, xed3_phash_find_mapevex_map1_opcode0x79_vv2_685_l1},
|
|
/*h(11759)=686 */ {11759, xed3_phash_find_mapevex_map1_opcode0x79_vv2_686_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1423)=688 */ {1423, xed3_phash_find_mapevex_map1_opcode0x79_vv2_688_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16783)=691 */ {16783, xed3_phash_find_mapevex_map1_opcode0x79_vv2_691_l1},
|
|
/*h(9641)=692 */ {9641, xed3_phash_find_mapevex_map1_opcode0x79_vv2_692_l1},
|
|
/*h(8654)=693 */ {8654, xed3_phash_find_mapevex_map1_opcode0x79_vv2_693_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25988)=695 */ {25988, xed3_phash_find_mapevex_map1_opcode0x79_vv2_695_l1},
|
|
/*h(25001)=696 */ {25001, xed3_phash_find_mapevex_map1_opcode0x79_vv2_696_l1},
|
|
/*h(17859)=697 */ {17859, xed3_phash_find_mapevex_map1_opcode0x79_vv2_697_l1},
|
|
/*h(16872)=698 */ {16872, xed3_phash_find_mapevex_map1_opcode0x79_vv2_698_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5549)=700 */ {5549, xed3_phash_find_mapevex_map1_opcode0x79_vv2_700_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21896)=702 */ {21896, xed3_phash_find_mapevex_map1_opcode0x79_vv2_702_l1},
|
|
/*h(20909)=703 */ {20909, xed3_phash_find_mapevex_map1_opcode0x79_vv2_703_l1},
|
|
/*h(14754)=704 */ {14754, xed3_phash_find_mapevex_map1_opcode0x79_vv2_704_l1},
|
|
/*h(13767)=705 */ {13767, xed3_phash_find_mapevex_map1_opcode0x79_vv2_705_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1457)=707 */ {1457, xed3_phash_find_mapevex_map1_opcode0x79_vv2_707_l1},
|
|
/*h(470)=708 */ {470, xed3_phash_find_mapevex_map1_opcode0x79_vv2_708_l1},
|
|
/*h(17804)=709 */ {17804, xed3_phash_find_mapevex_map1_opcode0x79_vv2_709_l1},
|
|
/*h(21985)=710 */ {21985, xed3_phash_find_mapevex_map1_opcode0x79_vv2_710_l1},
|
|
/*h(15830)=711 */ {15830, xed3_phash_find_mapevex_map1_opcode0x79_vv2_711_l1},
|
|
/*h(9675)=712 */ {9675, xed3_phash_find_mapevex_map1_opcode0x79_vv2_712_l1},
|
|
/*h(8688)=713 */ {8688, xed3_phash_find_mapevex_map1_opcode0x79_vv2_713_l1},
|
|
/*h(26022)=714 */ {26022, xed3_phash_find_mapevex_map1_opcode0x79_vv2_714_l1},
|
|
/*h(25035)=715 */ {25035, xed3_phash_find_mapevex_map1_opcode0x79_vv2_715_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17893)=717 */ {17893, xed3_phash_find_mapevex_map1_opcode0x79_vv2_717_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5583)=719 */ {5583, xed3_phash_find_mapevex_map1_opcode0x79_vv2_719_l1},
|
|
/*h(4596)=720 */ {4596, xed3_phash_find_mapevex_map1_opcode0x79_vv2_720_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21930)=722 */ {21930, xed3_phash_find_mapevex_map1_opcode0x79_vv2_722_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9620)=724 */ {9620, xed3_phash_find_mapevex_map1_opcode0x79_vv2_724_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2478)=726 */ {2478, xed3_phash_find_mapevex_map1_opcode0x79_vv2_726_l1},
|
|
/*h(1491)=727 */ {1491, xed3_phash_find_mapevex_map1_opcode0x79_vv2_727_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17838)=729 */ {17838, xed3_phash_find_mapevex_map1_opcode0x79_vv2_729_l1},
|
|
/*h(16851)=730 */ {16851, xed3_phash_find_mapevex_map1_opcode0x79_vv2_730_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9709)=732 */ {9709, xed3_phash_find_mapevex_map1_opcode0x79_vv2_732_l1},
|
|
/*h(3554)=733 */ {3554, xed3_phash_find_mapevex_map1_opcode0x79_vv2_733_l1},
|
|
/*h(26056)=734 */ {26056, xed3_phash_find_mapevex_map1_opcode0x79_vv2_734_l1},
|
|
/*h(25069)=735 */ {25069, xed3_phash_find_mapevex_map1_opcode0x79_vv2_735_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8578)=737 */ {8578, xed3_phash_find_mapevex_map1_opcode0x79_vv2_737_l1},
|
|
/*h(7591)=738 */ {7591, xed3_phash_find_mapevex_map1_opcode0x79_vv2_738_l1},
|
|
/*h(30093)=739 */ {30093, xed3_phash_find_mapevex_map1_opcode0x79_vv2_739_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21964)=741 */ {21964, xed3_phash_find_mapevex_map1_opcode0x79_vv2_741_l1},
|
|
/*h(20977)=742 */ {20977, xed3_phash_find_mapevex_map1_opcode0x79_vv2_742_l1},
|
|
/*h(14822)=743 */ {14822, xed3_phash_find_mapevex_map1_opcode0x79_vv2_743_l1},
|
|
/*h(9654)=744 */ {9654, xed3_phash_find_mapevex_map1_opcode0x79_vv2_744_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26001)=746 */ {26001, xed3_phash_find_mapevex_map1_opcode0x79_vv2_746_l1},
|
|
/*h(25014)=747 */ {25014, xed3_phash_find_mapevex_map1_opcode0x79_vv2_747_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17872)=749 */ {17872, xed3_phash_find_mapevex_map1_opcode0x79_vv2_749_l1},
|
|
/*h(10730)=750 */ {10730, xed3_phash_find_mapevex_map1_opcode0x79_vv2_750_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(394)=752 */ {394, xed3_phash_find_mapevex_map1_opcode0x79_vv2_752_l1},
|
|
/*h(21909)=753 */ {21909, xed3_phash_find_mapevex_map1_opcode0x79_vv2_753_l1},
|
|
/*h(26090)=754 */ {26090, xed3_phash_find_mapevex_map1_opcode0x79_vv2_754_l1},
|
|
/*h(15754)=755 */ {15754, xed3_phash_find_mapevex_map1_opcode0x79_vv2_755_l1},
|
|
/*h(8612)=756 */ {8612, xed3_phash_find_mapevex_map1_opcode0x79_vv2_756_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30127)=758 */ {30127, xed3_phash_find_mapevex_map1_opcode0x79_vv2_758_l1},
|
|
/*h(483)=759 */ {483, xed3_phash_find_mapevex_map1_opcode0x79_vv2_759_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21998)=761 */ {21998, xed3_phash_find_mapevex_map1_opcode0x79_vv2_761_l1},
|
|
/*h(11662)=762 */ {11662, xed3_phash_find_mapevex_map1_opcode0x79_vv2_762_l1},
|
|
/*h(5507)=763 */ {5507, xed3_phash_find_mapevex_map1_opcode0x79_vv2_763_l1},
|
|
/*h(4520)=764 */ {4520, xed3_phash_find_mapevex_map1_opcode0x79_vv2_764_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26035)=766 */ {26035, xed3_phash_find_mapevex_map1_opcode0x79_vv2_766_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17906)=768 */ {17906, xed3_phash_find_mapevex_map1_opcode0x79_vv2_768_l1},
|
|
/*h(7570)=769 */ {7570, xed3_phash_find_mapevex_map1_opcode0x79_vv2_769_l1},
|
|
/*h(1415)=770 */ {1415, xed3_phash_find_mapevex_map1_opcode0x79_vv2_770_l1},
|
|
/*h(428)=771 */ {428, xed3_phash_find_mapevex_map1_opcode0x79_vv2_771_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21943)=773 */ {21943, xed3_phash_find_mapevex_map1_opcode0x79_vv2_773_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9633)=775 */ {9633, xed3_phash_find_mapevex_map1_opcode0x79_vv2_775_l1},
|
|
/*h(8646)=776 */ {8646, xed3_phash_find_mapevex_map1_opcode0x79_vv2_776_l1},
|
|
/*h(3478)=777 */ {3478, xed3_phash_find_mapevex_map1_opcode0x79_vv2_777_l1},
|
|
/*h(1504)=778 */ {1504, xed3_phash_find_mapevex_map1_opcode0x79_vv2_778_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16864)=781 */ {16864, xed3_phash_find_mapevex_map1_opcode0x79_vv2_781_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5541)=783 */ {5541, xed3_phash_find_mapevex_map1_opcode0x79_vv2_783_l1},
|
|
/*h(3567)=784 */ {3567, xed3_phash_find_mapevex_map1_opcode0x79_vv2_784_l1},
|
|
/*h(21888)=785 */ {21888, xed3_phash_find_mapevex_map1_opcode0x79_vv2_785_l1},
|
|
/*h(20901)=786 */ {20901, xed3_phash_find_mapevex_map1_opcode0x79_vv2_786_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8591)=788 */ {8591, xed3_phash_find_mapevex_map1_opcode0x79_vv2_788_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1449)=790 */ {1449, xed3_phash_find_mapevex_map1_opcode0x79_vv2_790_l1},
|
|
/*h(462)=791 */ {462, xed3_phash_find_mapevex_map1_opcode0x79_vv2_791_l1},
|
|
/*h(17796)=792 */ {17796, xed3_phash_find_mapevex_map1_opcode0x79_vv2_792_l1},
|
|
/*h(16809)=793 */ {16809, xed3_phash_find_mapevex_map1_opcode0x79_vv2_793_l1},
|
|
/*h(15822)=794 */ {15822, xed3_phash_find_mapevex_map1_opcode0x79_vv2_794_l1},
|
|
/*h(9667)=795 */ {9667, xed3_phash_find_mapevex_map1_opcode0x79_vv2_795_l1},
|
|
/*h(8680)=796 */ {8680, xed3_phash_find_mapevex_map1_opcode0x79_vv2_796_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25027)=798 */ {25027, xed3_phash_find_mapevex_map1_opcode0x79_vv2_798_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12717)=800 */ {12717, xed3_phash_find_mapevex_map1_opcode0x79_vv2_800_l1},
|
|
/*h(11730)=801 */ {11730, xed3_phash_find_mapevex_map1_opcode0x79_vv2_801_l1},
|
|
/*h(5575)=802 */ {5575, xed3_phash_find_mapevex_map1_opcode0x79_vv2_802_l1},
|
|
/*h(407)=803 */ {407, xed3_phash_find_mapevex_map1_opcode0x79_vv2_803_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21922)=805 */ {21922, xed3_phash_find_mapevex_map1_opcode0x79_vv2_805_l1},
|
|
/*h(15767)=806 */ {15767, xed3_phash_find_mapevex_map1_opcode0x79_vv2_806_l1},
|
|
/*h(9612)=807 */ {9612, xed3_phash_find_mapevex_map1_opcode0x79_vv2_807_l1},
|
|
/*h(7638)=808 */ {7638, xed3_phash_find_mapevex_map1_opcode0x79_vv2_808_l1},
|
|
/*h(2470)=809 */ {2470, xed3_phash_find_mapevex_map1_opcode0x79_vv2_809_l1},
|
|
/*h(1483)=810 */ {1483, xed3_phash_find_mapevex_map1_opcode0x79_vv2_810_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17830)=812 */ {17830, xed3_phash_find_mapevex_map1_opcode0x79_vv2_812_l1},
|
|
/*h(16843)=813 */ {16843, xed3_phash_find_mapevex_map1_opcode0x79_vv2_813_l1},
|
|
/*h(5520)=814 */ {5520, xed3_phash_find_mapevex_map1_opcode0x79_vv2_814_l1},
|
|
/*h(9701)=815 */ {9701, xed3_phash_find_mapevex_map1_opcode0x79_vv2_815_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26048)=817 */ {26048, xed3_phash_find_mapevex_map1_opcode0x79_vv2_817_l1},
|
|
/*h(25061)=818 */ {25061, xed3_phash_find_mapevex_map1_opcode0x79_vv2_818_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12751)=820 */ {12751, xed3_phash_find_mapevex_map1_opcode0x79_vv2_820_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30085)=822 */ {30085, xed3_phash_find_mapevex_map1_opcode0x79_vv2_822_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21956)=824 */ {21956, xed3_phash_find_mapevex_map1_opcode0x79_vv2_824_l1},
|
|
/*h(16788)=825 */ {16788, xed3_phash_find_mapevex_map1_opcode0x79_vv2_825_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9646)=827 */ {9646, xed3_phash_find_mapevex_map1_opcode0x79_vv2_827_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25993)=829 */ {25993, xed3_phash_find_mapevex_map1_opcode0x79_vv2_829_l1},
|
|
/*h(25006)=830 */ {25006, xed3_phash_find_mapevex_map1_opcode0x79_vv2_830_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17864)=832 */ {17864, xed3_phash_find_mapevex_map1_opcode0x79_vv2_832_l1},
|
|
/*h(10722)=833 */ {10722, xed3_phash_find_mapevex_map1_opcode0x79_vv2_833_l1},
|
|
/*h(5554)=834 */ {5554, xed3_phash_find_mapevex_map1_opcode0x79_vv2_834_l1},
|
|
/*h(4567)=835 */ {4567, xed3_phash_find_mapevex_map1_opcode0x79_vv2_835_l1},
|
|
/*h(21901)=836 */ {21901, xed3_phash_find_mapevex_map1_opcode0x79_vv2_836_l1},
|
|
/*h(20914)=837 */ {20914, xed3_phash_find_mapevex_map1_opcode0x79_vv2_837_l1},
|
|
/*h(15746)=838 */ {15746, xed3_phash_find_mapevex_map1_opcode0x79_vv2_838_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30119)=841 */ {30119, xed3_phash_find_mapevex_map1_opcode0x79_vv2_841_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17809)=844 */ {17809, xed3_phash_find_mapevex_map1_opcode0x79_vv2_844_l1},
|
|
/*h(11654)=845 */ {11654, xed3_phash_find_mapevex_map1_opcode0x79_vv2_845_l1},
|
|
/*h(9680)=846 */ {9680, xed3_phash_find_mapevex_map1_opcode0x79_vv2_846_l1},
|
|
/*h(4512)=847 */ {4512, xed3_phash_find_mapevex_map1_opcode0x79_vv2_847_l1},
|
|
/*h(2538)=848 */ {2538, xed3_phash_find_mapevex_map1_opcode0x79_vv2_848_l1},
|
|
/*h(26027)=849 */ {26027, xed3_phash_find_mapevex_map1_opcode0x79_vv2_849_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13717)=851 */ {13717, xed3_phash_find_mapevex_map1_opcode0x79_vv2_851_l1},
|
|
/*h(7562)=852 */ {7562, xed3_phash_find_mapevex_map1_opcode0x79_vv2_852_l1},
|
|
/*h(6575)=853 */ {6575, xed3_phash_find_mapevex_map1_opcode0x79_vv2_853_l1},
|
|
/*h(5588)=854 */ {5588, xed3_phash_find_mapevex_map1_opcode0x79_vv2_854_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21935)=856 */ {21935, xed3_phash_find_mapevex_map1_opcode0x79_vv2_856_l1},
|
|
/*h(20948)=857 */ {20948, xed3_phash_find_mapevex_map1_opcode0x79_vv2_857_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3470)=859 */ {3470, xed3_phash_find_mapevex_map1_opcode0x79_vv2_859_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17843)=863 */ {17843, xed3_phash_find_mapevex_map1_opcode0x79_vv2_863_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9714)=866 */ {9714, xed3_phash_find_mapevex_map1_opcode0x79_vv2_866_l1},
|
|
/*h(3559)=867 */ {3559, xed3_phash_find_mapevex_map1_opcode0x79_vv2_867_l1},
|
|
/*h(26061)=868 */ {26061, xed3_phash_find_mapevex_map1_opcode0x79_vv2_868_l1},
|
|
/*h(25074)=869 */ {25074, xed3_phash_find_mapevex_map1_opcode0x79_vv2_869_l1},
|
|
/*h(14738)=870 */ {14738, xed3_phash_find_mapevex_map1_opcode0x79_vv2_870_l1},
|
|
/*h(13751)=871 */ {13751, xed3_phash_find_mapevex_map1_opcode0x79_vv2_871_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1441)=873 */ {1441, xed3_phash_find_mapevex_map1_opcode0x79_vv2_873_l1},
|
|
/*h(29111)=874 */ {29111, xed3_phash_find_mapevex_map1_opcode0x79_vv2_874_l1},
|
|
/*h(21969)=875 */ {21969, xed3_phash_find_mapevex_map1_opcode0x79_vv2_875_l1},
|
|
/*h(16801)=876 */ {16801, xed3_phash_find_mapevex_map1_opcode0x79_vv2_876_l1},
|
|
/*h(15814)=877 */ {15814, xed3_phash_find_mapevex_map1_opcode0x79_vv2_877_l1},
|
|
/*h(4491)=878 */ {4491, xed3_phash_find_mapevex_map1_opcode0x79_vv2_878_l1},
|
|
/*h(8672)=879 */ {8672, xed3_phash_find_mapevex_map1_opcode0x79_vv2_879_l1},
|
|
/*h(26006)=880 */ {26006, xed3_phash_find_mapevex_map1_opcode0x79_vv2_880_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17877)=883 */ {17877, xed3_phash_find_mapevex_map1_opcode0x79_vv2_883_l1},
|
|
/*h(11722)=884 */ {11722, xed3_phash_find_mapevex_map1_opcode0x79_vv2_884_l1},
|
|
/*h(10735)=885 */ {10735, xed3_phash_find_mapevex_map1_opcode0x79_vv2_885_l1},
|
|
/*h(399)=886 */ {399, xed3_phash_find_mapevex_map1_opcode0x79_vv2_886_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26095)=888 */ {26095, xed3_phash_find_mapevex_map1_opcode0x79_vv2_888_l1},
|
|
/*h(15759)=889 */ {15759, xed3_phash_find_mapevex_map1_opcode0x79_vv2_889_l1},
|
|
/*h(9604)=890 */ {9604, xed3_phash_find_mapevex_map1_opcode0x79_vv2_890_l1},
|
|
/*h(7630)=891 */ {7630, xed3_phash_find_mapevex_map1_opcode0x79_vv2_891_l1},
|
|
/*h(1475)=892 */ {1475, xed3_phash_find_mapevex_map1_opcode0x79_vv2_892_l1},
|
|
/*h(24964)=893 */ {24964, xed3_phash_find_mapevex_map1_opcode0x79_vv2_893_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22003)=895 */ {22003, xed3_phash_find_mapevex_map1_opcode0x79_vv2_895_l1},
|
|
/*h(16835)=896 */ {16835, xed3_phash_find_mapevex_map1_opcode0x79_vv2_896_l1},
|
|
/*h(5512)=897 */ {5512, xed3_phash_find_mapevex_map1_opcode0x79_vv2_897_l1},
|
|
/*h(4525)=898 */ {4525, xed3_phash_find_mapevex_map1_opcode0x79_vv2_898_l1},
|
|
/*h(3538)=899 */ {3538, xed3_phash_find_mapevex_map1_opcode0x79_vv2_899_l1},
|
|
/*h(20872)=900 */ {20872, xed3_phash_find_mapevex_map1_opcode0x79_vv2_900_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17911)=902 */ {17911, xed3_phash_find_mapevex_map1_opcode0x79_vv2_902_l1},
|
|
/*h(7575)=903 */ {7575, xed3_phash_find_mapevex_map1_opcode0x79_vv2_903_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1420)=905 */ {1420, xed3_phash_find_mapevex_map1_opcode0x79_vv2_905_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16780)=908 */ {16780, xed3_phash_find_mapevex_map1_opcode0x79_vv2_908_l1},
|
|
/*h(14806)=909 */ {14806, xed3_phash_find_mapevex_map1_opcode0x79_vv2_909_l1},
|
|
/*h(9638)=910 */ {9638, xed3_phash_find_mapevex_map1_opcode0x79_vv2_910_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25985)=912 */ {25985, xed3_phash_find_mapevex_map1_opcode0x79_vv2_912_l1},
|
|
/*h(24998)=913 */ {24998, xed3_phash_find_mapevex_map1_opcode0x79_vv2_913_l1},
|
|
/*h(17856)=914 */ {17856, xed3_phash_find_mapevex_map1_opcode0x79_vv2_914_l1},
|
|
/*h(16869)=915 */ {16869, xed3_phash_find_mapevex_map1_opcode0x79_vv2_915_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5546)=917 */ {5546, xed3_phash_find_mapevex_map1_opcode0x79_vv2_917_l1},
|
|
/*h(4559)=918 */ {4559, xed3_phash_find_mapevex_map1_opcode0x79_vv2_918_l1},
|
|
/*h(21893)=919 */ {21893, xed3_phash_find_mapevex_map1_opcode0x79_vv2_919_l1},
|
|
/*h(20906)=920 */ {20906, xed3_phash_find_mapevex_map1_opcode0x79_vv2_920_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8596)=922 */ {8596, xed3_phash_find_mapevex_map1_opcode0x79_vv2_922_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1454)=924 */ {1454, xed3_phash_find_mapevex_map1_opcode0x79_vv2_924_l1},
|
|
/*h(467)=925 */ {467, xed3_phash_find_mapevex_map1_opcode0x79_vv2_925_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17801)=927 */ {17801, xed3_phash_find_mapevex_map1_opcode0x79_vv2_927_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9672)=929 */ {9672, xed3_phash_find_mapevex_map1_opcode0x79_vv2_929_l1},
|
|
/*h(8685)=930 */ {8685, xed3_phash_find_mapevex_map1_opcode0x79_vv2_930_l1},
|
|
/*h(2530)=931 */ {2530, xed3_phash_find_mapevex_map1_opcode0x79_vv2_931_l1},
|
|
/*h(26019)=932 */ {26019, xed3_phash_find_mapevex_map1_opcode0x79_vv2_932_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13709)=934 */ {13709, xed3_phash_find_mapevex_map1_opcode0x79_vv2_934_l1},
|
|
/*h(11735)=935 */ {11735, xed3_phash_find_mapevex_map1_opcode0x79_vv2_935_l1},
|
|
/*h(5580)=936 */ {5580, xed3_phash_find_mapevex_map1_opcode0x79_vv2_936_l1},
|
|
/*h(29069)=937 */ {29069, xed3_phash_find_mapevex_map1_opcode0x79_vv2_937_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21927)=939 */ {21927, xed3_phash_find_mapevex_map1_opcode0x79_vv2_939_l1},
|
|
/*h(20940)=940 */ {20940, xed3_phash_find_mapevex_map1_opcode0x79_vv2_940_l1},
|
|
/*h(9617)=941 */ {9617, xed3_phash_find_mapevex_map1_opcode0x79_vv2_941_l1},
|
|
/*h(3462)=942 */ {3462, xed3_phash_find_mapevex_map1_opcode0x79_vv2_942_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1488)=944 */ {1488, xed3_phash_find_mapevex_map1_opcode0x79_vv2_944_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17835)=946 */ {17835, xed3_phash_find_mapevex_map1_opcode0x79_vv2_946_l1},
|
|
/*h(16848)=947 */ {16848, xed3_phash_find_mapevex_map1_opcode0x79_vv2_947_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5525)=949 */ {5525, xed3_phash_find_mapevex_map1_opcode0x79_vv2_949_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26053)=951 */ {26053, xed3_phash_find_mapevex_map1_opcode0x79_vv2_951_l1},
|
|
/*h(20885)=952 */ {20885, xed3_phash_find_mapevex_map1_opcode0x79_vv2_952_l1},
|
|
/*h(13743)=953 */ {13743, xed3_phash_find_mapevex_map1_opcode0x79_vv2_953_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5614)=956 */ {5614, xed3_phash_find_mapevex_map1_opcode0x79_vv2_956_l1},
|
|
/*h(29103)=957 */ {29103, xed3_phash_find_mapevex_map1_opcode0x79_vv2_957_l1},
|
|
/*h(21961)=958 */ {21961, xed3_phash_find_mapevex_map1_opcode0x79_vv2_958_l1},
|
|
/*h(20974)=959 */ {20974, xed3_phash_find_mapevex_map1_opcode0x79_vv2_959_l1},
|
|
/*h(10638)=960 */ {10638, xed3_phash_find_mapevex_map1_opcode0x79_vv2_960_l1},
|
|
/*h(9651)=961 */ {9651, xed3_phash_find_mapevex_map1_opcode0x79_vv2_961_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25998)=963 */ {25998, xed3_phash_find_mapevex_map1_opcode0x79_vv2_963_l1},
|
|
/*h(25011)=964 */ {25011, xed3_phash_find_mapevex_map1_opcode0x79_vv2_964_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17869)=966 */ {17869, xed3_phash_find_mapevex_map1_opcode0x79_vv2_966_l1},
|
|
/*h(11714)=967 */ {11714, xed3_phash_find_mapevex_map1_opcode0x79_vv2_967_l1},
|
|
/*h(5559)=968 */ {5559, xed3_phash_find_mapevex_map1_opcode0x79_vv2_968_l1},
|
|
/*h(391)=969 */ {391, xed3_phash_find_mapevex_map1_opcode0x79_vv2_969_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21906)=971 */ {21906, xed3_phash_find_mapevex_map1_opcode0x79_vv2_971_l1},
|
|
/*h(15751)=972 */ {15751, xed3_phash_find_mapevex_map1_opcode0x79_vv2_972_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7622)=974 */ {7622, xed3_phash_find_mapevex_map1_opcode0x79_vv2_974_l1},
|
|
/*h(2454)=975 */ {2454, xed3_phash_find_mapevex_map1_opcode0x79_vv2_975_l1},
|
|
/*h(480)=976 */ {480, xed3_phash_find_mapevex_map1_opcode0x79_vv2_976_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17814)=978 */ {17814, xed3_phash_find_mapevex_map1_opcode0x79_vv2_978_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5504)=980 */ {5504, xed3_phash_find_mapevex_map1_opcode0x79_vv2_980_l1},
|
|
/*h(4517)=981 */ {4517, xed3_phash_find_mapevex_map1_opcode0x79_vv2_981_l1},
|
|
/*h(3530)=982 */ {3530, xed3_phash_find_mapevex_map1_opcode0x79_vv2_982_l1},
|
|
/*h(26032)=983 */ {26032, xed3_phash_find_mapevex_map1_opcode0x79_vv2_983_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17903)=985 */ {17903, xed3_phash_find_mapevex_map1_opcode0x79_vv2_985_l1},
|
|
/*h(7567)=986 */ {7567, xed3_phash_find_mapevex_map1_opcode0x79_vv2_986_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1412)=988 */ {1412, xed3_phash_find_mapevex_map1_opcode0x79_vv2_988_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21940)=990 */ {21940, xed3_phash_find_mapevex_map1_opcode0x79_vv2_990_l1},
|
|
/*h(16772)=991 */ {16772, xed3_phash_find_mapevex_map1_opcode0x79_vv2_991_l1},
|
|
/*h(14798)=992 */ {14798, xed3_phash_find_mapevex_map1_opcode0x79_vv2_992_l1},
|
|
/*h(8643)=993 */ {8643, xed3_phash_find_mapevex_map1_opcode0x79_vv2_993_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10706)=999 */ {10706, xed3_phash_find_mapevex_map1_opcode0x79_vv2_999_l1},
|
|
/*h(5538)=1000 */ {5538, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1000_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26066)=1002 */ {26066, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1002_l1},
|
|
/*h(20898)=1003 */ {20898, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1003_l1},
|
|
/*h(14743)=1004 */ {14743, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1004_l1},
|
|
/*h(8588)=1005 */ {8588, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1005_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30103)=1007 */ {30103, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1007_l1},
|
|
/*h(459)=1008 */ {459, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1008_l1},
|
|
/*h(17793)=1009 */ {17793, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1009_l1},
|
|
/*h(21974)=1010 */ {21974, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1010_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9664)=1012 */ {9664, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1012_l1},
|
|
/*h(4496)=1013 */ {4496, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1013_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25024)=1015 */ {25024, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1015_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13701)=1017 */ {13701, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1017_l1},
|
|
/*h(11727)=1018 */ {11727, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1018_l1},
|
|
/*h(5572)=1019 */ {5572, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1019_l1},
|
|
/*h(404)=1020 */ {404, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1020_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26100)=1022 */ {26100, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1022_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9609)=1024 */ {9609, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1024_l1},
|
|
/*h(8622)=1025 */ {8622, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1025_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1480)=1027 */ {1480, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1027_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17827)=1029 */ {17827, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1029_l1},
|
|
/*h(16840)=1030 */ {16840, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1030_l1},
|
|
/*h(5517)=1031 */ {5517, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1031_l1},
|
|
/*h(9698)=1032 */ {9698, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1032_l1},
|
|
/*h(3543)=1033 */ {3543, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1033_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20877)=1035 */ {20877, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1035_l1},
|
|
/*h(13735)=1036 */ {13735, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1036_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1425)=1039 */ {1425, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1039_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21953)=1041 */ {21953, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1041_l1},
|
|
/*h(16785)=1042 */ {16785, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1042_l1},
|
|
/*h(10630)=1043 */ {10630, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1043_l1},
|
|
/*h(9643)=1044 */ {9643, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1044_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25990)=1046 */ {25990, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1046_l1},
|
|
/*h(25003)=1047 */ {25003, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1047_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17861)=1049 */ {17861, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1049_l1},
|
|
/*h(6538)=1050 */ {6538, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1050_l1},
|
|
/*h(5551)=1051 */ {5551, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1051_l1},
|
|
/*h(4564)=1052 */ {4564, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1052_l1},
|
|
/*h(21898)=1053 */ {21898, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1053_l1},
|
|
/*h(20911)=1054 */ {20911, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1054_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1459)=1058 */ {1459, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1058_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17806)=1061 */ {17806, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1061_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9677)=1063 */ {9677, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1063_l1},
|
|
/*h(3522)=1064 */ {3522, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1064_l1},
|
|
/*h(2535)=1065 */ {2535, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1065_l1},
|
|
/*h(26024)=1066 */ {26024, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1066_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17895)=1068 */ {17895, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1068_l1},
|
|
/*h(7559)=1069 */ {7559, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1069_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5585)=1071 */ {5585, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1071_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21932)=1073 */ {21932, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1073_l1},
|
|
/*h(20945)=1074 */ {20945, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1074_l1},
|
|
/*h(9622)=1075 */ {9622, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1075_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1493)=1078 */ {1493, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1078_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17840)=1080 */ {17840, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1080_l1},
|
|
/*h(16853)=1081 */ {16853, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1081_l1},
|
|
/*h(10698)=1082 */ {10698, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1082_l1},
|
|
/*h(9711)=1083 */ {9711, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1083_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26058)=1085 */ {26058, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1085_l1},
|
|
/*h(25071)=1086 */ {25071, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1086_l1},
|
|
/*h(14735)=1087 */ {14735, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1087_l1},
|
|
/*h(8580)=1088 */ {8580, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1088_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(30095)=1090 */ {30095, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1090_l1},
|
|
/*h(451)=1091 */ {451, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1091_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21966)=1093 */ {21966, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1093_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4488)=1095 */ {4488, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1095_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26003)=1097 */ {26003, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1097_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17874)=1100 */ {17874, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1100_l1},
|
|
/*h(11719)=1101 */ {11719, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1101_l1},
|
|
/*h(6551)=1102 */ {6551, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1102_l1},
|
|
/*h(396)=1103 */ {396, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21911)=1105 */ {21911, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1105_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9601)=1107 */ {9601, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1107_l1},
|
|
/*h(8614)=1108 */ {8614, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1108_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1472)=1110 */ {1472, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1110_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(22000)=1112 */ {22000, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1112_l1},
|
|
/*h(16832)=1113 */ {16832, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1113_l1},
|
|
/*h(5509)=1114 */ {5509, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1114_l1},
|
|
/*h(4522)=1115 */ {4522, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1115_l1},
|
|
/*h(3535)=1116 */ {3535, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1116_l1},
|
|
/*h(26037)=1117 */ {26037, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1117_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17908)=1119 */ {17908, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1119_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1417)=1122 */ {1417, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15790)=1125 */ {15790, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9635)=1127 */ {9635, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1127_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1506)=1129 */ {1506, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1129_l1},
|
|
/*h(24995)=1130 */ {24995, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1130_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12685)=1132 */ {12685, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1132_l1},
|
|
/*h(10711)=1133 */ {10711, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1133_l1},
|
|
/*h(5543)=1134 */ {5543, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1134_l1},
|
|
/*h(4556)=1135 */ {4556, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1135_l1},
|
|
/*h(21890)=1136 */ {21890, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1136_l1},
|
|
/*h(26071)=1137 */ {26071, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1137_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8593)=1139 */ {8593, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1139_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1451)=1141 */ {1451, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1141_l1},
|
|
/*h(464)=1142 */ {464, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1142_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17798)=1144 */ {17798, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1144_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9669)=1146 */ {9669, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1146_l1},
|
|
/*h(4501)=1147 */ {4501, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26016)=1149 */ {26016, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1149_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12719)=1152 */ {12719, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5577)=1154 */ {5577, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21924)=1156 */ {21924, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1156_l1},
|
|
/*h(20937)=1157 */ {20937, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1157_l1},
|
|
/*h(9614)=1158 */ {9614, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1158_l1},
|
|
/*h(8627)=1159 */ {8627, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1485)=1161 */ {1485, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1161_l1},
|
|
/*h(498)=1162 */ {498, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1162_l1},
|
|
/*h(17832)=1163 */ {17832, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1163_l1},
|
|
/*h(16845)=1164 */ {16845, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1164_l1},
|
|
/*h(10690)=1165 */ {10690, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1165_l1},
|
|
/*h(5522)=1166 */ {5522, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1166_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26050)=1168 */ {26050, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1168_l1},
|
|
/*h(20882)=1169 */ {20882, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1169_l1},
|
|
/*h(14727)=1170 */ {14727, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6598)=1172 */ {6598, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1172_l1},
|
|
/*h(30087)=1173 */ {30087, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21958)=1175 */ {21958, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1175_l1},
|
|
/*h(16790)=1176 */ {16790, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1176_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9648)=1178 */ {9648, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1178_l1},
|
|
/*h(8661)=1179 */ {8661, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1179_l1},
|
|
/*h(25995)=1180 */ {25995, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1180_l1},
|
|
/*h(25008)=1181 */ {25008, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1181_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17866)=1183 */ {17866, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1183_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5556)=1185 */ {5556, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1185_l1},
|
|
/*h(388)=1186 */ {388, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1186_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21903)=1188 */ {21903, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1188_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17811)=1195 */ {17811, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1195_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9682)=1197 */ {9682, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1197_l1},
|
|
/*h(4514)=1198 */ {4514, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1198_l1},
|
|
/*h(3527)=1199 */ {3527, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1199_l1},
|
|
/*h(26029)=1200 */ {26029, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1200_l1},
|
|
/*h(25042)=1201 */ {25042, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1201_l1},
|
|
/*h(13719)=1202 */ {13719, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1409)=1205 */ {1409, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1205_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21937)=1207 */ {21937, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1207_l1},
|
|
/*h(15782)=1208 */ {15782, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1208_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8640)=1210 */ {8640, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1210_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17845)=1214 */ {17845, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1214_l1},
|
|
/*h(12677)=1215 */ {12677, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1215_l1},
|
|
/*h(11690)=1216 */ {11690, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1216_l1},
|
|
/*h(9716)=1217 */ {9716, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1217_l1},
|
|
/*h(4548)=1218 */ {4548, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1218_l1},
|
|
/*h(26063)=1219 */ {26063, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1219_l1},
|
|
/*h(25076)=1220 */ {25076, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8585)=1222 */ {8585, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1222_l1},
|
|
/*h(7598)=1223 */ {7598, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1223_l1},
|
|
/*h(1443)=1224 */ {1443, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1224_l1},
|
|
/*h(456)=1225 */ {456, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21971)=1227 */ {21971, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1227_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4493)=1230 */ {4493, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1230_l1},
|
|
/*h(2519)=1231 */ {2519, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1231_l1},
|
|
/*h(30189)=1232 */ {30189, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1232_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17879)=1234 */ {17879, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1234_l1},
|
|
/*h(12711)=1235 */ {12711, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1235_l1},
|
|
/*h(5569)=1236 */ {5569, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1236_l1},
|
|
/*h(401)=1237 */ {401, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1237_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26097)=1239 */ {26097, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1239_l1},
|
|
/*h(20929)=1240 */ {20929, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1240_l1},
|
|
/*h(9606)=1241 */ {9606, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1241_l1},
|
|
/*h(8619)=1242 */ {8619, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1242_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1477)=1244 */ {1477, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1244_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17824)=1246 */ {17824, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1246_l1},
|
|
/*h(16837)=1247 */ {16837, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1247_l1},
|
|
/*h(15850)=1248 */ {15850, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1248_l1},
|
|
/*h(5514)=1249 */ {5514, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1249_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20874)=1252 */ {20874, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1252_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11758)=1255 */ {11758, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1255_l1},
|
|
/*h(1422)=1256 */ {1422, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1256_l1},
|
|
/*h(435)=1257 */ {435, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1257_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16782)=1259 */ {16782, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9640)=1261 */ {9640, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25987)=1263 */ {25987, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1263_l1},
|
|
/*h(25000)=1264 */ {25000, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1264_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17858)=1266 */ {17858, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1266_l1},
|
|
/*h(6535)=1267 */ {6535, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1267_l1},
|
|
/*h(5548)=1268 */ {5548, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1268_l1},
|
|
/*h(4561)=1269 */ {4561, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1269_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21895)=1271 */ {21895, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1271_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8598)=1274 */ {8598, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1274_l1},
|
|
/*h(1456)=1275 */ {1456, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1275_l1},
|
|
/*h(469)=1276 */ {469, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17803)=1278 */ {17803, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1278_l1},
|
|
/*h(16816)=1279 */ {16816, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1279_l1},
|
|
/*h(9674)=1280 */ {9674, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1280_l1},
|
|
/*h(8687)=1281 */ {8687, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1281_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26021)=1283 */ {26021, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1283_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13711)=1285 */ {13711, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1285_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5582)=1288 */ {5582, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1288_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21929)=1290 */ {21929, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1290_l1},
|
|
/*h(20942)=1291 */ {20942, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1291_l1},
|
|
/*h(9619)=1292 */ {9619, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1292_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1490)=1295 */ {1490, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1295_l1},
|
|
/*h(24979)=1296 */ {24979, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1296_l1},
|
|
/*h(17837)=1297 */ {17837, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1297_l1},
|
|
/*h(16850)=1298 */ {16850, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1298_l1},
|
|
/*h(11682)=1299 */ {11682, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1299_l1},
|
|
/*h(5527)=1300 */ {5527, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1300_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26055)=1302 */ {26055, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1302_l1},
|
|
/*h(20887)=1303 */ {20887, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1303_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8577)=1305 */ {8577, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1305_l1},
|
|
/*h(7590)=1306 */ {7590, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1306_l1},
|
|
/*h(5616)=1307 */ {5616, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1307_l1},
|
|
/*h(448)=1308 */ {448, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1308_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21963)=1310 */ {21963, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1310_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9653)=1312 */ {9653, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1312_l1},
|
|
/*h(3498)=1313 */ {3498, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1313_l1},
|
|
/*h(26000)=1314 */ {26000, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1314_l1},
|
|
/*h(30181)=1315 */ {30181, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17871)=1317 */ {17871, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1317_l1},
|
|
/*h(16884)=1318 */ {16884, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1318_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(393)=1320 */ {393, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21908)=1322 */ {21908, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1322_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(14766)=1324 */ {14766, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1324_l1},
|
|
/*h(8611)=1325 */ {8611, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1325_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(482)=1327 */ {482, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1327_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21997)=1329 */ {21997, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1329_l1},
|
|
/*h(15842)=1330 */ {15842, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1330_l1},
|
|
/*h(5506)=1331 */ {5506, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1331_l1},
|
|
/*h(9687)=1332 */ {9687, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26034)=1334 */ {26034, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1334_l1},
|
|
/*h(20866)=1335 */ {20866, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17905)=1337 */ {17905, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1337_l1},
|
|
/*h(11750)=1338 */ {11750, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1338_l1},
|
|
/*h(1414)=1339 */ {1414, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1339_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21942)=1341 */ {21942, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1341_l1},
|
|
/*h(16774)=1342 */ {16774, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1342_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9632)=1344 */ {9632, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1344_l1},
|
|
/*h(7658)=1345 */ {7658, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(24992)=1347 */ {24992, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1347_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(11695)=1350 */ {11695, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1350_l1},
|
|
/*h(5540)=1351 */ {5540, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1351_l1},
|
|
/*h(3566)=1352 */ {3566, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1352_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26068)=1354 */ {26068, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8590)=1357 */ {8590, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1357_l1},
|
|
/*h(1448)=1358 */ {1448, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1358_l1},
|
|
/*h(461)=1359 */ {461, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1359_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17795)=1361 */ {17795, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1361_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9666)=1363 */ {9666, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1363_l1},
|
|
/*h(4498)=1364 */ {4498, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1364_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(25026)=1366 */ {25026, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1366_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13703)=1368 */ {13703, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1368_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5574)=1371 */ {5574, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1371_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21921)=1373 */ {21921, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1373_l1},
|
|
/*h(15766)=1374 */ {15766, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1374_l1},
|
|
/*h(9611)=1375 */ {9611, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1375_l1},
|
|
/*h(8624)=1376 */ {8624, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1376_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1482)=1378 */ {1482, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1378_l1},
|
|
/*h(495)=1379 */ {495, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1379_l1},
|
|
/*h(17829)=1380 */ {17829, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1380_l1},
|
|
/*h(16842)=1381 */ {16842, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1381_l1},
|
|
/*h(15855)=1382 */ {15855, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1382_l1},
|
|
/*h(5519)=1383 */ {5519, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(20879)=1386 */ {20879, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1386_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1427)=1390 */ {1427, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1390_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21955)=1393 */ {21955, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1393_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9645)=1395 */ {9645, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1395_l1},
|
|
/*h(3490)=1396 */ {3490, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1396_l1},
|
|
/*h(25992)=1397 */ {25992, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1397_l1},
|
|
/*h(1516)=1398 */ {1516, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1398_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17863)=1400 */ {17863, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1400_l1},
|
|
/*h(16876)=1401 */ {16876, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1401_l1},
|
|
/*h(5553)=1402 */ {5553, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1402_l1},
|
|
/*h(385)=1403 */ {385, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21900)=1405 */ {21900, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1405_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(14758)=1407 */ {14758, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1407_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1461)=1410 */ {1461, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1410_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17808)=1412 */ {17808, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1412_l1},
|
|
/*h(16821)=1413 */ {16821, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1413_l1},
|
|
/*h(10666)=1414 */ {10666, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1414_l1},
|
|
/*h(9679)=1415 */ {9679, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1415_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26026)=1417 */ {26026, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1417_l1},
|
|
/*h(25039)=1418 */ {25039, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1418_l1},
|
|
/*h(17897)=1419 */ {17897, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1419_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6574)=1421 */ {6574, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1421_l1},
|
|
/*h(5587)=1422 */ {5587, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1422_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21934)=1424 */ {21934, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1424_l1},
|
|
/*h(20947)=1425 */ {20947, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1425_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13805)=1427 */ {13805, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1427_l1},
|
|
/*h(7650)=1428 */ {7650, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1428_l1},
|
|
/*h(1495)=1429 */ {1495, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1429_l1},
|
|
/*h(29165)=1430 */ {29165, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1430_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17842)=1432 */ {17842, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1432_l1},
|
|
/*h(11687)=1433 */ {11687, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1433_l1},
|
|
/*h(9713)=1434 */ {9713, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1434_l1},
|
|
/*h(3558)=1435 */ {3558, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26060)=1437 */ {26060, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1437_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8582)=1439 */ {8582, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1439_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1440)=1441 */ {1440, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1441_l1},
|
|
/*h(453)=1442 */ {453, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(21968)=1444 */ {21968, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1444_l1},
|
|
/*h(20981)=1445 */ {20981, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1445_l1},
|
|
/*h(14826)=1446 */ {14826, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1446_l1},
|
|
/*h(3503)=1447 */ {3503, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26005)=1449 */ {26005, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1449_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17876)=1451 */ {17876, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1451_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10734)=1453 */ {10734, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1453_l1},
|
|
/*h(398)=1454 */ {398, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1454_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26094)=1456 */ {26094, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1456_l1},
|
|
/*h(15758)=1457 */ {15758, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1457_l1},
|
|
/*h(9603)=1458 */ {9603, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1458_l1},
|
|
/*h(8616)=1459 */ {8616, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1459_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1474)=1461 */ {1474, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1461_l1},
|
|
/*h(487)=1462 */ {487, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1462_l1},
|
|
/*h(22002)=1463 */ {22002, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1463_l1},
|
|
/*h(11666)=1464 */ {11666, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1464_l1},
|
|
/*h(15847)=1465 */ {15847, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1465_l1},
|
|
/*h(5511)=1466 */ {5511, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1466_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(26039)=1468 */ {26039, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1468_l1},
|
|
/*h(20871)=1469 */ {20871, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1469_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(17910)=1471 */ {17910, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1471_l1},
|
|
/*h(7574)=1472 */ {7574, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1472_l1},
|
|
/*h(1419)=1473 */ {1419, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1473_l1},
|
|
/*h(432)=1474 */ {432, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1474_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(16779)=1476 */ {16779, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1476_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(9637)=1478 */ {9637, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1478_l1},
|
|
/*h(7663)=1479 */ {7663, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1479_l1},
|
|
/*h(25984)=1480 */ {25984, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1480_l1},
|
|
/*h(24997)=1481 */ {24997, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1481_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12687)=1483 */ {12687, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1483_l1},
|
|
/*h(16868)=1484 */ {16868, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1484_l1},
|
|
/*h(5545)=1485 */ {5545, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1485_l1},
|
|
/*h(4558)=1486 */ {4558, xed3_phash_find_mapevex_map1_opcode0x79_vv2_1486_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 1488ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7a_vv2(const xed_decoded_inst_t* d)
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|
{
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typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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static const lu_entry_t lu_table[137] = {
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/*h(411)=0 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {411, 4373},
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/*h(731)=1 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {731, 4366},
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/*h(92)=2 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 6113},
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/*h(412)=3 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {412, 6150},
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/*h(732)=4 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {732, 6146},
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/*h(93)=5 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 6113},
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/*h(413)=6 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {413, 6150},
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/*h(733)=7 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {733, 6146},
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/*h(94)=8 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 6112},
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/*h(414)=9 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {414, 6149},
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/*h(734)=10 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {734, 6144},
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/*h(95)=11 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 6117},
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/*h(415)=12 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {415, 6152},
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/*h(735)=13 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {735, 6145},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(600)=19 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {600, 6132},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(601)=22 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {601, 6132},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(602)=25 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 6130},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(603)=28 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {603, 6131},
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/*h(923)=29 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {923, 4373},
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/*empty slot1 */ {0,0},
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/*h(604)=31 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 6118},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(605)=34 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 6118},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(606)=37 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 6116},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(607)=40 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 6117},
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/*h(927)=41 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {927, 6152},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(152)=45 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {152, 4376},
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/*h(472)=46 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {472, 4371},
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/*empty slot1 */ {0,0},
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/*h(153)=48 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {153, 4376},
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/*h(473)=49 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {473, 4371},
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/*empty slot1 */ {0,0},
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/*h(154)=51 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {154, 4375},
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/*h(474)=52 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4370},
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/*empty slot1 */ {0,0},
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/*h(155)=54 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {155, 4373},
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/*h(475)=55 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {475, 4366},
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/*empty slot1 */ {0,0},
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/*h(156)=57 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {156, 6148},
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/*h(476)=58 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {476, 6143},
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/*empty slot1 */ {0,0},
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/*h(157)=60 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {157, 6148},
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/*h(477)=61 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {477, 6143},
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/*empty slot1 */ {0,0},
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/*h(158)=63 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {158, 6147},
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/*h(478)=64 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {478, 6142},
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/*empty slot1 */ {0,0},
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/*h(159)=66 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {159, 6152},
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/*h(479)=67 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {479, 6145},
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/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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|
/*h(344)=73 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {344, 6129},
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/*h(664)=74 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {664, 4374},
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/*empty slot1 */ {0,0},
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/*h(345)=76 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {345, 6129},
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/*h(665)=77 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {665, 4374},
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/*empty slot1 */ {0,0},
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/*h(346)=79 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 6128},
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/*h(666)=80 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {666, 4372},
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/*empty slot1 */ {0,0},
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/*h(347)=82 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {347, 6131},
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/*h(667)=83 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {667, 4373},
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/*h(987)=84 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {987, 4366},
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/*h(348)=85 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 6115},
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/*h(668)=86 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {668, 6153},
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/*empty slot1 */ {0,0},
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/*h(349)=88 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 6115},
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/*h(669)=89 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {669, 6153},
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/*empty slot1 */ {0,0},
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/*h(350)=91 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 6114},
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/*h(670)=92 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {670, 6151},
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/*empty slot1 */ {0,0},
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/*h(351)=94 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 6117},
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/*h(671)=95 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {671, 6152},
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/*h(991)=96 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {991, 6145},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
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|
/*h(216)=100 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {216, 4369},
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/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
|
|
/*h(217)=103 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {217, 4369},
|
|
/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
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|
/*h(218)=106 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 4368},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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|
/*h(219)=109 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {219, 4366},
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|
/*empty slot1 */ {0,0},
|
|
/*h(859)=111 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {859, 6131},
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|
/*h(220)=112 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {220, 6141},
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/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(221)=115 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {221, 6141},
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/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
|
|
/*h(222)=118 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {222, 6140},
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/*empty slot1 */ {0,0},
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|
/*empty slot1 */ {0,0},
|
|
/*h(223)=121 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {223, 6145},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(863)=123 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 6117},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(88)=127 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {88, 6127},
|
|
/*h(408)=128 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {408, 4378},
|
|
/*h(728)=129 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {728, 4367},
|
|
/*h(89)=130 EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {89, 6127},
|
|
/*h(409)=131 EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL()*/ {409, 4378},
|
|
/*h(729)=132 EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {729, 4367},
|
|
/*h(90)=133 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 6126},
|
|
/*h(410)=134 EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {410, 4377},
|
|
/*h(730)=135 EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4365},
|
|
/*h(91)=136 EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR*/ {91, 6131}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = (3*key % 137);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_841_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1030)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3078)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3078;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_61_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5126)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5126;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1135_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7174)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1286;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_769_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(750)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {750, 6070},
|
|
/*h(3334)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3334, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_379_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5382, 4379},
|
|
/*h(2798)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2798, 6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1453_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7430, 4379},
|
|
/*h(4846)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4846, 6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1000_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1158)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1158, 4379},
|
|
/*h(2755)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2755, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_610_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3206)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3206, 4379},
|
|
/*h(4803)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4803, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5254;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1294_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7302, 4379},
|
|
/*h(8899)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8899, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_927_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_537_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7558)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1094)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1094;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3142)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_873_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_483_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7238;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_506_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1350)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3398;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5446;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_800_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1222)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1222;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3270;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1031_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5318;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_641_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7366;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_665_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1349_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_959_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7622)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_515_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1062)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1062;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3110)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3110;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1199_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5158)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5158;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_809_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7206)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7206, 4379},
|
|
/*h(2038)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {2038, 4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_832_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1318;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3366;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_52_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1126_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_674_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1190, 4379},
|
|
/*h(2787)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2787, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_284_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3238, 4379},
|
|
/*h(4835)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4835, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5286;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_968_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7334)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7334, 4379},
|
|
/*h(8931)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8931, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_991_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1446;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_601_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3494;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5542)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1285_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7590)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1326_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1126)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1126;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_936_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3174)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3174;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_546_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5222)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5222;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7270;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_180_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1382;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1254_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3430;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_864_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5478;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_474_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_21_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1254;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1095_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3302, 4379},
|
|
/*h(718)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {718, 6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_705_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2766)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2766, 6086},
|
|
/*h(5350)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5350, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7398, 4379},
|
|
/*h(4814)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4814, 6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3558)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1022_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5606)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_632_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7654)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_760_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1038)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1038, 4379},
|
|
/*h(10997)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {10997, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3086)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3086, 4379},
|
|
/*h(13045)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13045, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5134)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5134, 4379},
|
|
/*h(15093)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {15093, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1054_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7182)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7182;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1077_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3878, 4386},
|
|
/*h(1294)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1294, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_687_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3342)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3342, 4379},
|
|
/*h(5926)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5926, 4386},
|
|
/*h(758)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {758, 6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7974, 4386},
|
|
/*h(2806)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2806, 6072},
|
|
/*h(5390)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5390, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1371_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4854)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4854, 6074},
|
|
/*h(7438)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7438, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_918_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3750, 4386},
|
|
/*h(1166)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1166, 4379},
|
|
/*h(8918)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8918, 6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_528_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10966)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10966, 6086},
|
|
/*h(5798)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5798, 4386},
|
|
/*h(3214)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3214, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7846, 4386},
|
|
/*h(5262)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5262, 4379},
|
|
/*h(13014)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13014, 6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1212_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7310)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7310;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1422)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1422;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_846_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3470)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3470;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_456_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5518)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_66_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7566)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7566;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3686, 4386},
|
|
/*h(1102)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1102, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3150)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3150, 4379},
|
|
/*h(5734)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5734, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_791_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7782)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7782, 4386},
|
|
/*h(5198)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5198, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_401_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7246)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7246;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3942, 4386},
|
|
/*h(1358)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1358, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_34_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5990, 4386},
|
|
/*h(3406)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3406, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1108_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5454)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5454, 4379},
|
|
/*h(8038)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8038, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_718_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7502)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7502, 4379},
|
|
/*h(737)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {737, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_266_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1230)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1230;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3278)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3278;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_950_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5326)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5326;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_560_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7374)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7374;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_583_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4070, 4386},
|
|
/*h(1486)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1486, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3534)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3534, 4379},
|
|
/*h(6118)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6118, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8166)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8166, 4386},
|
|
/*h(5582)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5582, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_877_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7630)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7630;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3654)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3654, 4386},
|
|
/*h(13003)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {13003, 6090},
|
|
/*h(1070)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1070, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_43_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5702, 4386},
|
|
/*h(3118)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3118, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1117_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5166)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5166, 4379},
|
|
/*h(7750)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7750, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_727_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7214)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7214;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_751_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1326)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1326;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_361_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3374)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3374;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5422)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5422;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1045_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7470)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7470, 4379},
|
|
/*h(705)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {705, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_592_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1198)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1198, 4379},
|
|
/*h(3782)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3782, 4386},
|
|
/*h(2795)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2795, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5830, 4386},
|
|
/*h(3246)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3246, 4379},
|
|
/*h(4843)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4843, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7878, 4386},
|
|
/*h(5294)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5294, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_886_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7342)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7342, 4379},
|
|
/*h(8939)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8939, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_909_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4038)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4038, 4386},
|
|
/*h(1454)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1454, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_519_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6086, 4386},
|
|
/*h(3502)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3502, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5550)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5550, 4379},
|
|
/*h(8134)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8134, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1203_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7598)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1245_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1134)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1134;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_855_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3182)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3182;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_465_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5230)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5230;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_75_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7278)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7278;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_98_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3974, 4386},
|
|
/*h(1390)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1390, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3438)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3438, 4379},
|
|
/*h(6022)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6022, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_782_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8070, 4386},
|
|
/*h(5486)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5486, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7534)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7534;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3846, 4386},
|
|
/*h(1262)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1262, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1013_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5894, 4386},
|
|
/*h(3310)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3310, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_623_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5358)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5358, 4379},
|
|
/*h(7942)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7942, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_233_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7406)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7406;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1518)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1518;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1331_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3566)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3566;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_941_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5614)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5614;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_551_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7662)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7662;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_282_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1031)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1482)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1482, 4381},
|
|
/*h(3079)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3079, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_966_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3530)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3530, 4381},
|
|
/*h(5127)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5127, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_576_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5578)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5578, 4381},
|
|
/*h(7175)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7175, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_599_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1287)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1287;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_209_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1738)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1738, 4390},
|
|
/*h(3335)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3335, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3786)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3786, 4390},
|
|
/*h(5383)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5383, 4379},
|
|
/*h(1202)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1202, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_893_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7431)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7431, 4379},
|
|
/*h(3250)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3250, 4385},
|
|
/*h(5834)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5834, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2756)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2756, 6086},
|
|
/*h(1159)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1159, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_51_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4804)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4804, 6088},
|
|
/*h(3207)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3207, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1125_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1074)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1074, 4385},
|
|
/*h(5255)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5255, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_735_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3122)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3122, 4385},
|
|
/*h(7303)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7303, 4379},
|
|
/*h(8900)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8900, 6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_758_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1415)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1415;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_368_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1866)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1866, 4390},
|
|
/*h(3463)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3463, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1442_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5511)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5511, 4379},
|
|
/*h(1330)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1330, 4385},
|
|
/*h(3914)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3914, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1052_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3378, 4385},
|
|
/*h(5962)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5962, 4390},
|
|
/*h(7559)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7559, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1093_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13028)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {13028, 6074},
|
|
/*h(1095)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1095, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_703_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1546)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1546, 4390},
|
|
/*h(3143)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3143, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3594)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3594, 4390},
|
|
/*h(5191)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5191, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1387_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5642)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5642, 4390},
|
|
/*h(7239)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7239, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1411_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1351)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1351;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1021_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3399)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3399;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_631_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1266, 4385},
|
|
/*h(5447)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5447, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_241_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3314, 4385},
|
|
/*h(7495)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7495, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1252_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1223)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1223;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_862_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1674)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1674, 4390},
|
|
/*h(3271)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3271, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_472_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5319)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5319, 4379},
|
|
/*h(1138)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1138, 4385},
|
|
/*h(3722)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3722, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_82_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3186)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3186, 4385},
|
|
/*h(5770)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5770, 4390},
|
|
/*h(7367)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7367, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_105_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1479)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1479;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1179_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1930)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1930, 4390},
|
|
/*h(3527)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3527, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_789_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3978)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3978, 4390},
|
|
/*h(5575)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5575, 4379},
|
|
/*h(1394)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1394, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_399_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7623)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7623, 4379},
|
|
/*h(3442)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3442, 4385},
|
|
/*h(6026)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6026, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1420_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1063)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1063;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1030_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3111)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3111;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_640_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5159)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5159;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2039)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {2039, 4393},
|
|
/*h(7207)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7207, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_273_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1319)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1319;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1347_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1770)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1770, 4390},
|
|
/*h(3367)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3367, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_957_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5415)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5415, 4379},
|
|
/*h(1234)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1234, 4382},
|
|
/*h(3818)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3818, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_567_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3282, 4382},
|
|
/*h(5866)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5866, 4390},
|
|
/*h(7463)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7463, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8943)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8943, 6075},
|
|
/*h(1191)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1191, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10991)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {10991, 6075},
|
|
/*h(1642)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1642, 4390},
|
|
/*h(3239)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3239, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_798_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(3690)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3690, 4390},
|
|
/*h(5287)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5287, 4379},
|
|
/*h(13039)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13039, 6075},
|
|
/*h(1106)=3 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1106, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(7335)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7335, 4379},
|
|
/*h(3154)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3154, 4382},
|
|
/*h(5738)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5738, 4390},
|
|
/*h(15087)=3 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {15087, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1447)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1447;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_42_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3495)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3495;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1116_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5543)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_726_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7591)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_767_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1127)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1127;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_377_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1578)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1578, 4390},
|
|
/*h(3175)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3175, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1451_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5223)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5223, 4379},
|
|
/*h(1042)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1042, 4382},
|
|
/*h(3626)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3626, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1061_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3090)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3090, 4382},
|
|
/*h(5674)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5674, 4390},
|
|
/*h(7271)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7271, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1084_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1383)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1383;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_694_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1834)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1834, 4390},
|
|
/*h(3431)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3431, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_304_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3882)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3882, 4390},
|
|
/*h(5479)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5479, 4379},
|
|
/*h(1298)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1298, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1378_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7527)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7527, 4379},
|
|
/*h(3346)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3346, 4382},
|
|
/*h(5930)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5930, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_926_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1255)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1255;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_536_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3303)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3303, 4379},
|
|
/*h(719)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {719, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_146_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1170, 4382},
|
|
/*h(2767)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {2767, 6089},
|
|
/*h(5351)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5351, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1220_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4815)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4815, 6089},
|
|
/*h(7399)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7399, 4379},
|
|
/*h(3218)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3218, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1243_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1511)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1511;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_853_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1962)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1962, 4390},
|
|
/*h(3559)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3559, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_463_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5607)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5607, 4379},
|
|
/*h(1426)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1426, 4382},
|
|
/*h(4010)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4010, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_73_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3474, 4382},
|
|
/*h(6058)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6058, 4390},
|
|
/*h(7655)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7655, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10998)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {10998, 6072},
|
|
/*h(1039)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1039, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1275_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13046)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {13046, 6074},
|
|
/*h(3087)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3087, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_885_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5135)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5135;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_495_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7183)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7183;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_518_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3879)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3879, 4388},
|
|
/*h(1295)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1295, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_128_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(759)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {759, 6075},
|
|
/*h(3343)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3343, 4379},
|
|
/*h(5927)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5927, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1202_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5391)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5391, 4379},
|
|
/*h(7975)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7975, 4388},
|
|
/*h(2807)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {2807, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_812_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7439)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7439, 4379},
|
|
/*h(4855)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4855, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_359_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1167)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1167, 4379},
|
|
/*h(3751)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3751, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1433_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5799, 4388},
|
|
/*h(1618)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1618, 4391},
|
|
/*h(3215)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3215, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1043_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3666, 4391},
|
|
/*h(5263)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5263, 4379},
|
|
/*h(7847)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7847, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_653_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5714, 4391},
|
|
/*h(7311)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7311, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_676_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4007, 4388},
|
|
/*h(1423)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1423, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_286_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3471)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3471, 4379},
|
|
/*h(6055)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6055, 4388},
|
|
/*h(1874)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1874, 4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8103)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8103, 4388},
|
|
/*h(3922)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3922, 4391},
|
|
/*h(5519)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5519, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_970_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5970, 4391},
|
|
/*h(7567)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7567, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1012_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3687)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3687, 4388},
|
|
/*h(1103)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1103, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_622_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3151)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3151, 4379},
|
|
/*h(8929)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8929, 6071},
|
|
/*h(5735)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5735, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 11) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10977)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {10977, 6073},
|
|
/*h(5199)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5199, 4379},
|
|
/*h(7783)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7783, 4388}
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|
};
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|
xed_uint64_t key = 0;
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|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
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hidx = ((4*key % 5) % 3);
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if(lu_table[hidx].key == key) {
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|
return lu_table[hidx].value;
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|
}
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|
else{
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|
return 0;
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|
}
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|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1306_l1(const xed_decoded_inst_t* d)
|
|
{
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|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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|
static const lu_entry_t lu_table[2] = {
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|
/*h(13025)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {13025, 6076},
|
|
/*h(7247)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7247, 4379}
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|
};
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|
xed_uint64_t key = 0;
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|
xed_uint64_t hidx = 0;
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key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
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hidx = ((3*key % 5) % 2);
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if(lu_table[hidx].key == key) {
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|
return lu_table[hidx].value;
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|
}
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else{
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|
return 0;
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|
}
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|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1329_l1(const xed_decoded_inst_t* d)
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|
{
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|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
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|
/*h(1359)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1359, 4379},
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|
/*h(3943)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3943, 4388}
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|
};
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|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
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|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
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hidx = ((4*key % 3) % 2);
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if(lu_table[hidx].key == key) {
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|
return lu_table[hidx].value;
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|
}
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|
else{
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|
return 0;
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|
}
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|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_939_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5991, 4388},
|
|
/*h(1810)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1810, 4391},
|
|
/*h(3407)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3407, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_549_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3858, 4391},
|
|
/*h(5455)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5455, 4379},
|
|
/*h(8039)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8039, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_159_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5906)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5906, 4391},
|
|
/*h(738)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {738, 6071},
|
|
/*h(7503)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7503, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3815)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3815, 4388},
|
|
/*h(1231)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1231, 4379},
|
|
/*h(4802)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4802, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_780_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3279)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3279, 4379},
|
|
/*h(5863)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5863, 4388},
|
|
/*h(1682)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1682, 4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(3730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3730, 4391},
|
|
/*h(7911)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7911, 4388},
|
|
/*h(5327)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5327, 4379},
|
|
/*h(8898)=3 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8898, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_0_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5778, 4391},
|
|
/*h(7375)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7375, 4379},
|
|
/*h(10946)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {10946, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_24_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1487)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1098_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3535)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_708_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5583)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5583;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_318_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7631)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7631;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1338_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1071)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1071, 4379},
|
|
/*h(3655)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3655, 4388},
|
|
/*h(13004)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13004, 6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_948_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5703)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5703, 4388},
|
|
/*h(1522)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1522, 4385},
|
|
/*h(3119)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3119, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_558_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3570, 4385},
|
|
/*h(5167)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5167, 4379},
|
|
/*h(7751)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7751, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5618)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5618, 4385},
|
|
/*h(7215)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7215, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_191_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3911)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3911, 4388},
|
|
/*h(1327)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1327, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3375)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3375, 4379},
|
|
/*h(5959)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5959, 4388},
|
|
/*h(1778)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1778, 4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_875_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8007, 4388},
|
|
/*h(3826)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3826, 4394},
|
|
/*h(5423)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5423, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_485_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5874)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5874, 4394},
|
|
/*h(7471)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7471, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_33_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2796)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2796, 6072},
|
|
/*h(3783)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3783, 4388},
|
|
/*h(1199)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1199, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1107_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5831)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5831, 4388},
|
|
/*h(3247)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3247, 4379},
|
|
/*h(4844)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4844, 6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_717_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5295)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5295, 4379},
|
|
/*h(7879)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7879, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_327_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8940)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {8940, 6070},
|
|
/*h(7343)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7343, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_350_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1455)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1455, 4379},
|
|
/*h(4039)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4039, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1424_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(6087)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6087, 4388},
|
|
/*h(1906)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1906, 4394},
|
|
/*h(3503)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3503, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1034_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3954)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3954, 4394},
|
|
/*h(5551)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5551, 4379},
|
|
/*h(8135)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8135, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_644_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6002)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6002, 4394},
|
|
/*h(7599)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7599, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_685_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3719, 4388},
|
|
/*h(1135)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1135, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3183)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3183;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1370_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5231)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5231;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_980_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7279)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7279;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1003_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1391)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1391;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_613_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3439)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3439;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_223_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5487)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5487;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1297_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7535)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7535;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_844_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1263)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1263, 4379},
|
|
/*h(3847)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3847, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_454_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(5895)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5895, 4388},
|
|
/*h(727)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {727, 6089},
|
|
/*h(1714)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1714, 4394},
|
|
/*h(3311)=3 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3311, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_64_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(2775)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {2775, 6089},
|
|
/*h(5359)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5359, 4379},
|
|
/*h(7943)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7943, 4388},
|
|
/*h(3762)=3 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3762, 4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1138_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4823)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {4823, 6089},
|
|
/*h(5810)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5810, 4394},
|
|
/*h(7407)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7407, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1519)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1519;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_771_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1970, 4394},
|
|
/*h(3567)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3567, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_381_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4018, 4394},
|
|
/*h(5615)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5615, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6066)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6066, 4394},
|
|
/*h(7663)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7663, 4379}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_678_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3630)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3630, 4386},
|
|
/*h(1046)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1046, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5678)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5678, 4386},
|
|
/*h(3094)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3094, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1362_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5142)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5142, 4380},
|
|
/*h(7726)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7726, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_972_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7190)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7190;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_995_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1302)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1302, 4380},
|
|
/*h(3886)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3886, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_605_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5934)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5934, 4386},
|
|
/*h(3350)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3350, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7982)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7982, 4386},
|
|
/*h(5398)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5398, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1289_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7446)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7446;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_837_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2771)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2771, 6087},
|
|
/*h(3758)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3758, 4386},
|
|
/*h(1174)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1174, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5806)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5806, 4386},
|
|
/*h(3222)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3222, 4380},
|
|
/*h(4819)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4819, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_57_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7854)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7854, 4386},
|
|
/*h(5270)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5270, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1131_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7318, 4380},
|
|
/*h(8915)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8915, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4014)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4014, 4386},
|
|
/*h(1430)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1430, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_764_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6062)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6062, 4386},
|
|
/*h(3478)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3478, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5526, 4380},
|
|
/*h(8110)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8110, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1448_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_25_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1110)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1110, 4380},
|
|
/*h(3694)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3694, 4386},
|
|
/*h(13043)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {13043, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1099_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5742)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5742, 4386},
|
|
/*h(3158)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3158, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_709_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7790)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7790, 4386},
|
|
/*h(5206)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5206, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7254)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7254;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_343_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1366;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1027_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_637_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7510, 4380},
|
|
/*h(745)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {745, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3822)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3822, 4386},
|
|
/*h(1238)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1238, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1258_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5870)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5870, 4386},
|
|
/*h(3286)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3286, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_868_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5334)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5334, 4380},
|
|
/*h(7918)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7918, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_478_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7382)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7382;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_501_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1494)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1494, 4380},
|
|
/*h(4078)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4078, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6126)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6126, 4386},
|
|
/*h(3542)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3542, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1185_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8174)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8174, 4386},
|
|
/*h(5590)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5590, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_795_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7638)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_119_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1047)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1047, 4380},
|
|
/*h(3631)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3631, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1193_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5679)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5679, 4388},
|
|
/*h(3095)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3095, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_803_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7727)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7727, 4388},
|
|
/*h(5143)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5143, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_413_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7191)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7191, 4380},
|
|
/*h(2023)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {2023, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_436_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3887)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3887, 4388},
|
|
/*h(1303)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1303, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_46_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3351)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3351, 4380},
|
|
/*h(5935)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5935, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1218, 4381},
|
|
/*h(5399)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5399, 4380},
|
|
/*h(7983)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7983, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_730_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3266, 4381},
|
|
/*h(7447)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7447, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2772)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2772, 6086},
|
|
/*h(1175)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1175, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4820)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4820, 6088},
|
|
/*h(3223)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3223, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_962_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5271)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5271;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_572_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8916)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8916, 6084},
|
|
/*h(7319)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7319, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_595_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1431)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1431, 4380},
|
|
/*h(4015)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4015, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_205_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6063)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6063, 4388},
|
|
/*h(3479)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3479, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1346, 4381},
|
|
/*h(8111)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8111, 4388},
|
|
/*h(5527)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5527, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_889_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3394)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3394, 4381},
|
|
/*h(7575)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7575, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_930_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(13044)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {13044, 6074},
|
|
/*h(1111)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1111, 4380},
|
|
/*h(3695)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3695, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_540_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3159)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3159, 4380},
|
|
/*h(5743)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5743, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7791)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7791, 4388},
|
|
/*h(5207)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5207, 4380},
|
|
/*h(1026)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1026, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3074)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3074, 4381},
|
|
/*h(7255)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7255, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1248_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1367)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1367;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_858_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3415)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3415;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_468_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5463)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5463;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_78_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(746)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {746, 6071},
|
|
/*h(7511)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7511, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1089_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1239)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1239, 4380},
|
|
/*h(3823)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3823, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_699_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5871)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5871, 4388},
|
|
/*h(3287)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3287, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5335)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5335, 4380},
|
|
/*h(1154)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1154, 4381},
|
|
/*h(7919)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7919, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3202)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3202, 4381},
|
|
/*h(7383)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7383, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1406_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4079)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4079, 4388},
|
|
/*h(1495)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1495, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1016_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3543)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3543, 4380},
|
|
/*h(6127)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6127, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_626_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5591)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5591, 4380},
|
|
/*h(8175)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8175, 4388},
|
|
/*h(1410)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1410, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_236_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3458, 4381},
|
|
/*h(7639)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7639, 4380}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_834_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5122)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5122;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_444_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7170;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_467_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1282, 4381},
|
|
/*h(8047)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8047, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_77_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3330)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3330;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5378;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_761_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7426)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7426;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_993_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5250)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_603_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7298)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7298;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5506;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_920_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7554)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7554;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_961_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1090)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1090, 4381},
|
|
/*h(7855)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7855, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_571_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3138)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3138;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_181_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5186)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5186;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7234)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7234;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_499_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_109_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7490, 4381},
|
|
/*h(725)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {725, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_340_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5314;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1414_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7362;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1474, 4381},
|
|
/*h(5655)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5655, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1047_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3522)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3522, 4381},
|
|
/*h(7703)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {7703, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_657_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5570;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_267_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7618)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7618;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1288_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7823)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7823, 4388},
|
|
/*h(5239)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5239, 4384},
|
|
/*h(1058)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1058, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_898_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3106)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3106, 4381},
|
|
/*h(7287)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7287, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_508_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5154)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5154;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {2034, 4394},
|
|
/*h(7202)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7202, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_141_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5495)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5495, 4384},
|
|
/*h(1314)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1314, 4381},
|
|
/*h(8079)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8079, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1215_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3362, 4381},
|
|
/*h(7543)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7543, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_825_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5410)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5410;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_435_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1446_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8938)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8938, 6071},
|
|
/*h(7951)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7951, 4388},
|
|
/*h(1186)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1186, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1056_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3234)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3234, 4381},
|
|
/*h(10986)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {10986, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_666_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13034)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {13034, 6076},
|
|
/*h(5282)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5282, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_276_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7330)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7330;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1442, 4381},
|
|
/*h(5623)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5623, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1374_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3490, 4381},
|
|
/*h(7671)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7671, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_984_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5538)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_594_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7586)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7586;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_635_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1122)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1122, 4381},
|
|
/*h(7887)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7887, 4388},
|
|
/*h(5303)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5303, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_245_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3170, 4381},
|
|
/*h(7351)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7351, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1319_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5218;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_929_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7266;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_952_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5559)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5559, 4384},
|
|
/*h(1378)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1378, 4381},
|
|
/*h(8143)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8143, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_562_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3426)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3426, 4381},
|
|
/*h(7607)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7607, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_172_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5474;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7522)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7522, 4381},
|
|
/*h(757)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {757, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_794_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8015)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8015, 4388},
|
|
/*h(5431)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5431, 4384},
|
|
/*h(1250)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1250, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_404_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(714)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {714, 6085},
|
|
/*h(3298)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3298, 4381},
|
|
/*h(7479)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7479, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_14_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5346, 4381},
|
|
/*h(2762)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2762, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1088_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7394)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7394, 4381},
|
|
/*h(4810)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4810, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1111_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1506, 4381},
|
|
/*h(5687)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {5687, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_721_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3554)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3554, 4381},
|
|
/*h(7735)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {7735, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_331_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5602)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1405_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7650)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7650;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_69_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1034)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1034, 4381},
|
|
/*h(10993)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {10993, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3082)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3082, 4381},
|
|
/*h(13041)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {13041, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_753_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5130)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5130, 4381},
|
|
/*h(1559)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {1559, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_363_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7178)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7178, 4381},
|
|
/*h(3607)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {3607, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_386_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1290)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1290, 4381},
|
|
/*h(8055)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {8055, 4393},
|
|
/*h(3874)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3874, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5922, 4390},
|
|
/*h(754)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {754, 6071},
|
|
/*h(3338)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3338, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1070_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(2802)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2802, 6073},
|
|
/*h(5386)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5386, 4381},
|
|
/*h(7970)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7970, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_680_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7434)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7434, 4381},
|
|
/*h(4850)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4850, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1162)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1162, 4381},
|
|
/*h(3746)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3746, 4390},
|
|
/*h(7927)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {7927, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1301_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3210)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3210, 4381},
|
|
/*h(5794)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5794, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_911_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7842, 4390},
|
|
/*h(5258)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5258, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_521_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7306)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7306;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_544_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8183)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {8183, 4393},
|
|
/*h(4002)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4002, 4390},
|
|
/*h(1418)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1418, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_154_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6050, 4390},
|
|
/*h(3466)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3466, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1228_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5514)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5514, 4381},
|
|
/*h(8098)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8098, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_838_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7562)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_880_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3682, 4390},
|
|
/*h(1098)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1098, 4381},
|
|
/*h(7863)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {7863, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_490_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5730, 4390},
|
|
/*h(3146)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3146, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7778, 4390},
|
|
/*h(5194)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5194, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1174_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7242)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7242;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3938, 4390},
|
|
/*h(1354)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1354, 4381},
|
|
/*h(8119)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {8119, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_807_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3402)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3402, 4381},
|
|
/*h(5986)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5986, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_417_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8034, 4390},
|
|
/*h(5450)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5450, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_27_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7498)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7498;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1038_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {7991, 4393},
|
|
/*h(1226)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1226, 4381},
|
|
/*h(3810)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3810, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 13) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_648_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5858, 4390},
|
|
/*h(3274)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3274, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_258_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5322)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5322, 4381},
|
|
/*h(7906)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7906, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7370)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7370;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_186_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7626)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7626;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(12999)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {12999, 6089},
|
|
/*h(7831)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {7831, 4389},
|
|
/*h(1066)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1066, 4381},
|
|
/*h(3650)=3 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3650, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((8*key % 7) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_816_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3114)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3114, 4381},
|
|
/*h(5698)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5698, 4390},
|
|
/*h(15047)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15047, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_426_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7746, 4390},
|
|
/*h(5162)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5162, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_36_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7210)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7210;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_59_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3906)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3906, 4390},
|
|
/*h(1322)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1322, 4381},
|
|
/*h(8087)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {8087, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1133_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5954)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5954, 4390},
|
|
/*h(3370)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3370, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_743_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5418)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5418, 4381},
|
|
/*h(8002)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8002, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7466)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7466;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1365_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[4] = {
|
|
/*h(3778)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3778, 4390},
|
|
/*h(2791)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {2791, 6075},
|
|
/*h(7959)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {7959, 4389},
|
|
/*h(1194)=3 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1194, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 29) % 4);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_975_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5826, 4390},
|
|
/*h(3242)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3242, 4381},
|
|
/*h(4839)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4839, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_585_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(5290)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5290, 4381},
|
|
/*h(6887)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6887, 6075},
|
|
/*h(7874)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7874, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_195_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7338)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7338, 4381},
|
|
/*h(8935)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8935, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_218_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4034, 4390},
|
|
/*h(1450)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1450, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3498)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3498, 4381},
|
|
/*h(6082)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6082, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_902_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8130)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8130, 4390},
|
|
/*h(5546)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5546, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_512_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7594)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7594;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_553_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3714, 4390},
|
|
/*h(1130)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1130, 4381},
|
|
/*h(7895)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {7895, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5762, 4390},
|
|
/*h(3178)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3178, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1237_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5226)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5226, 4381},
|
|
/*h(7810)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7810, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_847_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7274)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7274;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_871_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1386)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1386, 4381},
|
|
/*h(8151)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {8151, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_481_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3434)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3434;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_91_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5482)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5482;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7530)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7530;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_712_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {8023, 4389},
|
|
/*h(3842)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3842, 4390},
|
|
/*h(1258)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1258, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(3306)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3306, 4381},
|
|
/*h(5890)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5890, 4390},
|
|
/*h(722)=2 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {722, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7938, 4390},
|
|
/*h(2770)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2770, 6087},
|
|
/*h(5354)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5354, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1006_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4818)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4818, 6090},
|
|
/*h(7402)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7402, 4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1029_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1514)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1514;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_639_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3562)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3562;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5610)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5610;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1323_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7658)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() not64 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4381}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7658;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_671_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7722)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7722, 4390},
|
|
/*h(5138)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5138, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_281_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {2018, 4390},
|
|
/*h(7186)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7186, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_988_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5394)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5394, 4382},
|
|
/*h(7978)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7978, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_598_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7442)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7442;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_830_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5266)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5266, 4382},
|
|
/*h(6863)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6863, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_440_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7314)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7314, 4382},
|
|
/*h(8911)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8911, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1147_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8106)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8106, 4390},
|
|
/*h(5522)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5522, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_757_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7570)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7570;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_18_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5202)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5202, 4382},
|
|
/*h(7786)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7786, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1092_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7250)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7250;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1362, 4382},
|
|
/*h(3946)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3946, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_725_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5994)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5994, 4390},
|
|
/*h(3410)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3410, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_336_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5458;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1410_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7506)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7506, 4382},
|
|
/*h(741)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {741, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7914)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7914, 4390},
|
|
/*h(5330)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5330, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1251_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7378)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7378;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1274_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(4074)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4074, 4390},
|
|
/*h(5671)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5671, 4388},
|
|
/*h(1490)=2 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1490, 4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_884_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(7719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7719, 4388},
|
|
/*h(3538)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3538, 4382},
|
|
/*h(6122)=2 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6122, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_494_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5586)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5586, 4382},
|
|
/*h(8170)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8170, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_104_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7634)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W0 ZEROING=0 MASK=0 BCRC=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4382}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7634;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_352_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3662)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3662, 4386},
|
|
/*h(1078)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {1078, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1426_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(8904)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8904, 6085},
|
|
/*h(5710)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5710, 4386},
|
|
/*h(3126)=2 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {3126, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 7) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1036_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(10952)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {10952, 6087},
|
|
/*h(5174)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {5174, 4383},
|
|
/*h(7758)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7758, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_646_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13000)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {13000, 6090},
|
|
/*h(7222)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {7222, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_669_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3918)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3918, 4386},
|
|
/*h(1334)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {1334, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_279_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5966)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5966, 4386},
|
|
/*h(3382)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {3382, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1353_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5430)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {5430, 4383},
|
|
/*h(8014)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8014, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_963_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7478)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {7478, 4383},
|
|
/*h(713)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {713, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_510_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1206)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {1206, 4383},
|
|
/*h(3790)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3790, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_120_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5838)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5838, 4386},
|
|
/*h(3254)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {3254, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1194_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7886)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7886, 4386},
|
|
/*h(5302)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {5302, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_804_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7350)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7350;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_828_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1462)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1462;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3510)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3510;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_48_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5558)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1122_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7606)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1163_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3726)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3726, 4386},
|
|
/*h(1142)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {1142, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_773_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5774)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5774, 4386},
|
|
/*h(3190)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {3190, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_383_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5238)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {5238, 4383},
|
|
/*h(7822)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7822, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1457_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7286)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7286;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_16_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1398)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {1398, 4383},
|
|
/*h(3982)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3982, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1090_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6030)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {6030, 4386},
|
|
/*h(3446)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {3446, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_700_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8078)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8078, 4386},
|
|
/*h(5494)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {5494, 4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_310_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7542)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1322_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1270)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1270;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_932_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3318)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3318;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_542_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5366)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5366;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7414)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7414;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1526)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1526;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1249_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3574)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_859_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5622)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_469_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7670)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=0 FIX_ROUND_LEN128()*/ {4383}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1257_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1079)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1079;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_867_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8905)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8905, 6085},
|
|
/*h(3127)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3127, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_477_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5175)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {5175, 4384},
|
|
/*h(10953)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {10953, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_87_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7223)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {7223, 4384},
|
|
/*h(13001)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {13001, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_110_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1335)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {1335, 4384},
|
|
/*h(3919)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3919, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1184_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5967)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5967, 4388},
|
|
/*h(3383)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3383, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3791)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3791, 4388},
|
|
/*h(1207)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {1207, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1025_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3255)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3255, 4384},
|
|
/*h(5839)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5839, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_268_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4047)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4047, 4388},
|
|
/*h(1463)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {1463, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6095)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6095, 4388},
|
|
/*h(3511)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3511, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_604_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1143)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {1143, 4384},
|
|
/*h(3727)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3727, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5775)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5775, 4388},
|
|
/*h(3191)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3191, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_921_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3983)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3983, 4388},
|
|
/*h(1399)=1 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {1399, 4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_531_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3447)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {3447, 4384},
|
|
/*h(6031)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6031, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_763_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1271)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1271;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_373_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3319)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3319;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1447_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5367)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5367;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1057_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7415)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7415;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1080_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1527)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1527;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_690_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3575)=0 EVV 0x7B VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 BCRC=1 FIX_ROUND_LEN128() AVX512_ROUND()*/ {4384}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5170)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5170, 4385},
|
|
/*h(10948)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10948, 6086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7218)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7218, 4385},
|
|
/*h(12996)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {12996, 6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((3*key % 5) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_662_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8010)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8010, 4390},
|
|
/*h(5426)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5426, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_272_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7474)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7474, 4385},
|
|
/*h(709)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {709, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_503_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5298)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5298, 4385},
|
|
/*h(7882)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7882, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7346)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7346;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1458)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1458, 4385},
|
|
/*h(4042)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4042, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6090)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6090, 4390},
|
|
/*h(3506)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3506, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_820_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8138)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8138, 4390},
|
|
/*h(5554)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5554, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7602)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1156_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7818)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7818, 4390},
|
|
/*h(5234)=1 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5234, 4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_766_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7282)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7282;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_9_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5490)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5490, 4385},
|
|
/*h(8074)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {8074, 4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1083_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7538)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7538;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1315_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5362)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5362;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_925_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7410)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7410;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1242_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7666)=0 EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() mode64 W1 ZEROING=0 MASK=0 BCRC=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4385}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_12_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1542)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1542;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1086_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3590)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_696_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_306_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_329_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_170_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1244_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_854_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_464_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_488_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_823_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1606)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1606, 4386},
|
|
/*h(10955)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {10955, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_750_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(716)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {716, 6084},
|
|
/*h(3910)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3910, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_360_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5958, 4386},
|
|
/*h(2764)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {2764, 6086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1434_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4812)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {4812, 6088},
|
|
/*h(8006)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8006, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_982_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1734, 4386},
|
|
/*h(747)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {747, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1299_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1149_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1574)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1574;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_759_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3622)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1443_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_3_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1830;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_161_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1235_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_845_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6054;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_455_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8102)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8102;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_497_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_814_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_655_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1766, 4386},
|
|
/*h(2753)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2753, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_265_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3814, 4386},
|
|
/*h(4801)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4801, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1339_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_949_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7910, 4386},
|
|
/*h(8897)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8897, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_973_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1394_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1550)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1550;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1004_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3598)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3598;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_614_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5646)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5646;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_224_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7694)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7694;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1806)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1806, 4386},
|
|
/*h(2793)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2793, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1321_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3854)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3854, 4386},
|
|
/*h(4841)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4841, 6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_931_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5902)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_541_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7950)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7950, 4386},
|
|
/*h(8937)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8937, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_89_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1678)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1678;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_406_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1934)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_742_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1614)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1614, 4386},
|
|
/*h(4808)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4808, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1059_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1870)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1870;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_900_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1742)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1742;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1217_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1998)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1998;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_827_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4046)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4046;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_437_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6094)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6094;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_47_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8142)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8142;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1068_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1582)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1582;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1385_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1838)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1227_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1710)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1710, 4386},
|
|
/*h(723)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {723, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_80_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1966)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1966;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_415_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1646)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1646, 4386},
|
|
/*h(10995)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {10995, 6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_732_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1902)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1902;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_342_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(756)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {756, 6070},
|
|
/*h(3950)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3950, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1416_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2804)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2804, 6072},
|
|
/*h(5998)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5998, 4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1026_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(8046)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {8046, 4386},
|
|
/*h(4852)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {4852, 6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_574_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1774)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_891_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2030)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] not64 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4386}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1313_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1558)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1558;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_923_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3606)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3606;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_533_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5654)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5654;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_143_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_850_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5910, 4387},
|
|
/*h(742)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {742, 6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_460_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2790)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {2790, 6072},
|
|
/*h(7958)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7958, 4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_7_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1081_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3734, 4387},
|
|
/*h(8902)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {8902, 6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_691_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10950)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10950, 6086},
|
|
/*h(5782)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5782, 4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_301_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7830, 4387},
|
|
/*h(12998)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {12998, 6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_325_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1399_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1009_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6038)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_619_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8086;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_660_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1622)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1622;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3670)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3670;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_954_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_977_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_587_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3926;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_197_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1271_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_819_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1750;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_429_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3798)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3798;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_39_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1113_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1136_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_746_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4054;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_356_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6102)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6102;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1430_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8150)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W0 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4387}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8150;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_917_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1543)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1543;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_527_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3591)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5639)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5639;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1211_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7687)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7687;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1075_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1671)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_295_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1586)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1586, 4394},
|
|
/*h(5767)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5767, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1369_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3634, 4394},
|
|
/*h(7815)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7815, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1392_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1927)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1002_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3975)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_612_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1842, 4394},
|
|
/*h(6023)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6023, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_222_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3890, 4394},
|
|
/*h(8071)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8071, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10956)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10956, 6086},
|
|
/*h(1607)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1607, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_581_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1863)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_423_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(748)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {748, 6070},
|
|
/*h(1735)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1735, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_740_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1991;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_590_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1575)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1575;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_200_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2026)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {2026, 4390},
|
|
/*h(3623)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3623, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_908_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1831)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_749_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1703)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1066_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1959)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4833)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4833, 6076},
|
|
/*h(1639)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1639, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_255_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1895)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_96_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2754)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2754, 6087},
|
|
/*h(1767)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1767, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_23_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4071)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4071;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1097_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1938, 4391},
|
|
/*h(6119)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {6119, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_707_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3986, 4391},
|
|
/*h(8167)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {8167, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_835_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1551)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1551;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_445_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2002)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {2002, 4391},
|
|
/*h(3599)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3599, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_55_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4050, 4391},
|
|
/*h(5647)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {5647, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1129_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6098)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {6098, 4391},
|
|
/*h(7695)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {7695, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1152_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2794)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2794, 6073},
|
|
/*h(1807)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1807, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_762_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4842)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4842, 6076},
|
|
/*h(3855)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3855, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_372_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5903)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_994_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1679)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1679;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1311_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1935)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1935;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10964)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {10964, 6086},
|
|
/*h(1615)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1615, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1256_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(13012)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {13012, 6088},
|
|
/*h(3663)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {3663, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_866_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5711)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_476_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7759)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_500_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1871)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1871;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_341_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1743)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1743;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_658_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1999)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_509_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1583)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1583;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_826_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1839)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1839;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_667_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1711)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_277_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3759)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5807)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_985_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1967)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10996)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {10996, 6072},
|
|
/*h(1647)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {1647, 4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_173_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1903)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1247_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3951)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_857_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5999)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5999;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_15_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1775)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1775;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_332_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2031)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() not64 ZEROING=0 MASK=0*/ {4388}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1071_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1815)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1815;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_681_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3863)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3863;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_291_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1730, 4390},
|
|
/*h(5911)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5911, 4389},
|
|
/*h(743)=2 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {743, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 5) % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_912_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(6855)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6855, 6089},
|
|
/*h(1687)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {1687, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_522_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3735)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {3735, 4389},
|
|
/*h(8903)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {8903, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((5*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(1602)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1602, 4390},
|
|
/*h(10951)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10951, 6089},
|
|
/*h(5783)=2 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5783, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (4*key % 3);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1229_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1943)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1943;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_839_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3991)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3991;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_449_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1858, 4390},
|
|
/*h(6039)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {6039, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_101_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1623)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1623;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1175_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3671)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3671;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_785_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1538)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1538, 4390},
|
|
/*h(5719)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5719, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_395_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3586)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3586, 4390},
|
|
/*h(7767)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {7767, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_418_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1879)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1879;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_28_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3927)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3927;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1794, 4390},
|
|
/*h(5975)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5975, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_259_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1751)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1333_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3799)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_943_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1666, 4390},
|
|
/*h(5847)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {5847, 4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_577_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2007)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2007;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_187_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4055)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4055;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6103)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W0 ZEROING=0 MASK=0*/ {4389}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6103;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_5_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5634;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1079_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1260_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1922;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_870_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3970)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3970;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_480_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_90_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8066)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_608_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_458_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1570)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1570, 4390},
|
|
/*h(5751)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {5751, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_68_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3618)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3618, 4390},
|
|
/*h(7799)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {7799, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1142_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5666)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5666;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_752_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7714)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7714;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_776_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1826, 4390},
|
|
/*h(6007)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {6007, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_617_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1698)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1698, 4390},
|
|
/*h(5879)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {5879, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_934_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1954)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1954, 4390},
|
|
/*h(6135)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {6135, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1270_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1634)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1634, 4390},
|
|
/*h(5815)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {5815, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_123_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1890, 4390},
|
|
/*h(6071)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {6071, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1428_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1762, 4390},
|
|
/*h(5943)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {5943, 4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1355_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4066)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4066;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_965_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6114)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6114;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_575_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8162)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8162;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_997_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7690)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7690;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1020_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1802)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1802, 4390},
|
|
/*h(2789)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {2789, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_630_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3850)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3850, 4390},
|
|
/*h(4837)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {4837, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_240_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5898)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5898, 4390},
|
|
/*h(6885)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6885, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1314_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7946)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7946, 4390},
|
|
/*h(8933)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {8933, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_50_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1610)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1610, 4390},
|
|
/*h(10959)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {10959, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1124_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3658)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3658, 4390},
|
|
/*h(13007)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {13007, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_734_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5706)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5706, 4390},
|
|
/*h(15055)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {15055, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_344_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7754)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_526_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1994)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_535_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1706)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3754)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3754;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1219_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5802)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5802;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_829_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7850)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7850;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_41_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1898)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1898;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8042)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4390}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8042;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_621_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1554)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1554;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_231_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3602)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3602;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1305_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5650)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5650;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_915_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7698)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7698;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1233_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(2786)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {2786, 6073},
|
|
/*h(7954)=1 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7954, 4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1074_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7826)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7826, 4391},
|
|
/*h(12994)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {12994, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_317_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6034)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6034;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1391_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8082)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8082;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_263_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7762)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7762;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_580_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8018)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8018;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_127_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1746;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1201_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_811_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5842)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5842;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_421_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7890)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7890;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_739_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8146)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4391}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8146;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_986_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1590)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1590;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_596_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3638)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3638;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_206_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5686)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5686;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1280_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7734)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7734;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1304_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1846)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1846;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_914_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3894)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3894;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_524_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5942)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_134_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7990)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1145_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1718)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1718;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_755_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3766)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3766;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_365_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5814)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5814;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1439_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7862)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7862;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1462_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1974)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1974;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1072_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4022)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4022;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_682_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6070)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6070;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_292_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8118)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8118;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_334_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(4848)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {4848, 6076},
|
|
/*h(1654)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1654, 4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1408_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3702)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3702;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1018_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5750)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {5750, 4392},
|
|
/*h(8944)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {8944, 6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_628_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10992)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {10992, 6073},
|
|
/*h(7798)=1 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7798, 4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 3) % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_651_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1910)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_261_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3958)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1335_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6006)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_945_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8054)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8054;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_492_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1782)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {1782, 4392},
|
|
/*h(2769)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {2769, 6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_102_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3830)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {3830, 4392},
|
|
/*h(4817)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {4817, 6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5878)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5878;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_786_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7926)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {7926, 4392},
|
|
/*h(8913)=1 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {8913, 6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_419_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4086)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4086;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_29_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6134)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6134;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1103_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8182)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] mode64 W1 ZEROING=0 MASK=0 FIX_ROUND_LEN128()*/ {4392}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8182;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_427_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1591)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1591;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_37_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3639)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3639;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_744_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1847)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1847;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_354_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3895)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_586_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1719)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1719;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3767)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3767;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_903_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1975)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1975;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_513_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4023)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4023;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1655)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1655;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_848_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3703)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3703;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_92_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1911)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1911;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1166_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3959)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3959;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(1783)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 1783;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1007_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(3831)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 3831;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1324_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4087)=0 EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUND() mode64 W1 ZEROING=0 MASK=0*/ {4393}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4087;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_979_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5682)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5682;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_589_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7730)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7730;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1296_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(5938)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 5938;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_906_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7986)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7986;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_748_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(7858)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {7858, 4394},
|
|
/*h(6871)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6871, 6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1065_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8114)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8114;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(1650)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {1650, 4394},
|
|
/*h(10999)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {10999, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_716_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(3698)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {3698, 4394},
|
|
/*h(13047)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {13047, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_326_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(5746)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {5746, 4394},
|
|
/*h(15095)=1 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {15095, 6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (3*key % 2);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1400_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7794)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7794;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_254_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8050)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8050;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_95_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(7922)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 7922;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1192_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4082)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4082;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_802_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6130)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6130;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_412_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8178)=0 EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W1 ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_READER() FIX_ROUND_LEN128()*/ {4394}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8178;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_505_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(740)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 740;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_409_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8932)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8932;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_246_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8948)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8948;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_754_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8934)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8934;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_673_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8942)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8942;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_591_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8950)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {6070}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8950;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1278_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(736)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 736;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1182_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8928)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8928;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1196_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(744)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 744;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1100_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8936)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8936;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1114_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(752)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_63_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8930)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8930;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8946)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8946;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_555_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(753)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 753;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_459_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8945)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8945;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1064_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(739)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 739;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_901_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(755)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 755;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_805_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8947)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6071}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8947;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_115_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2788)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2788;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_19_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10980)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10980;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1401_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10988)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10988;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_364_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10982)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10982;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_283_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10990)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {6072}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10990;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_888_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2784)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2784;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_792_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10976)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10976;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_806_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2792)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2792;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_710_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10984)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10984;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_724_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2800)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1137_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10978)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10978;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_974_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10994)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10994;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_328_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2785)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2785;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_151_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10985)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10985;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_165_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2801)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2801;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_578_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10979)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10979;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_496_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10987)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10987;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_511_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2803)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6073}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2803;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1189_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4836)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4836;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1011_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13036)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13036;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_70_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4838)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4838;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1438_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13030)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13030;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1357_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13038)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {6074}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13038;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_924_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10981)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10981;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_534_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13029)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13029;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_144_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15077)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15077;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1328_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(749)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 749;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1232_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8941)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8941;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_938_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2797)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2797;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_842_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10989)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10989;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_548_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4845)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4845;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_452_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13037)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13037;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_158_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6893)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6893;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_62_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15085)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15085;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1150_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8949)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8949;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_856_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2805)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2805;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_466_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4853)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4853;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_76_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6901)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1269_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10983)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10983;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_879_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13031)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13031;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_489_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15079)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15079;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_210_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(751)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 751;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1284_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2799)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2799;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_894_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4847)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4847;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_504_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6895)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6895;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_32_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8951)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8951;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_422_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6903)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {6075}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6903;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_498_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4832)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4832;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_402_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13024)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13024;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_416_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4840)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4840;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_320_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13032)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13032;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_238_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13040)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13040;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_843_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4834)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4834;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_747_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13026)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13026;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_584_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13042)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13042;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1225_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13033)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13033;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1239_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4849)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4849;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_188_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13027)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13027;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_106_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13035)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13035;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_121_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4851)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {6076}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4851;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_831_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(708)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 708;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_654_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8908)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8908;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_668_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(724)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 724;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1177_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(710)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 710;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_999_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8910)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8910;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1014_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(726)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {6084}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 726;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_140_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(704)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 704;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_44_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8896)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8896;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_58_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(712)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 712;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1441_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(720)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 720;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1345_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8912)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8912;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_486_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(706)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 706;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_308_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8906)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8906;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_226_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8914)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8914;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_882_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(721)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 721;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1390_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(707)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 707;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1309_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(715)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 715;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1213_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8907)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6085}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8907;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_787_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2758)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2758;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_609_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10958)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10958;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_624_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2774)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {6086}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2774;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1214_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2752)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2752;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1118_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10944)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10944;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1132_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2760)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2760;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1051_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2768)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2768;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_955_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10960)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10960;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1382_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10954)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10954;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1300_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10962)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10962;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_559_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10945)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10945;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_573_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2761)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2761;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_396_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10961)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10961;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_904_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10947)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10947;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_919_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2763)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2763;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_741_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10963)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6087}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10963;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_397_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4806)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4806;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_219_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13006)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13006;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_234_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4822)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {6088}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4822;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_176_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8901)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8901;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1346_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2757)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2757;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1250_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10949)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10949;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_956_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4805)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4805;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_860_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12997)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12997;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_566_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6853)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6853;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_470_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15045)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15045;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_190_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(717)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 717;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_94_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8909)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8909;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1264_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2765)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2765;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1168_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10957)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10957;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_874_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4813)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4813;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_778_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13005)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13005;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_484_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6861)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6861;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_388_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15053)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15053;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_13_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8917)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8917;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2773)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2773;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1087_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10965)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10965;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_793_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4821)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4821;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_697_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13013)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13013;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_403_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(6869)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 6869;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_307_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15061)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15061;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_618_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(711)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 711;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_228_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(2759)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 2759;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1302_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4807)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4807;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_358_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(8919)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 8919;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1432_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(10967)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 10967;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1042_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13015)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13015;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_652_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(15063)=0 EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W0 NOEVSR*/ {6089}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 15063;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_824_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4800)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4800;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_728_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12992)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12992;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_661_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4816)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4816;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_565_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13008)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13008;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_992_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13002)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13002;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_910_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13010)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13010;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_169_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12993)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12993;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_183_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4809)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4809;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_6_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13009)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13009;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_514_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(12995)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 12995;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_529_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(4811)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 4811;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2_351_l1(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct { xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1] = {
|
|
/*h(13011)=0 EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {6090}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = key - 13011;
|
|
if(hidx == 0) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7b_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef xed_uint32_t (*xed_find_func_t)(const xed_decoded_inst_t*);
|
|
typedef struct {xed_uint32_t key; xed_find_func_t l2_func;} lu_entry_t;
|
|
static const lu_entry_t lu_table[1464] = {
|
|
/*h(10946)=0 */ {10946, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_0_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1830)=3 */ {1830, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_3_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5634)=5 */ {5634, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_5_l1},
|
|
/*h(13009)=6 */ {13009, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_6_l1},
|
|
/*h(1686)=7 */ {1686, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_7_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8074)=9 */ {8074, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_9_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1542)=12 */ {1542, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_12_l1},
|
|
/*h(8917)=13 */ {8917, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_13_l1},
|
|
/*h(2762)=14 */ {2762, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_14_l1},
|
|
/*h(1775)=15 */ {1775, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_15_l1},
|
|
/*h(3982)=16 */ {3982, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_16_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7786)=18 */ {7786, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_18_l1},
|
|
/*h(10980)=19 */ {10980, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_19_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1254)=21 */ {1254, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_21_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4071)=23 */ {4071, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_23_l1},
|
|
/*h(1487)=24 */ {1487, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_24_l1},
|
|
/*h(13043)=25 */ {13043, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_25_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7498)=27 */ {7498, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_27_l1},
|
|
/*h(3927)=28 */ {3927, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_28_l1},
|
|
/*h(6134)=29 */ {6134, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_29_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8951)=32 */ {8951, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_32_l1},
|
|
/*h(2796)=33 */ {2796, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_33_l1},
|
|
/*h(5990)=34 */ {5990, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_34_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7210)=36 */ {7210, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_36_l1},
|
|
/*h(3639)=37 */ {3639, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_37_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5846)=39 */ {5846, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_39_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1898)=41 */ {1898, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_41_l1},
|
|
/*h(3495)=42 */ {3495, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_42_l1},
|
|
/*h(5702)=43 */ {5702, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_43_l1},
|
|
/*h(8896)=44 */ {8896, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_44_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5935)=46 */ {5935, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_46_l1},
|
|
/*h(8142)=47 */ {8142, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_47_l1},
|
|
/*h(5558)=48 */ {5558, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_48_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10959)=50 */ {10959, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_50_l1},
|
|
/*h(4804)=51 */ {4804, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_51_l1},
|
|
/*h(5414)=52 */ {5414, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_52_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4050)=55 */ {4050, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_55_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7854)=57 */ {7854, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_57_l1},
|
|
/*h(712)=58 */ {712, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_58_l1},
|
|
/*h(3906)=59 */ {3906, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_59_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5126)=61 */ {5126, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_61_l1},
|
|
/*h(15085)=62 */ {15085, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_62_l1},
|
|
/*h(8930)=63 */ {8930, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_63_l1},
|
|
/*h(2775)=64 */ {2775, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_64_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7566)=66 */ {7566, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_66_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7799)=68 */ {7799, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_68_l1},
|
|
/*h(10993)=69 */ {10993, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_69_l1},
|
|
/*h(4838)=70 */ {4838, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_70_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6058)=73 */ {6058, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_73_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7278)=75 */ {7278, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_75_l1},
|
|
/*h(6901)=76 */ {6901, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_76_l1},
|
|
/*h(3330)=77 */ {3330, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_77_l1},
|
|
/*h(746)=78 */ {746, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_78_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1966)=80 */ {1966, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_80_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5770)=82 */ {5770, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_82_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13001)=87 */ {13001, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_87_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1678)=89 */ {1678, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_89_l1},
|
|
/*h(8066)=90 */ {8066, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_90_l1},
|
|
/*h(5482)=91 */ {5482, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_91_l1},
|
|
/*h(1911)=92 */ {1911, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_92_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8909)=94 */ {8909, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_94_l1},
|
|
/*h(7922)=95 */ {7922, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_95_l1},
|
|
/*h(2754)=96 */ {2754, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_96_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3974)=98 */ {3974, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_98_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7778)=100 */ {7778, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_100_l1},
|
|
/*h(1623)=101 */ {1623, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_101_l1},
|
|
/*h(4817)=102 */ {4817, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_102_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7634)=104 */ {7634, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_104_l1},
|
|
/*h(1479)=105 */ {1479, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_105_l1},
|
|
/*h(13035)=106 */ {13035, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_106_l1},
|
|
/*h(3686)=107 */ {3686, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_107_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(725)=109 */ {725, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_109_l1},
|
|
/*h(3919)=110 */ {3919, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_110_l1},
|
|
/*h(6126)=111 */ {6126, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_111_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7346)=113 */ {7346, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_113_l1},
|
|
/*h(8943)=114 */ {8943, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_114_l1},
|
|
/*h(2788)=115 */ {2788, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_115_l1},
|
|
/*h(3398)=116 */ {3398, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_116_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2034)=118 */ {2034, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_118_l1},
|
|
/*h(3631)=119 */ {3631, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_119_l1},
|
|
/*h(5838)=120 */ {5838, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_120_l1},
|
|
/*h(4851)=121 */ {4851, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_121_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6071)=123 */ {6071, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_123_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3110)=125 */ {3110, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_125_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1746)=127 */ {1746, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_127_l1},
|
|
/*h(759)=128 */ {759, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_128_l1},
|
|
/*h(8134)=129 */ {8134, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_129_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10951)=132 */ {10951, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_132_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7990)=134 */ {7990, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_134_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4042)=136 */ {4042, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_136_l1},
|
|
/*h(5639)=137 */ {5639, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_137_l1},
|
|
/*h(13014)=138 */ {13014, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(704)=140 */ {704, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_140_l1},
|
|
/*h(8079)=141 */ {8079, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_141_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7702)=143 */ {7702, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_143_l1},
|
|
/*h(15077)=144 */ {15077, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_144_l1},
|
|
/*h(3754)=145 */ {3754, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_145_l1},
|
|
/*h(2767)=146 */ {2767, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_146_l1},
|
|
/*h(7558)=147 */ {7558, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7791)=150 */ {7791, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_150_l1},
|
|
/*h(10985)=151 */ {10985, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_151_l1},
|
|
/*h(7414)=152 */ {7414, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6050)=154 */ {6050, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7270)=156 */ {7270, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_156_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6893)=158 */ {6893, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_158_l1},
|
|
/*h(738)=159 */ {738, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1958)=161 */ {1958, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5762)=163 */ {5762, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_163_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2801)=165 */ {2801, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_165_l1},
|
|
/*h(1814)=166 */ {1814, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_166_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5618)=168 */ {5618, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_168_l1},
|
|
/*h(12993)=169 */ {12993, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_169_l1},
|
|
/*h(1670)=170 */ {1670, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5474)=172 */ {5474, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_172_l1},
|
|
/*h(1903)=173 */ {1903, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_173_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1526)=175 */ {1526, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_175_l1},
|
|
/*h(8901)=176 */ {8901, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_176_l1},
|
|
/*h(7914)=177 */ {7914, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_177_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1382)=180 */ {1382, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_180_l1},
|
|
/*h(5186)=181 */ {5186, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_181_l1},
|
|
/*h(10964)=182 */ {10964, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_182_l1},
|
|
/*h(4809)=183 */ {4809, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_183_l1},
|
|
/*h(3822)=184 */ {3822, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_184_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7626)=186 */ {7626, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_186_l1},
|
|
/*h(4055)=187 */ {4055, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_187_l1},
|
|
/*h(13027)=188 */ {13027, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_188_l1},
|
|
/*h(1094)=189 */ {1094, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_189_l1},
|
|
/*h(717)=190 */ {717, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_190_l1},
|
|
/*h(3911)=191 */ {3911, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_191_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6118)=193 */ {6118, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_193_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8935)=195 */ {8935, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_195_l1},
|
|
/*h(3767)=196 */ {3767, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_196_l1},
|
|
/*h(5974)=197 */ {5974, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_197_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2026)=200 */ {2026, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_200_l1},
|
|
/*h(10998)=201 */ {10998, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_201_l1},
|
|
/*h(4843)=202 */ {4843, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_202_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6063)=205 */ {6063, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_205_l1},
|
|
/*h(5686)=206 */ {5686, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_206_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1738)=209 */ {1738, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_209_l1},
|
|
/*h(751)=210 */ {751, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_210_l1},
|
|
/*h(5542)=211 */ {5542, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_211_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5775)=214 */ {5775, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_214_l1},
|
|
/*h(7982)=215 */ {7982, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_215_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4034)=218 */ {4034, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_218_l1},
|
|
/*h(13006)=219 */ {13006, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_219_l1},
|
|
/*h(5254)=220 */ {5254, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3890)=222 */ {3890, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_222_l1},
|
|
/*h(5487)=223 */ {5487, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_223_l1},
|
|
/*h(7694)=224 */ {7694, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_224_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8914)=226 */ {8914, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_226_l1},
|
|
/*h(7927)=227 */ {7927, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_227_l1},
|
|
/*h(2759)=228 */ {2759, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_228_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3602)=231 */ {3602, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_231_l1},
|
|
/*h(10977)=232 */ {10977, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_232_l1},
|
|
/*h(7406)=233 */ {7406, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_233_l1},
|
|
/*h(4822)=234 */ {4822, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_234_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3458)=236 */ {3458, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_236_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13040)=238 */ {13040, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_238_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6885)=240 */ {6885, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_240_l1},
|
|
/*h(3314)=241 */ {3314, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_241_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7351)=245 */ {7351, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_245_l1},
|
|
/*h(8948)=246 */ {8948, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_246_l1},
|
|
/*h(2793)=247 */ {2793, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_247_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5610)=249 */ {5610, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_249_l1},
|
|
/*h(2039)=250 */ {2039, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_250_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8050)=254 */ {8050, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_254_l1},
|
|
/*h(1895)=255 */ {1895, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_255_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1518)=257 */ {1518, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_257_l1},
|
|
/*h(7906)=258 */ {7906, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_258_l1},
|
|
/*h(1751)=259 */ {1751, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_259_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3958)=261 */ {3958, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7762)=263 */ {7762, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_263_l1},
|
|
/*h(10956)=264 */ {10956, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_264_l1},
|
|
/*h(4801)=265 */ {4801, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_265_l1},
|
|
/*h(1230)=266 */ {1230, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_266_l1},
|
|
/*h(7618)=267 */ {7618, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_267_l1},
|
|
/*h(4047)=268 */ {4047, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_268_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3670)=270 */ {3670, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_270_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(709)=272 */ {709, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_272_l1},
|
|
/*h(1319)=273 */ {1319, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_273_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3526)=275 */ {3526, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_275_l1},
|
|
/*h(7330)=276 */ {7330, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_276_l1},
|
|
/*h(3759)=277 */ {3759, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_277_l1},
|
|
/*h(2772)=278 */ {2772, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_278_l1},
|
|
/*h(5966)=279 */ {5966, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_279_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2018)=281 */ {2018, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_281_l1},
|
|
/*h(1031)=282 */ {1031, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_282_l1},
|
|
/*h(10990)=283 */ {10990, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_283_l1},
|
|
/*h(4835)=284 */ {4835, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_284_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1874)=286 */ {1874, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_286_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5678)=288 */ {5678, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_288_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(743)=291 */ {743, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_291_l1},
|
|
/*h(8118)=292 */ {8118, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_292_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1586)=295 */ {1586, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_295_l1},
|
|
/*h(3183)=296 */ {3183, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_296_l1},
|
|
/*h(2806)=297 */ {2806, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_297_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5623)=300 */ {5623, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_300_l1},
|
|
/*h(12998)=301 */ {12998, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_301_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3882)=304 */ {3882, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_304_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7686)=306 */ {7686, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_306_l1},
|
|
/*h(15061)=307 */ {15061, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_307_l1},
|
|
/*h(8906)=308 */ {8906, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_308_l1},
|
|
/*h(7919)=309 */ {7919, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_309_l1},
|
|
/*h(7542)=310 */ {7542, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_310_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3594)=313 */ {3594, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_313_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4814)=315 */ {4814, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6034)=317 */ {6034, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_317_l1},
|
|
/*h(7631)=318 */ {7631, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_318_l1},
|
|
/*h(7254)=319 */ {7254, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_319_l1},
|
|
/*h(13032)=320 */ {13032, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_320_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(722)=322 */ {722, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_322_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1942)=325 */ {1942, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_325_l1},
|
|
/*h(15095)=326 */ {15095, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_326_l1},
|
|
/*h(8940)=327 */ {8940, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_327_l1},
|
|
/*h(2785)=328 */ {2785, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_328_l1},
|
|
/*h(1798)=329 */ {1798, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_329_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5602)=331 */ {5602, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_331_l1},
|
|
/*h(2031)=332 */ {2031, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_332_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4848)=334 */ {4848, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_334_l1},
|
|
/*h(8042)=335 */ {8042, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_335_l1},
|
|
/*h(5458)=336 */ {5458, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_336_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1510)=338 */ {1510, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_338_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5314)=340 */ {5314, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_340_l1},
|
|
/*h(1743)=341 */ {1743, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_341_l1},
|
|
/*h(756)=342 */ {756, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_342_l1},
|
|
/*h(1366)=343 */ {1366, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_343_l1},
|
|
/*h(7754)=344 */ {7754, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_344_l1},
|
|
/*h(10948)=345 */ {10948, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_345_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1222)=347 */ {1222, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_347_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4039)=350 */ {4039, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_350_l1},
|
|
/*h(13011)=351 */ {13011, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_351_l1},
|
|
/*h(3662)=352 */ {3662, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_352_l1},
|
|
/*h(7466)=353 */ {7466, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_353_l1},
|
|
/*h(3895)=354 */ {3895, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_354_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6102)=356 */ {6102, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_356_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8919)=358 */ {8919, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_358_l1},
|
|
/*h(3751)=359 */ {3751, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_359_l1},
|
|
/*h(2764)=360 */ {2764, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_360_l1},
|
|
/*h(3374)=361 */ {3374, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_361_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3607)=363 */ {3607, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_363_l1},
|
|
/*h(10982)=364 */ {10982, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_364_l1},
|
|
/*h(5814)=365 */ {5814, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_365_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1866)=368 */ {1866, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_368_l1},
|
|
/*h(5670)=369 */ {5670, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_369_l1},
|
|
/*h(13045)=370 */ {13045, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_370_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5903)=372 */ {5903, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_372_l1},
|
|
/*h(3319)=373 */ {3319, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_373_l1},
|
|
/*h(8110)=374 */ {8110, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_374_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1578)=377 */ {1578, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_377_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2798)=379 */ {2798, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_379_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4018)=381 */ {4018, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_381_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7822)=383 */ {7822, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8055)=386 */ {8055, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_386_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15053)=388 */ {15053, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_388_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8898)=390 */ {8898, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_390_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7534)=392 */ {7534, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_392_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3586)=395 */ {3586, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_395_l1},
|
|
/*h(10961)=396 */ {10961, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_396_l1},
|
|
/*h(4806)=397 */ {4806, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_397_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6026)=399 */ {6026, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_399_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7246)=401 */ {7246, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_401_l1},
|
|
/*h(13024)=402 */ {13024, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_402_l1},
|
|
/*h(6869)=403 */ {6869, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_403_l1},
|
|
/*h(714)=404 */ {714, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_404_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1934)=406 */ {1934, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_406_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15087)=408 */ {15087, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_408_l1},
|
|
/*h(8932)=409 */ {8932, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_409_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8178)=412 */ {8178, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_412_l1},
|
|
/*h(2023)=413 */ {2023, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_413_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10995)=415 */ {10995, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_415_l1},
|
|
/*h(4840)=416 */ {4840, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_416_l1},
|
|
/*h(8034)=417 */ {8034, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_417_l1},
|
|
/*h(1879)=418 */ {1879, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_418_l1},
|
|
/*h(4086)=419 */ {4086, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_419_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7890)=421 */ {7890, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_421_l1},
|
|
/*h(6903)=422 */ {6903, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_422_l1},
|
|
/*h(748)=423 */ {748, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_423_l1},
|
|
/*h(3942)=424 */ {3942, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_424_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7746)=426 */ {7746, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_426_l1},
|
|
/*h(1591)=427 */ {1591, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_427_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3798)=429 */ {3798, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_429_l1},
|
|
/*h(7602)=430 */ {7602, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_430_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1447)=432 */ {1447, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_432_l1},
|
|
/*h(13003)=433 */ {13003, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_433_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7458)=435 */ {7458, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_435_l1},
|
|
/*h(3887)=436 */ {3887, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_436_l1},
|
|
/*h(6094)=437 */ {6094, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_437_l1},
|
|
/*h(3510)=438 */ {3510, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_438_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8911)=440 */ {8911, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_440_l1},
|
|
/*h(2756)=441 */ {2756, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_441_l1},
|
|
/*h(3366)=442 */ {3366, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_442_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7170)=444 */ {7170, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_444_l1},
|
|
/*h(2002)=445 */ {2002, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_445_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4819)=447 */ {4819, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_447_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1858)=449 */ {1858, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_449_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3078)=451 */ {3078, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_451_l1},
|
|
/*h(13037)=452 */ {13037, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_452_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(727)=454 */ {727, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_454_l1},
|
|
/*h(8102)=455 */ {8102, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_455_l1},
|
|
/*h(5518)=456 */ {5518, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_456_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5751)=458 */ {5751, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_458_l1},
|
|
/*h(8945)=459 */ {8945, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_459_l1},
|
|
/*h(2790)=460 */ {2790, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_460_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4010)=463 */ {4010, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_463_l1},
|
|
/*h(7814)=464 */ {7814, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_464_l1},
|
|
/*h(5230)=465 */ {5230, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_465_l1},
|
|
/*h(4853)=466 */ {4853, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_466_l1},
|
|
/*h(8047)=467 */ {8047, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_467_l1},
|
|
/*h(5463)=468 */ {5463, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_468_l1},
|
|
/*h(7670)=469 */ {7670, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_469_l1},
|
|
/*h(15045)=470 */ {15045, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_470_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3722)=472 */ {3722, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_472_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7526)=474 */ {7526, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_474_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7759)=476 */ {7759, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_476_l1},
|
|
/*h(10953)=477 */ {10953, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_477_l1},
|
|
/*h(7382)=478 */ {7382, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_478_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6018)=480 */ {6018, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_480_l1},
|
|
/*h(3434)=481 */ {3434, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_481_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7238)=483 */ {7238, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_483_l1},
|
|
/*h(6861)=484 */ {6861, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_484_l1},
|
|
/*h(5874)=485 */ {5874, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_485_l1},
|
|
/*h(706)=486 */ {706, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_486_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1926)=488 */ {1926, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_488_l1},
|
|
/*h(15079)=489 */ {15079, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_489_l1},
|
|
/*h(5730)=490 */ {5730, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_490_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2769)=492 */ {2769, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_492_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8170)=494 */ {8170, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_494_l1},
|
|
/*h(7183)=495 */ {7183, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_495_l1},
|
|
/*h(10987)=496 */ {10987, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_496_l1},
|
|
/*h(1638)=497 */ {1638, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_497_l1},
|
|
/*h(4832)=498 */ {4832, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_498_l1},
|
|
/*h(5442)=499 */ {5442, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_499_l1},
|
|
/*h(1871)=500 */ {1871, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_500_l1},
|
|
/*h(4078)=501 */ {4078, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_501_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7882)=503 */ {7882, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_503_l1},
|
|
/*h(6895)=504 */ {6895, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_504_l1},
|
|
/*h(740)=505 */ {740, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_505_l1},
|
|
/*h(1350)=506 */ {1350, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_506_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5154)=508 */ {5154, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_508_l1},
|
|
/*h(1583)=509 */ {1583, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_509_l1},
|
|
/*h(3790)=510 */ {3790, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_510_l1},
|
|
/*h(2803)=511 */ {2803, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_511_l1},
|
|
/*h(7594)=512 */ {7594, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_512_l1},
|
|
/*h(4023)=513 */ {4023, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_513_l1},
|
|
/*h(12995)=514 */ {12995, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_514_l1},
|
|
/*h(1062)=515 */ {1062, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_515_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3879)=518 */ {3879, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_518_l1},
|
|
/*h(6086)=519 */ {6086, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_519_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7306)=521 */ {7306, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_521_l1},
|
|
/*h(8903)=522 */ {8903, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_522_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5942)=524 */ {5942, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_524_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1994)=526 */ {1994, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_526_l1},
|
|
/*h(3591)=527 */ {3591, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_527_l1},
|
|
/*h(10966)=528 */ {10966, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_528_l1},
|
|
/*h(4811)=529 */ {4811, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_529_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6031)=531 */ {6031, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_531_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5654)=533 */ {5654, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_533_l1},
|
|
/*h(13029)=534 */ {13029, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_534_l1},
|
|
/*h(1706)=535 */ {1706, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_535_l1},
|
|
/*h(719)=536 */ {719, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_536_l1},
|
|
/*h(5510)=537 */ {5510, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_537_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5743)=540 */ {5743, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_540_l1},
|
|
/*h(8937)=541 */ {8937, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_541_l1},
|
|
/*h(5366)=542 */ {5366, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_542_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8183)=544 */ {8183, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_544_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5222)=546 */ {5222, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_546_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4845)=548 */ {4845, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_548_l1},
|
|
/*h(3858)=549 */ {3858, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_549_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7662)=551 */ {7662, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_551_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3714)=553 */ {3714, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_553_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(753)=555 */ {753, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_555_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7751)=558 */ {7751, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_558_l1},
|
|
/*h(10945)=559 */ {10945, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_559_l1},
|
|
/*h(7374)=560 */ {7374, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_560_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7607)=562 */ {7607, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_562_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13008)=565 */ {13008, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_565_l1},
|
|
/*h(6853)=566 */ {6853, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_566_l1},
|
|
/*h(5866)=567 */ {5866, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_567_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3138)=571 */ {3138, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_571_l1},
|
|
/*h(8916)=572 */ {8916, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_572_l1},
|
|
/*h(2761)=573 */ {2761, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_573_l1},
|
|
/*h(1774)=574 */ {1774, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_574_l1},
|
|
/*h(8162)=575 */ {8162, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_575_l1},
|
|
/*h(5578)=576 */ {5578, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_576_l1},
|
|
/*h(2007)=577 */ {2007, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_577_l1},
|
|
/*h(10979)=578 */ {10979, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_578_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8018)=580 */ {8018, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_580_l1},
|
|
/*h(1863)=581 */ {1863, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_581_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4070)=583 */ {4070, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_583_l1},
|
|
/*h(13042)=584 */ {13042, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_584_l1},
|
|
/*h(6887)=585 */ {6887, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_585_l1},
|
|
/*h(1719)=586 */ {1719, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_586_l1},
|
|
/*h(3926)=587 */ {3926, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_587_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7730)=589 */ {7730, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_589_l1},
|
|
/*h(1575)=590 */ {1575, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_590_l1},
|
|
/*h(8950)=591 */ {8950, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_591_l1},
|
|
/*h(2795)=592 */ {2795, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_592_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7586)=594 */ {7586, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_594_l1},
|
|
/*h(4015)=595 */ {4015, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_595_l1},
|
|
/*h(3638)=596 */ {3638, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_596_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7442)=598 */ {7442, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_598_l1},
|
|
/*h(1287)=599 */ {1287, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_599_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3494)=601 */ {3494, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_601_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7298)=603 */ {7298, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_603_l1},
|
|
/*h(3727)=604 */ {3727, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_604_l1},
|
|
/*h(5934)=605 */ {5934, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_605_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1986)=608 */ {1986, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_608_l1},
|
|
/*h(10958)=609 */ {10958, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_609_l1},
|
|
/*h(4803)=610 */ {4803, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_610_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1842)=612 */ {1842, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_612_l1},
|
|
/*h(3439)=613 */ {3439, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_613_l1},
|
|
/*h(5646)=614 */ {5646, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_614_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5879)=617 */ {5879, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_617_l1},
|
|
/*h(711)=618 */ {711, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_618_l1},
|
|
/*h(8086)=619 */ {8086, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_619_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1554)=621 */ {1554, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_621_l1},
|
|
/*h(8929)=622 */ {8929, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_622_l1},
|
|
/*h(7942)=623 */ {7942, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_623_l1},
|
|
/*h(2774)=624 */ {2774, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_624_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8175)=626 */ {8175, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_626_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10992)=628 */ {10992, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_628_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4837)=630 */ {4837, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_630_l1},
|
|
/*h(1266)=631 */ {1266, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_631_l1},
|
|
/*h(7654)=632 */ {7654, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_632_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7887)=635 */ {7887, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_635_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(745)=637 */ {745, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_637_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3562)=639 */ {3562, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_639_l1},
|
|
/*h(5159)=640 */ {5159, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_640_l1},
|
|
/*h(7366)=641 */ {7366, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_641_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6002)=644 */ {6002, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_644_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13000)=646 */ {13000, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_646_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5858)=648 */ {5858, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_648_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1910)=651 */ {1910, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_651_l1},
|
|
/*h(15063)=652 */ {15063, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_652_l1},
|
|
/*h(5714)=653 */ {5714, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_653_l1},
|
|
/*h(8908)=654 */ {8908, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_654_l1},
|
|
/*h(2753)=655 */ {2753, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_655_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5570)=657 */ {5570, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_657_l1},
|
|
/*h(1999)=658 */ {1999, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_658_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1622)=660 */ {1622, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_660_l1},
|
|
/*h(4816)=661 */ {4816, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_661_l1},
|
|
/*h(8010)=662 */ {8010, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_662_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1478)=665 */ {1478, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_665_l1},
|
|
/*h(13034)=666 */ {13034, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_666_l1},
|
|
/*h(1711)=667 */ {1711, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_667_l1},
|
|
/*h(724)=668 */ {724, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_668_l1},
|
|
/*h(3918)=669 */ {3918, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_669_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7722)=671 */ {7722, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_671_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8942)=673 */ {8942, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_673_l1},
|
|
/*h(2787)=674 */ {2787, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_674_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4007)=676 */ {4007, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_676_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3630)=678 */ {3630, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_678_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4850)=680 */ {4850, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_680_l1},
|
|
/*h(3863)=681 */ {3863, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_681_l1},
|
|
/*h(6070)=682 */ {6070, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_682_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3719)=685 */ {3719, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_685_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(758)=687 */ {758, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_687_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3575)=690 */ {3575, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_690_l1},
|
|
/*h(10950)=691 */ {10950, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_691_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1834)=694 */ {1834, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_694_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5638)=696 */ {5638, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_696_l1},
|
|
/*h(13013)=697 */ {13013, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_697_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5871)=699 */ {5871, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_699_l1},
|
|
/*h(8078)=700 */ {8078, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_700_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1546)=703 */ {1546, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_703_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2766)=705 */ {2766, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_705_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3986)=707 */ {3986, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_707_l1},
|
|
/*h(5583)=708 */ {5583, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_708_l1},
|
|
/*h(7790)=709 */ {7790, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_709_l1},
|
|
/*h(10984)=710 */ {10984, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_710_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3842)=712 */ {3842, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_712_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13047)=716 */ {13047, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_716_l1},
|
|
/*h(7879)=717 */ {7879, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_717_l1},
|
|
/*h(737)=718 */ {737, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_718_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7735)=721 */ {7735, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_721_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2800)=724 */ {2800, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_724_l1},
|
|
/*h(5994)=725 */ {5994, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_725_l1},
|
|
/*h(7591)=726 */ {7591, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_726_l1},
|
|
/*h(7214)=727 */ {7214, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_727_l1},
|
|
/*h(12992)=728 */ {12992, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_728_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3266)=730 */ {3266, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_730_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1902)=732 */ {1902, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_732_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15055)=734 */ {15055, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_734_l1},
|
|
/*h(8900)=735 */ {8900, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_735_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8146)=739 */ {8146, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_739_l1},
|
|
/*h(1991)=740 */ {1991, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_740_l1},
|
|
/*h(10963)=741 */ {10963, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_741_l1},
|
|
/*h(4808)=742 */ {4808, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_742_l1},
|
|
/*h(8002)=743 */ {8002, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_743_l1},
|
|
/*h(1847)=744 */ {1847, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_744_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4054)=746 */ {4054, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_746_l1},
|
|
/*h(13026)=747 */ {13026, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_747_l1},
|
|
/*h(6871)=748 */ {6871, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_748_l1},
|
|
/*h(1703)=749 */ {1703, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_749_l1},
|
|
/*h(716)=750 */ {716, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_750_l1},
|
|
/*h(1326)=751 */ {1326, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_751_l1},
|
|
/*h(7714)=752 */ {7714, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_752_l1},
|
|
/*h(1559)=753 */ {1559, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_753_l1},
|
|
/*h(8934)=754 */ {8934, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_754_l1},
|
|
/*h(3766)=755 */ {3766, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_755_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7570)=757 */ {7570, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_757_l1},
|
|
/*h(1415)=758 */ {1415, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_758_l1},
|
|
/*h(3622)=759 */ {3622, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_759_l1},
|
|
/*h(10997)=760 */ {10997, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_760_l1},
|
|
/*h(7426)=761 */ {7426, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_761_l1},
|
|
/*h(4842)=762 */ {4842, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_762_l1},
|
|
/*h(1271)=763 */ {1271, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_763_l1},
|
|
/*h(6062)=764 */ {6062, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_764_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7282)=766 */ {7282, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_766_l1},
|
|
/*h(1127)=767 */ {1127, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_767_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(750)=769 */ {750, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_769_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1970)=771 */ {1970, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_771_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5774)=773 */ {5774, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_773_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6007)=776 */ {6007, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_776_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13005)=778 */ {13005, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_778_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1682)=780 */ {1682, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_780_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8070)=782 */ {8070, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_782_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1538)=785 */ {1538, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_785_l1},
|
|
/*h(8913)=786 */ {8913, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_786_l1},
|
|
/*h(2758)=787 */ {2758, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_787_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3978)=789 */ {3978, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_789_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7782)=791 */ {7782, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_791_l1},
|
|
/*h(10976)=792 */ {10976, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_792_l1},
|
|
/*h(4821)=793 */ {4821, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_793_l1},
|
|
/*h(8015)=794 */ {8015, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_794_l1},
|
|
/*h(7638)=795 */ {7638, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_795_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13039)=798 */ {13039, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_798_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7494)=800 */ {7494, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_800_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6130)=802 */ {6130, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_802_l1},
|
|
/*h(7727)=803 */ {7727, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_803_l1},
|
|
/*h(7350)=804 */ {7350, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_804_l1},
|
|
/*h(8947)=805 */ {8947, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_805_l1},
|
|
/*h(2792)=806 */ {2792, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_806_l1},
|
|
/*h(5986)=807 */ {5986, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_807_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2038)=809 */ {2038, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_809_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5842)=811 */ {5842, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_811_l1},
|
|
/*h(4855)=812 */ {4855, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_812_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1894)=814 */ {1894, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_814_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(15047)=816 */ {15047, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_816_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1750)=819 */ {1750, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_819_l1},
|
|
/*h(8138)=820 */ {8138, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_820_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10955)=823 */ {10955, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_823_l1},
|
|
/*h(4800)=824 */ {4800, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_824_l1},
|
|
/*h(5410)=825 */ {5410, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_825_l1},
|
|
/*h(1839)=826 */ {1839, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_826_l1},
|
|
/*h(4046)=827 */ {4046, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_827_l1},
|
|
/*h(1462)=828 */ {1462, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_828_l1},
|
|
/*h(7850)=829 */ {7850, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_829_l1},
|
|
/*h(6863)=830 */ {6863, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_830_l1},
|
|
/*h(708)=831 */ {708, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_831_l1},
|
|
/*h(1318)=832 */ {1318, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_832_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5122)=834 */ {5122, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_834_l1},
|
|
/*h(1551)=835 */ {1551, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_835_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2771)=837 */ {2771, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_837_l1},
|
|
/*h(7562)=838 */ {7562, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_838_l1},
|
|
/*h(3991)=839 */ {3991, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_839_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1030)=841 */ {1030, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_841_l1},
|
|
/*h(10989)=842 */ {10989, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_842_l1},
|
|
/*h(4834)=843 */ {4834, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_843_l1},
|
|
/*h(3847)=844 */ {3847, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_844_l1},
|
|
/*h(6054)=845 */ {6054, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_845_l1},
|
|
/*h(3470)=846 */ {3470, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_846_l1},
|
|
/*h(7274)=847 */ {7274, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_847_l1},
|
|
/*h(3703)=848 */ {3703, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_848_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(742)=850 */ {742, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_850_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1962)=853 */ {1962, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_853_l1},
|
|
/*h(5766)=854 */ {5766, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_854_l1},
|
|
/*h(3182)=855 */ {3182, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_855_l1},
|
|
/*h(2805)=856 */ {2805, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_856_l1},
|
|
/*h(5999)=857 */ {5999, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_857_l1},
|
|
/*h(3415)=858 */ {3415, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_858_l1},
|
|
/*h(5622)=859 */ {5622, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_859_l1},
|
|
/*h(12997)=860 */ {12997, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_860_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1674)=862 */ {1674, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_862_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5478)=864 */ {5478, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_864_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5711)=866 */ {5711, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_866_l1},
|
|
/*h(8905)=867 */ {8905, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_867_l1},
|
|
/*h(7918)=868 */ {7918, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_868_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3970)=870 */ {3970, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_870_l1},
|
|
/*h(8151)=871 */ {8151, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_871_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5190)=873 */ {5190, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_873_l1},
|
|
/*h(4813)=874 */ {4813, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_874_l1},
|
|
/*h(3826)=875 */ {3826, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_875_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7630)=877 */ {7630, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_877_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13031)=879 */ {13031, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_879_l1},
|
|
/*h(7863)=880 */ {7863, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_880_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(721)=882 */ {721, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_882_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6122)=884 */ {6122, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_884_l1},
|
|
/*h(5135)=885 */ {5135, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_885_l1},
|
|
/*h(8939)=886 */ {8939, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_886_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2784)=888 */ {2784, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_888_l1},
|
|
/*h(3394)=889 */ {3394, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_889_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2030)=891 */ {2030, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_891_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5834)=893 */ {5834, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_893_l1},
|
|
/*h(4847)=894 */ {4847, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_894_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7287)=898 */ {7287, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_898_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1742)=900 */ {1742, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_900_l1},
|
|
/*h(755)=901 */ {755, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_901_l1},
|
|
/*h(8130)=902 */ {8130, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_902_l1},
|
|
/*h(1975)=903 */ {1975, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_903_l1},
|
|
/*h(10947)=904 */ {10947, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_904_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7986)=906 */ {7986, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_906_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1831)=908 */ {1831, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_908_l1},
|
|
/*h(4038)=909 */ {4038, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_909_l1},
|
|
/*h(13010)=910 */ {13010, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_910_l1},
|
|
/*h(7842)=911 */ {7842, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_911_l1},
|
|
/*h(6855)=912 */ {6855, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_912_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3894)=914 */ {3894, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_914_l1},
|
|
/*h(7698)=915 */ {7698, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_915_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1543)=917 */ {1543, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_917_l1},
|
|
/*h(8918)=918 */ {8918, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_918_l1},
|
|
/*h(2763)=919 */ {2763, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_919_l1},
|
|
/*h(7554)=920 */ {7554, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_920_l1},
|
|
/*h(3983)=921 */ {3983, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_921_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3606)=923 */ {3606, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_923_l1},
|
|
/*h(10981)=924 */ {10981, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_924_l1},
|
|
/*h(7410)=925 */ {7410, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_925_l1},
|
|
/*h(1255)=926 */ {1255, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_926_l1},
|
|
/*h(3462)=927 */ {3462, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_927_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7266)=929 */ {7266, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_929_l1},
|
|
/*h(13044)=930 */ {13044, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_930_l1},
|
|
/*h(5902)=931 */ {5902, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_931_l1},
|
|
/*h(3318)=932 */ {3318, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_932_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6135)=934 */ {6135, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_934_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3174)=936 */ {3174, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_936_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2797)=938 */ {2797, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_938_l1},
|
|
/*h(1810)=939 */ {1810, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_939_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5614)=941 */ {5614, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_941_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1666)=943 */ {1666, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_943_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8054)=945 */ {8054, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_945_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5703)=948 */ {5703, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_948_l1},
|
|
/*h(8897)=949 */ {8897, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_949_l1},
|
|
/*h(5326)=950 */ {5326, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_950_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8143)=952 */ {8143, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_952_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7766)=954 */ {7766, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_954_l1},
|
|
/*h(10960)=955 */ {10960, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_955_l1},
|
|
/*h(4805)=956 */ {4805, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_956_l1},
|
|
/*h(3818)=957 */ {3818, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_957_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7622)=959 */ {7622, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_959_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7855)=961 */ {7855, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_961_l1},
|
|
/*h(5271)=962 */ {5271, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_962_l1},
|
|
/*h(713)=963 */ {713, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_963_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6114)=965 */ {6114, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_965_l1},
|
|
/*h(3530)=966 */ {3530, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_966_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8931)=968 */ {8931, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_968_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5970)=970 */ {5970, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_970_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7190)=972 */ {7190, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_972_l1},
|
|
/*h(2022)=973 */ {2022, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_973_l1},
|
|
/*h(10994)=974 */ {10994, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_974_l1},
|
|
/*h(4839)=975 */ {4839, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_975_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1878)=977 */ {1878, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_977_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5682)=979 */ {5682, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_979_l1},
|
|
/*h(7279)=980 */ {7279, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_980_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(747)=982 */ {747, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_982_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5538)=984 */ {5538, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_984_l1},
|
|
/*h(1967)=985 */ {1967, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_985_l1},
|
|
/*h(1590)=986 */ {1590, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_986_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7978)=988 */ {7978, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_988_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1446)=991 */ {1446, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_991_l1},
|
|
/*h(13002)=992 */ {13002, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_992_l1},
|
|
/*h(5250)=993 */ {5250, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_993_l1},
|
|
/*h(1679)=994 */ {1679, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_994_l1},
|
|
/*h(3886)=995 */ {3886, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_995_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7690)=997 */ {7690, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_997_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8910)=999 */ {8910, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_999_l1},
|
|
/*h(2755)=1000 */ {2755, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1000_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3975)=1002 */ {3975, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1002_l1},
|
|
/*h(1391)=1003 */ {1391, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1003_l1},
|
|
/*h(3598)=1004 */ {3598, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1004_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4818)=1006 */ {4818, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1006_l1},
|
|
/*h(3831)=1007 */ {3831, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1007_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6038)=1009 */ {6038, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1009_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13036)=1011 */ {13036, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1011_l1},
|
|
/*h(3687)=1012 */ {3687, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1012_l1},
|
|
/*h(5894)=1013 */ {5894, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1013_l1},
|
|
/*h(726)=1014 */ {726, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1014_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6127)=1016 */ {6127, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1016_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8944)=1018 */ {8944, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1018_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2789)=1020 */ {2789, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1020_l1},
|
|
/*h(3399)=1021 */ {3399, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1021_l1},
|
|
/*h(5606)=1022 */ {5606, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1022_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5839)=1025 */ {5839, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1025_l1},
|
|
/*h(4852)=1026 */ {4852, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1026_l1},
|
|
/*h(5462)=1027 */ {5462, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1027_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1514)=1029 */ {1514, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1029_l1},
|
|
/*h(3111)=1030 */ {3111, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1030_l1},
|
|
/*h(5318)=1031 */ {5318, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1031_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3954)=1034 */ {3954, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1034_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10952)=1036 */ {10952, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1036_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7991)=1038 */ {7991, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1038_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13015)=1042 */ {13015, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1042_l1},
|
|
/*h(3666)=1043 */ {3666, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1043_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(705)=1045 */ {705, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1045_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7703)=1047 */ {7703, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1047_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2768)=1051 */ {2768, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1051_l1},
|
|
/*h(5962)=1052 */ {5962, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1052_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7182)=1054 */ {7182, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1054_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10986)=1056 */ {10986, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1056_l1},
|
|
/*h(7415)=1057 */ {7415, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1057_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1870)=1059 */ {1870, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1059_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5674)=1061 */ {5674, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1061_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(739)=1064 */ {739, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1064_l1},
|
|
/*h(8114)=1065 */ {8114, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1065_l1},
|
|
/*h(1959)=1066 */ {1959, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1066_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1582)=1068 */ {1582, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1068_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2802)=1070 */ {2802, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1070_l1},
|
|
/*h(1815)=1071 */ {1815, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1071_l1},
|
|
/*h(4022)=1072 */ {4022, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1072_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12994)=1074 */ {12994, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1074_l1},
|
|
/*h(1671)=1075 */ {1671, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1075_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3878)=1077 */ {3878, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1077_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7682)=1079 */ {7682, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1079_l1},
|
|
/*h(1527)=1080 */ {1527, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1080_l1},
|
|
/*h(8902)=1081 */ {8902, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1081_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7538)=1083 */ {7538, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1083_l1},
|
|
/*h(1383)=1084 */ {1383, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1084_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3590)=1086 */ {3590, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1086_l1},
|
|
/*h(10965)=1087 */ {10965, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1087_l1},
|
|
/*h(4810)=1088 */ {4810, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1088_l1},
|
|
/*h(3823)=1089 */ {3823, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1089_l1},
|
|
/*h(6030)=1090 */ {6030, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1090_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7250)=1092 */ {7250, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1092_l1},
|
|
/*h(13028)=1093 */ {13028, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1093_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(718)=1095 */ {718, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1095_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1938)=1097 */ {1938, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1097_l1},
|
|
/*h(3535)=1098 */ {3535, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1098_l1},
|
|
/*h(5742)=1099 */ {5742, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1099_l1},
|
|
/*h(8936)=1100 */ {8936, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1100_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1794)=1102 */ {1794, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1102_l1},
|
|
/*h(8182)=1103 */ {8182, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1103_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10999)=1106 */ {10999, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1106_l1},
|
|
/*h(4844)=1107 */ {4844, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1107_l1},
|
|
/*h(8038)=1108 */ {8038, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1108_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5687)=1111 */ {5687, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1111_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7894)=1113 */ {7894, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1113_l1},
|
|
/*h(752)=1114 */ {752, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1114_l1},
|
|
/*h(3946)=1115 */ {3946, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1115_l1},
|
|
/*h(5543)=1116 */ {5543, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1116_l1},
|
|
/*h(7750)=1117 */ {7750, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1117_l1},
|
|
/*h(10944)=1118 */ {10944, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1118_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7983)=1120 */ {7983, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1120_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7606)=1122 */ {7606, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1122_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13007)=1124 */ {13007, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1124_l1},
|
|
/*h(1074)=1125 */ {1074, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1125_l1},
|
|
/*h(7462)=1126 */ {7462, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1126_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6098)=1129 */ {6098, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1129_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8915)=1131 */ {8915, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1131_l1},
|
|
/*h(2760)=1132 */ {2760, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1132_l1},
|
|
/*h(5954)=1133 */ {5954, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1133_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7174)=1135 */ {7174, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1135_l1},
|
|
/*h(2006)=1136 */ {2006, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1136_l1},
|
|
/*h(10978)=1137 */ {10978, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1137_l1},
|
|
/*h(4823)=1138 */ {4823, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1138_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1862)=1140 */ {1862, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1140_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5666)=1142 */ {5666, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1142_l1},
|
|
/*h(13041)=1143 */ {13041, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1143_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1718)=1145 */ {1718, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1145_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8106)=1147 */ {8106, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1147_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1574)=1149 */ {1574, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1149_l1},
|
|
/*h(8949)=1150 */ {8949, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1150_l1},
|
|
/*h(5378)=1151 */ {5378, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1151_l1},
|
|
/*h(2794)=1152 */ {2794, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1152_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4014)=1154 */ {4014, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1154_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7818)=1156 */ {7818, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1156_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1286)=1159 */ {1286, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1159_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1519)=1161 */ {1519, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1161_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3726)=1163 */ {3726, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1163_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7530)=1165 */ {7530, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1165_l1},
|
|
/*h(3959)=1166 */ {3959, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1166_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10957)=1168 */ {10957, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1168_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4802)=1170 */ {4802, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1170_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6022)=1172 */ {6022, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1172_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7242)=1174 */ {7242, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1174_l1},
|
|
/*h(3671)=1175 */ {3671, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1175_l1},
|
|
/*h(5878)=1176 */ {5878, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1176_l1},
|
|
/*h(710)=1177 */ {710, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1177_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1930)=1179 */ {1930, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1179_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5734)=1181 */ {5734, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1181_l1},
|
|
/*h(8928)=1182 */ {8928, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1182_l1},
|
|
/*h(2773)=1183 */ {2773, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1183_l1},
|
|
/*h(5967)=1184 */ {5967, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1184_l1},
|
|
/*h(8174)=1185 */ {8174, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1185_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10991)=1188 */ {10991, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1188_l1},
|
|
/*h(4836)=1189 */ {4836, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1189_l1},
|
|
/*h(5446)=1190 */ {5446, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1190_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4082)=1192 */ {4082, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1192_l1},
|
|
/*h(5679)=1193 */ {5679, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1193_l1},
|
|
/*h(7886)=1194 */ {7886, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1194_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(744)=1196 */ {744, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1196_l1},
|
|
/*h(8119)=1197 */ {8119, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1197_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5158)=1199 */ {5158, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1199_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3794)=1201 */ {3794, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1201_l1},
|
|
/*h(2807)=1202 */ {2807, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1202_l1},
|
|
/*h(7598)=1203 */ {7598, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1203_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12999)=1206 */ {12999, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1206_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6090)=1210 */ {6090, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1210_l1},
|
|
/*h(7687)=1211 */ {7687, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1211_l1},
|
|
/*h(7310)=1212 */ {7310, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1212_l1},
|
|
/*h(8907)=1213 */ {8907, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1213_l1},
|
|
/*h(2752)=1214 */ {2752, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1214_l1},
|
|
/*h(7543)=1215 */ {7543, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1215_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1998)=1217 */ {1998, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1217_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5802)=1219 */ {5802, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1219_l1},
|
|
/*h(4815)=1220 */ {4815, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1220_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3074)=1224 */ {3074, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1224_l1},
|
|
/*h(13033)=1225 */ {13033, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1225_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(723)=1227 */ {723, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1227_l1},
|
|
/*h(8098)=1228 */ {8098, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1228_l1},
|
|
/*h(1943)=1229 */ {1943, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1229_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8941)=1232 */ {8941, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1232_l1},
|
|
/*h(2786)=1233 */ {2786, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1233_l1},
|
|
/*h(1799)=1234 */ {1799, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1234_l1},
|
|
/*h(4006)=1235 */ {4006, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1235_l1},
|
|
/*h(1422)=1236 */ {1422, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1236_l1},
|
|
/*h(7810)=1237 */ {7810, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1237_l1},
|
|
/*h(1655)=1238 */ {1655, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1238_l1},
|
|
/*h(4849)=1239 */ {4849, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1239_l1},
|
|
/*h(3862)=1240 */ {3862, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1240_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7666)=1242 */ {7666, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1242_l1},
|
|
/*h(1511)=1243 */ {1511, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1243_l1},
|
|
/*h(3718)=1244 */ {3718, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1244_l1},
|
|
/*h(1134)=1245 */ {1134, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1245_l1},
|
|
/*h(757)=1246 */ {757, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1246_l1},
|
|
/*h(3951)=1247 */ {3951, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1247_l1},
|
|
/*h(1367)=1248 */ {1367, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1248_l1},
|
|
/*h(3574)=1249 */ {3574, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1249_l1},
|
|
/*h(10949)=1250 */ {10949, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1250_l1},
|
|
/*h(7378)=1251 */ {7378, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1251_l1},
|
|
/*h(1223)=1252 */ {1223, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1252_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3430)=1254 */ {3430, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1254_l1},
|
|
/*h(7234)=1255 */ {7234, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1255_l1},
|
|
/*h(13012)=1256 */ {13012, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1256_l1},
|
|
/*h(1079)=1257 */ {1079, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1257_l1},
|
|
/*h(5870)=1258 */ {5870, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1258_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1922)=1260 */ {1922, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1260_l1},
|
|
/*h(6103)=1261 */ {6103, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1261_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3142)=1263 */ {3142, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1263_l1},
|
|
/*h(2765)=1264 */ {2765, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1264_l1},
|
|
/*h(1778)=1265 */ {1778, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1265_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8166)=1267 */ {8166, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1267_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10983)=1269 */ {10983, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1269_l1},
|
|
/*h(5815)=1270 */ {5815, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1270_l1},
|
|
/*h(8022)=1271 */ {8022, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1271_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4074)=1274 */ {4074, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1274_l1},
|
|
/*h(13046)=1275 */ {13046, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1275_l1},
|
|
/*h(7878)=1276 */ {7878, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1276_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(736)=1278 */ {736, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1278_l1},
|
|
/*h(8111)=1279 */ {8111, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1279_l1},
|
|
/*h(7734)=1280 */ {7734, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1280_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3786)=1283 */ {3786, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1283_l1},
|
|
/*h(2799)=1284 */ {2799, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1284_l1},
|
|
/*h(7590)=1285 */ {7590, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1285_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7823)=1288 */ {7823, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1288_l1},
|
|
/*h(7446)=1289 */ {7446, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1289_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6082)=1292 */ {6082, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1292_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8899)=1294 */ {8899, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1294_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5938)=1296 */ {5938, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1296_l1},
|
|
/*h(7535)=1297 */ {7535, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1297_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1990)=1299 */ {1990, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1299_l1},
|
|
/*h(10962)=1300 */ {10962, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1300_l1},
|
|
/*h(5794)=1301 */ {5794, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1301_l1},
|
|
/*h(4807)=1302 */ {4807, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1302_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1846)=1304 */ {1846, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1304_l1},
|
|
/*h(5650)=1305 */ {5650, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1305_l1},
|
|
/*h(13025)=1306 */ {13025, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1306_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1702)=1308 */ {1702, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1308_l1},
|
|
/*h(715)=1309 */ {715, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1309_l1},
|
|
/*h(5506)=1310 */ {5506, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1310_l1},
|
|
/*h(1935)=1311 */ {1935, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1311_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1558)=1313 */ {1558, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1313_l1},
|
|
/*h(8933)=1314 */ {8933, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1314_l1},
|
|
/*h(5362)=1315 */ {5362, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1315_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1414)=1317 */ {1414, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1317_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5218)=1319 */ {5218, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1319_l1},
|
|
/*h(10996)=1320 */ {10996, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1320_l1},
|
|
/*h(4841)=1321 */ {4841, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1321_l1},
|
|
/*h(1270)=1322 */ {1270, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1322_l1},
|
|
/*h(7658)=1323 */ {7658, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1323_l1},
|
|
/*h(4087)=1324 */ {4087, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1324_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1126)=1326 */ {1126, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1326_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(749)=1328 */ {749, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1328_l1},
|
|
/*h(3943)=1329 */ {3943, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1329_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3566)=1331 */ {3566, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1331_l1},
|
|
/*h(7370)=1332 */ {7370, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1332_l1},
|
|
/*h(3799)=1333 */ {3799, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1333_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6006)=1335 */ {6006, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1335_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(13004)=1338 */ {13004, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1338_l1},
|
|
/*h(5862)=1339 */ {5862, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1339_l1},
|
|
/*h(3278)=1340 */ {3278, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1340_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6095)=1342 */ {6095, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1342_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5718)=1344 */ {5718, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1344_l1},
|
|
/*h(8912)=1345 */ {8912, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1345_l1},
|
|
/*h(2757)=1346 */ {2757, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1346_l1},
|
|
/*h(1770)=1347 */ {1770, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1347_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5574)=1349 */ {5574, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1349_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5807)=1351 */ {5807, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1351_l1},
|
|
/*h(4820)=1352 */ {4820, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1352_l1},
|
|
/*h(8014)=1353 */ {8014, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1353_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4066)=1355 */ {4066, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1355_l1},
|
|
/*h(1482)=1356 */ {1482, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1356_l1},
|
|
/*h(13038)=1357 */ {13038, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1357_l1},
|
|
/*h(5286)=1358 */ {5286, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1358_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3922)=1360 */ {3922, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1360_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7726)=1362 */ {7726, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1362_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8946)=1364 */ {8946, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1364_l1},
|
|
/*h(2791)=1365 */ {2791, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1365_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3634)=1369 */ {3634, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1369_l1},
|
|
/*h(5231)=1370 */ {5231, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1370_l1},
|
|
/*h(4854)=1371 */ {4854, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1371_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7671)=1374 */ {7671, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1374_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5930)=1378 */ {5930, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1378_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10954)=1382 */ {10954, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1382_l1},
|
|
/*h(3202)=1383 */ {3202, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1383_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1838)=1385 */ {1838, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1385_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5642)=1387 */ {5642, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1387_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(707)=1390 */ {707, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1390_l1},
|
|
/*h(8082)=1391 */ {8082, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1391_l1},
|
|
/*h(1927)=1392 */ {1927, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1392_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1550)=1394 */ {1550, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1394_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(2770)=1396 */ {2770, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1396_l1},
|
|
/*h(1783)=1397 */ {1783, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1397_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3990)=1399 */ {3990, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1399_l1},
|
|
/*h(7794)=1400 */ {7794, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1400_l1},
|
|
/*h(10988)=1401 */ {10988, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1401_l1},
|
|
/*h(4833)=1402 */ {4833, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1402_l1},
|
|
/*h(3846)=1403 */ {3846, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1403_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7650)=1405 */ {7650, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1405_l1},
|
|
/*h(4079)=1406 */ {4079, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1406_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3702)=1408 */ {3702, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1408_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(741)=1410 */ {741, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1410_l1},
|
|
/*h(1351)=1411 */ {1351, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1411_l1},
|
|
/*h(3558)=1412 */ {3558, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1412_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7362)=1414 */ {7362, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1414_l1},
|
|
/*h(3791)=1415 */ {3791, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1415_l1},
|
|
/*h(2804)=1416 */ {2804, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1416_l1},
|
|
/*h(3414)=1417 */ {3414, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1417_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(12996)=1419 */ {12996, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1419_l1},
|
|
/*h(1063)=1420 */ {1063, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1420_l1},
|
|
/*h(3270)=1421 */ {3270, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1421_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1906)=1424 */ {1906, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1424_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8904)=1426 */ {8904, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1426_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5943)=1428 */ {5943, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1428_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8150)=1430 */ {8150, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1430_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(10967)=1432 */ {10967, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1432_l1},
|
|
/*h(1618)=1433 */ {1618, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1433_l1},
|
|
/*h(4812)=1434 */ {4812, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1434_l1},
|
|
/*h(5422)=1435 */ {5422, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1435_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(5655)=1437 */ {5655, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1437_l1},
|
|
/*h(13030)=1438 */ {13030, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1438_l1},
|
|
/*h(7862)=1439 */ {7862, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1439_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(720)=1441 */ {720, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1441_l1},
|
|
/*h(3914)=1442 */ {3914, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1442_l1},
|
|
/*h(7718)=1443 */ {7718, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1443_l1},
|
|
/*h(15093)=1444 */ {15093, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1444_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(8938)=1446 */ {8938, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1446_l1},
|
|
/*h(5367)=1447 */ {5367, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1447_l1},
|
|
/*h(7574)=1448 */ {7574, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1448_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(3626)=1451 */ {3626, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1451_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(4846)=1453 */ {4846, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1453_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(6066)=1455 */ {6066, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1455_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(7286)=1457 */ {7286, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1457_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(754)=1460 */ {754, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1460_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
/*h(1974)=1462 */ {1974, xed3_phash_find_mapevex_map1_opcode0x7b_vv2_1462_l1},
|
|
/*empty slot2 */ {0, xed_phash_invalid_const},
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 1464ULL, u.s.hi32);
|
|
return (*lu_table[hidx].l2_func)(d);
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7e_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(754)=0 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_GPR_WRITER_STORE()*/ {754, 5002},
|
|
/*h(706)=1 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {706, 4921},
|
|
/*h(1778)=2 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {1778, 5004},
|
|
/*h(758)=3 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR ZEROING=0 MASK=0*/ {758, 5001},
|
|
/*h(710)=4 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {710, 4919},
|
|
/*h(1782)=5 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {1782, 5003},
|
|
/*h(738)=6 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {738, 4921},
|
|
/*h(714)=7 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {714, 4921},
|
|
/*h(1762)=8 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {1762, 5004},
|
|
/*h(742)=9 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {742, 4919},
|
|
/*h(718)=10 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {718, 4919},
|
|
/*h(1766)=11 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {1766, 5003},
|
|
/*h(746)=12 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 not64 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {746, 4921},
|
|
/*h(722)=13 EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_GPR_WRITER_STORE()*/ {722, 4922},
|
|
/*h(1770)=14 EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {1770, 5004},
|
|
/*h(750)=15 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0*/ {750, 4919},
|
|
/*h(726)=16 EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0*/ {726, 4920},
|
|
/*h(1774)=17 EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {1774, 5003}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((19*key % 73) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0x7f_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[108] = {
|
|
/*h(1370)=0 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1370, 4939},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(412)=4 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {412, 6207},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(344)=6 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {344, 4940},
|
|
/*h(474)=7 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4963},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1502)=9 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1502, 4975},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1434)=11 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1434, 6218},
|
|
/*h(414)=12 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {414, 6206},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(346)=14 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {346, 4939},
|
|
/*h(476)=15 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {476, 4976},
|
|
/*h(1374)=16 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1374, 4951},
|
|
/*h(408)=17 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {408, 6219},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=22 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {348, 4952},
|
|
/*h(478)=23 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {478, 4975},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(410)=25 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {410, 6218},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1438)=27 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {1438, 6206},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1754)=29 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1754, 4955},
|
|
/*h(350)=30 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4951},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=35 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {728, 4956},
|
|
/*h(1242)=36 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1242, 4959},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=42 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {216, 4960},
|
|
/*h(730)=43 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4955},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1758)=45 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1758, 4967},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1690)=47 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1690, 6222},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(218)=50 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 4959},
|
|
/*h(732)=51 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {732, 4968},
|
|
/*h(1246)=52 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1246, 4971},
|
|
/*h(664)=53 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {664, 6223},
|
|
/*h(1178)=54 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1178, 6214},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(220)=58 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {220, 4972},
|
|
/*h(734)=59 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {734, 4967},
|
|
/*h(152)=60 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {152, 6215},
|
|
/*h(666)=61 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {666, 6222},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1694)=63 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1694, 6210},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1626)=65 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {1626, 4931},
|
|
/*h(222)=66 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {222, 4971},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(154)=68 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {154, 6214},
|
|
/*h(668)=69 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {668, 6211},
|
|
/*h(1182)=70 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1182, 6202},
|
|
/*h(600)=71 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {600, 4932},
|
|
/*h(1114)=72 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {1114, 4935},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(156)=76 EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()*/ {156, 6203},
|
|
/*h(670)=77 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {670, 6210},
|
|
/*h(88)=78 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {88, 4936},
|
|
/*h(602)=79 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {602, 4931},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1630)=81 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {1630, 4943},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(158)=84 EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {158, 6202},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=86 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {90, 4935},
|
|
/*h(604)=87 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {604, 4944},
|
|
/*h(1118)=88 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {1118, 4947},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=94 EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM()*/ {92, 4948},
|
|
/*h(606)=95 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4943},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(1498)=101 EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {1498, 4963},
|
|
/*h(94)=102 EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4947},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=107 EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {472, 4964}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((4*key % 137) % 108);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[100] = {
|
|
/*h(0)=0 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {0, 4146},
|
|
/*h(46)=1 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()*/ {46, 4140},
|
|
/*h(54)=2 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 ZEROING=0 UIMM8()*/ {54, 4149},
|
|
/*h(24)=3 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {24, 4154},
|
|
/*h(32)=4 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {32, 4148},
|
|
/*h(78)=5 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()*/ {78, 4135},
|
|
/*h(86)=6 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 ZEROING=0 UIMM8()*/ {86, 4149},
|
|
/*h(56)=7 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {56, 4154},
|
|
/*h(64)=8 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {64, 4144},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(118)=10 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 ZEROING=0 UIMM8()*/ {118, 4149},
|
|
/*h(88)=11 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {88, 4154},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(15)=13 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 ZEROING=0 UIMM8()*/ {15, 4136},
|
|
/*h(23)=14 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 ZEROING=0 UIMM8()*/ {23, 4150},
|
|
/*h(120)=15 EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_SCALAR()*/ {120, 4154},
|
|
/*h(1)=16 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {1, 4146},
|
|
/*h(47)=17 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 ZEROING=0 UIMM8()*/ {47, 4136},
|
|
/*h(55)=18 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 ZEROING=0 UIMM8()*/ {55, 4150},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(33)=20 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {33, 4148},
|
|
/*h(79)=21 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 ZEROING=0 UIMM8()*/ {79, 4136},
|
|
/*h(87)=22 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 ZEROING=0 UIMM8()*/ {87, 4150},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(65)=24 EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {65, 4144},
|
|
/*h(111)=25 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 ZEROING=0 UIMM8()*/ {111, 4136},
|
|
/*h(119)=26 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 ZEROING=0 UIMM8()*/ {119, 4150},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(2)=32 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()*/ {2, 4145},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(26)=35 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 UIMM8()*/ {26, 4152},
|
|
/*h(34)=36 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()*/ {34, 4147},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(58)=39 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 UIMM8()*/ {58, 4152},
|
|
/*h(66)=40 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()*/ {66, 4142},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(90)=43 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 UIMM8()*/ {90, 4152},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(122)=47 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 UIMM8()*/ {122, 4152},
|
|
/*h(3)=48 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {3, 4143},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(27)=51 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {27, 4153},
|
|
/*h(35)=52 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {35, 4143},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(59)=55 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {59, 4153},
|
|
/*h(67)=56 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {67, 4143},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(91)=59 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {91, 4153},
|
|
/*h(99)=60 EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 ZEROING=0 UIMM8()*/ {99, 4143},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(123)=63 EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 ZEROING=0 UIMM8()*/ {123, 4153},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(12)=65 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 4139},
|
|
/*h(20)=66 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {20, 4151},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(44)=69 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 4141},
|
|
/*h(52)=70 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {52, 4151},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(76)=73 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 4137},
|
|
/*h(84)=74 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {84, 4151},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(116)=78 EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_SCALAR()*/ {116, 4151},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(13)=81 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 4139},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(45)=85 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 4141},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(77)=89 EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 4137},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=97 EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()*/ {14, 4138},
|
|
/*h(22)=98 EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 ZEROING=0 UIMM8()*/ {22, 4149},
|
|
/*empty slot1 */ {0,0}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((16*key % 127) % 100);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(10)=0 EVV 0xC4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 UIMM8() ESIZE_16_BITS() NELEM_GPR_READER_WORD()*/ {10, 6443},
|
|
/*h(14)=1 EVV 0xC4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0 UIMM8()*/ {14, 6442}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[5] = {
|
|
/*h(742)=0 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() not64*/ {742, 6432},
|
|
/*h(750)=1 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() not64*/ {750, 6432},
|
|
/*h(726)=2 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() mode64 EVEXRR_ONE*/ {726, 6433},
|
|
/*h(718)=3 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() not64*/ {718, 6432},
|
|
/*h(710)=4 EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MASK=0 UIMM8() not64*/ {710, 6432}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = ((6*key % 7) % 5);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xc6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(0)=0 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {0, 5927},
|
|
/*h(14)=1 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()*/ {14, 5920},
|
|
/*h(66)=2 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()*/ {66, 5924},
|
|
/*h(77)=3 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {77, 5919},
|
|
/*h(32)=4 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {32, 5929},
|
|
/*h(46)=5 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()*/ {46, 5922},
|
|
/*h(1)=6 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {1, 5927},
|
|
/*h(12)=7 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {12, 5921},
|
|
/*h(64)=8 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {64, 5925},
|
|
/*h(78)=9 EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()*/ {78, 5918},
|
|
/*h(33)=10 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {33, 5929},
|
|
/*h(44)=11 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {44, 5923},
|
|
/*h(2)=12 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()*/ {2, 5926},
|
|
/*h(13)=13 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {13, 5921},
|
|
/*h(65)=14 EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_32_BITS() NELEM_FULL()*/ {65, 5925},
|
|
/*h(76)=15 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {76, 5919},
|
|
/*h(34)=16 EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()*/ {34, 5928},
|
|
/*h(45)=17 EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()*/ {45, 5923}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((6*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd1_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6670},
|
|
/*h(4)=1 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_MEM128()*/ {4, 6667},
|
|
/*h(38)=2 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6674},
|
|
/*h(20)=3 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_MEM128()*/ {20, 6671},
|
|
/*h(6)=4 EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6666},
|
|
/*h(36)=5 EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_MEM128()*/ {36, 6675}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(42)=0 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5706},
|
|
/*h(8)=1 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {8, 5703},
|
|
/*h(72)=2 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {72, 5699},
|
|
/*h(10)=3 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5702},
|
|
/*h(74)=4 EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5698},
|
|
/*h(40)=5 EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {40, 5707}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd3_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(14)=0 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5714},
|
|
/*h(46)=1 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5718},
|
|
/*h(78)=2 EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5710},
|
|
/*h(12)=3 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {12, 5715},
|
|
/*h(44)=4 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {44, 5719},
|
|
/*h(76)=5 EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {76, 5711}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5090},
|
|
/*h(46)=1 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5093},
|
|
/*h(12)=2 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5092},
|
|
/*h(77)=3 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5090},
|
|
/*h(13)=4 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5092},
|
|
/*h(78)=5 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5089},
|
|
/*h(44)=6 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5094},
|
|
/*h(14)=7 EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5091},
|
|
/*h(45)=8 EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5094}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6584},
|
|
/*h(4)=1 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6583},
|
|
/*h(38)=2 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6586},
|
|
/*h(20)=3 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6585},
|
|
/*h(6)=4 EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6582},
|
|
/*h(36)=5 EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6587}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[2] = {
|
|
/*h(190)=0 EVV 0xD6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=0 MASK=0*/ {190, 5005},
|
|
/*h(186)=1 EVV 0xD6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_SCALAR()*/ {186, 5006}
|
|
};
|
|
xed_union64_t t;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, t.s.lo32 >> (32-1));
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6698},
|
|
/*h(4)=1 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6697},
|
|
/*h(38)=2 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6700},
|
|
/*h(20)=3 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6699},
|
|
/*h(6)=4 EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6696},
|
|
/*h(36)=5 EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6701}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xd9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6704},
|
|
/*h(4)=1 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6703},
|
|
/*h(38)=2 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6706},
|
|
/*h(20)=3 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6705},
|
|
/*h(6)=4 EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6702},
|
|
/*h(36)=5 EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6707}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xda_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6494},
|
|
/*h(4)=1 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6493},
|
|
/*h(38)=2 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6496},
|
|
/*h(20)=3 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6495},
|
|
/*h(6)=4 EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6492},
|
|
/*h(36)=5 EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6497}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5096},
|
|
/*h(76)=1 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5114},
|
|
/*h(8)=2 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5098},
|
|
/*h(12)=3 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5116},
|
|
/*h(41)=4 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5100},
|
|
/*h(45)=5 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5118},
|
|
/*h(74)=6 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5095},
|
|
/*h(78)=7 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5113},
|
|
/*h(10)=8 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5097},
|
|
/*h(14)=9 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5115},
|
|
/*h(40)=10 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5100},
|
|
/*h(44)=11 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5118},
|
|
/*h(73)=12 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5096},
|
|
/*h(77)=13 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5114},
|
|
/*h(9)=14 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5098},
|
|
/*h(13)=15 EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5116},
|
|
/*h(42)=16 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5099},
|
|
/*h(46)=17 EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5117}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6292},
|
|
/*h(4)=1 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6291},
|
|
/*h(38)=2 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6294},
|
|
/*h(20)=3 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6293},
|
|
/*h(6)=4 EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6290},
|
|
/*h(36)=5 EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6295}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6298},
|
|
/*h(4)=1 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6297},
|
|
/*h(38)=2 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6300},
|
|
/*h(20)=3 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6299},
|
|
/*h(6)=4 EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6296},
|
|
/*h(36)=5 EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6301}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xde_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6470},
|
|
/*h(4)=1 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6469},
|
|
/*h(38)=2 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6472},
|
|
/*h(20)=3 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6471},
|
|
/*h(6)=4 EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6468},
|
|
/*h(36)=5 EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6473}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xdf_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5102},
|
|
/*h(76)=1 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5108},
|
|
/*h(8)=2 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5104},
|
|
/*h(12)=3 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5110},
|
|
/*h(41)=4 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5106},
|
|
/*h(45)=5 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5112},
|
|
/*h(74)=6 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5101},
|
|
/*h(78)=7 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5107},
|
|
/*h(10)=8 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5103},
|
|
/*h(14)=9 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5109},
|
|
/*h(40)=10 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5106},
|
|
/*h(44)=11 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5112},
|
|
/*h(73)=12 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5102},
|
|
/*h(77)=13 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5108},
|
|
/*h(9)=14 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5104},
|
|
/*h(13)=15 EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5110},
|
|
/*h(42)=16 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5105},
|
|
/*h(46)=17 EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5111}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe0_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6316},
|
|
/*h(4)=1 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6315},
|
|
/*h(38)=2 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6318},
|
|
/*h(20)=3 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6317},
|
|
/*h(6)=4 EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6314},
|
|
/*h(36)=5 EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6319}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe1_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6646},
|
|
/*h(4)=1 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_MEM128()*/ {4, 6643},
|
|
/*h(38)=2 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6650},
|
|
/*h(20)=3 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_MEM128()*/ {20, 6647},
|
|
/*h(6)=4 EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6642},
|
|
/*h(36)=5 EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_MEM128()*/ {36, 6651}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[12] = {
|
|
/*h(46)=0 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5682},
|
|
/*h(72)=1 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {72, 5663},
|
|
/*h(42)=2 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5670},
|
|
/*h(78)=3 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5674},
|
|
/*h(12)=4 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {12, 5679},
|
|
/*h(74)=5 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5662},
|
|
/*h(8)=6 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {8, 5667},
|
|
/*h(44)=7 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {44, 5683},
|
|
/*h(14)=8 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5678},
|
|
/*h(40)=9 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {40, 5671},
|
|
/*h(76)=10 EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {76, 5675},
|
|
/*h(10)=11 EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5666}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 23) % 12);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe3_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6322},
|
|
/*h(4)=1 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6321},
|
|
/*h(38)=2 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6324},
|
|
/*h(20)=3 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6323},
|
|
/*h(6)=4 EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6320},
|
|
/*h(36)=5 EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6325}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6566},
|
|
/*h(4)=1 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6565},
|
|
/*h(38)=2 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6568},
|
|
/*h(20)=3 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6567},
|
|
/*h(6)=4 EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6564},
|
|
/*h(36)=5 EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6569}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6572},
|
|
/*h(4)=1 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6571},
|
|
/*h(38)=2 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6574},
|
|
/*h(20)=3 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6573},
|
|
/*h(6)=4 EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6570},
|
|
/*h(36)=5 EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6575}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[104] = {
|
|
/*h(218)=0 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR*/ {218, 4176},
|
|
/*h(477)=1 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {477, 6101},
|
|
/*h(95)=2 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {95, 4302},
|
|
/*h(668)=3 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {668, 4189},
|
|
/*h(927)=4 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {927, 4188},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(219)=8 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {219, 4174},
|
|
/*h(478)=9 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {478, 6100},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(669)=11 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {669, 4189},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(220)=16 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {220, 6099},
|
|
/*h(479)=17 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {479, 6103},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(670)=19 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {670, 4187},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(221)=24 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {221, 6099},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(412)=26 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {412, 4193},
|
|
/*h(671)=27 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {671, 4188},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(222)=32 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {222, 6098},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(413)=34 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {413, 4193},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(604)=36 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {604, 4303},
|
|
/*h(863)=37 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {863, 4302},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(223)=40 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {223, 6103},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(414)=42 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {414, 4192},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(605)=44 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {605, 4303},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(728)=47 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {728, 4175},
|
|
/*h(987)=48 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {987, 4174},
|
|
/*h(156)=49 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {156, 4191},
|
|
/*h(415)=50 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {415, 4188},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(606)=52 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {606, 4301},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(729)=55 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {729, 4175},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(157)=57 EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {157, 4191},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(348)=59 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {348, 4307},
|
|
/*h(607)=60 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {607, 4302},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(730)=63 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR*/ {730, 4173},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(158)=65 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {158, 4190},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(349)=67 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {349, 4307},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(472)=70 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {472, 4179},
|
|
/*h(731)=71 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {731, 4174},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(159)=73 EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUND() W1 NOEVSR*/ {159, 4188},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(350)=75 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR*/ {350, 4306},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(473)=78 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {473, 4179},
|
|
/*h(732)=79 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {732, 6104},
|
|
/*h(991)=80 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {991, 6103},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(92)=82 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {92, 4305},
|
|
/*h(351)=83 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR*/ {351, 4302},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(474)=86 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR*/ {474, 4178},
|
|
/*h(733)=87 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {733, 6104},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(93)=90 EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {93, 4305},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(216)=93 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {216, 4177},
|
|
/*h(475)=94 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 NOEVSR FIX_ROUND_LEN512()*/ {475, 4174},
|
|
/*h(734)=95 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR*/ {734, 6102},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(94)=98 EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR*/ {94, 4304},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(217)=101 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_BITS() NELEM_HALF()*/ {217, 4177},
|
|
/*h(476)=102 EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL()*/ {476, 6101},
|
|
/*h(735)=103 EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 NOEVSR FIX_ROUND_LEN512() AVX512_ROUND()*/ {735, 6103}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 109) % 104);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe7_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[3] = {
|
|
/*h(178)=0 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {178, 4988},
|
|
/*h(690)=1 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {690, 4989},
|
|
/*h(1202)=2 EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()*/ {1202, 4987}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 3ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6686},
|
|
/*h(4)=1 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6685},
|
|
/*h(38)=2 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6688},
|
|
/*h(20)=3 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6687},
|
|
/*h(6)=4 EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6684},
|
|
/*h(36)=5 EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6689}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xe9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6692},
|
|
/*h(4)=1 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6691},
|
|
/*h(38)=2 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6694},
|
|
/*h(20)=3 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6693},
|
|
/*h(6)=4 EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6690},
|
|
/*h(36)=5 EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6695}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xea_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6488},
|
|
/*h(4)=1 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6487},
|
|
/*h(38)=2 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6490},
|
|
/*h(20)=3 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6489},
|
|
/*h(6)=4 EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6486},
|
|
/*h(36)=5 EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6491}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xeb_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*h(72)=0 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5549},
|
|
/*h(76)=1 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5555},
|
|
/*h(8)=2 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5551},
|
|
/*h(12)=3 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5557},
|
|
/*h(41)=4 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5553},
|
|
/*h(45)=5 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5559},
|
|
/*h(74)=6 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5548},
|
|
/*h(78)=7 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5554},
|
|
/*h(10)=8 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5550},
|
|
/*h(14)=9 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5556},
|
|
/*h(40)=10 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5553},
|
|
/*h(44)=11 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5559},
|
|
/*h(73)=12 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5549},
|
|
/*h(77)=13 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5555},
|
|
/*h(9)=14 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5551},
|
|
/*h(13)=15 EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5557},
|
|
/*h(42)=16 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5552},
|
|
/*h(46)=17 EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5558}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xec_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6280},
|
|
/*h(4)=1 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6279},
|
|
/*h(38)=2 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6282},
|
|
/*h(20)=3 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6281},
|
|
/*h(6)=4 EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6278},
|
|
/*h(36)=5 EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6283}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xed_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6286},
|
|
/*h(4)=1 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6285},
|
|
/*h(38)=2 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6288},
|
|
/*h(20)=3 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6287},
|
|
/*h(6)=4 EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6284},
|
|
/*h(36)=5 EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6289}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xee_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6464},
|
|
/*h(4)=1 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6463},
|
|
/*h(38)=2 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6466},
|
|
/*h(20)=3 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6465},
|
|
/*h(6)=4 EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6462},
|
|
/*h(36)=5 EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6467}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
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|
hidx = ((5*key % 13) % 6);
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|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
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|
}
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else{
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|
return 0;
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|
}
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}
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xef_vv2(const xed_decoded_inst_t* d)
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|
{
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|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
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|
/*h(72)=0 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5807},
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|
/*h(76)=1 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5813},
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/*h(8)=2 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5809},
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|
/*h(12)=3 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5815},
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|
/*h(41)=4 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5811},
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|
/*h(45)=5 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5817},
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|
/*h(74)=6 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5806},
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|
/*h(78)=7 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5812},
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|
/*h(10)=8 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5808},
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|
/*h(14)=9 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5814},
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|
/*h(40)=10 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5811},
|
|
/*h(44)=11 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5817},
|
|
/*h(73)=12 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5807},
|
|
/*h(77)=13 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5813},
|
|
/*h(9)=14 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5809},
|
|
/*h(13)=15 EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5815},
|
|
/*h(42)=16 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5810},
|
|
/*h(46)=17 EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5816}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 47) % 18);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf1_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6628},
|
|
/*h(4)=1 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_MEM128()*/ {4, 6625},
|
|
/*h(38)=2 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6632},
|
|
/*h(20)=3 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_MEM128()*/ {20, 6629},
|
|
/*h(6)=4 EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6624},
|
|
/*h(36)=5 EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_MEM128()*/ {36, 6633}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf2_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(42)=0 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5634},
|
|
/*h(8)=1 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {8, 5631},
|
|
/*h(72)=2 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {72, 5627},
|
|
/*h(10)=3 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5630},
|
|
/*h(74)=4 EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5626},
|
|
/*h(40)=5 EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_BITS() NELEM_MEM128()*/ {40, 5635}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((8*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf3_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(14)=0 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5642},
|
|
/*h(46)=1 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5646},
|
|
/*h(78)=2 EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5638},
|
|
/*h(12)=3 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {12, 5643},
|
|
/*h(44)=4 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {44, 5647},
|
|
/*h(76)=5 EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_BITS() NELEM_MEM128()*/ {76, 5639}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((9*key % 7) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf4_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[9] = {
|
|
/*h(76)=0 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5543},
|
|
/*h(46)=1 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5546},
|
|
/*h(12)=2 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5545},
|
|
/*h(77)=3 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5543},
|
|
/*h(13)=4 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5545},
|
|
/*h(78)=5 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5542},
|
|
/*h(44)=6 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5547},
|
|
/*h(14)=7 EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5544},
|
|
/*h(45)=8 EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5547}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = ((12*key % 19) % 9);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf5_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6452},
|
|
/*h(4)=1 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6451},
|
|
/*h(38)=2 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6454},
|
|
/*h(20)=3 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6453},
|
|
/*h(6)=4 EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6450},
|
|
/*h(36)=5 EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6455}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf6_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[10] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*h(10)=1 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 MASK=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {10, 6589},
|
|
/*h(78)=2 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0*/ {78, 6592},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(46)=4 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0*/ {46, 6590},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(14)=6 EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0*/ {14, 6588},
|
|
/*h(74)=7 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 MASK=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {74, 6593},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(42)=9 EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 MASK=0 ESIZE_8_BITS() NELEM_FULLMEM()*/ {42, 6591}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf8_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6680},
|
|
/*h(4)=1 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6679},
|
|
/*h(38)=2 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6682},
|
|
/*h(20)=3 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6681},
|
|
/*h(6)=4 EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6678},
|
|
/*h(36)=5 EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6683}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xf9_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6710},
|
|
/*h(4)=1 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6709},
|
|
/*h(38)=2 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6712},
|
|
/*h(20)=3 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6711},
|
|
/*h(6)=4 EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6708},
|
|
/*h(36)=5 EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6713}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfa_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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static const lu_entry_t lu_table[18] = {
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(73)=2 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5735},
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/*h(10)=3 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5736},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(41)=6 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5739},
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/*empty slot1 */ {0,0},
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/*h(72)=8 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5735},
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/*empty slot1 */ {0,0},
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/*h(9)=10 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5737},
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/*empty slot1 */ {0,0},
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/*h(40)=12 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5739},
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/*h(74)=13 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5734},
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/*empty slot1 */ {0,0},
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/*empty slot1 */ {0,0},
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/*h(8)=16 EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5737},
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/*h(42)=17 EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5738}
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};
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xed_union64_t t, u;
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
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hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
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if(lu_table[hidx].key == key) {
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return lu_table[hidx].value;
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}
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else{
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return 0;
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}
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}
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static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfb_vv2(const xed_decoded_inst_t* d)
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{
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typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
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static const lu_entry_t lu_table[9] = {
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/*h(76)=0 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {76, 5741},
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/*h(46)=1 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1*/ {46, 5744},
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/*h(12)=2 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {12, 5743},
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/*h(77)=3 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS() NELEM_FULL()*/ {77, 5741},
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/*h(13)=4 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS() NELEM_FULL()*/ {13, 5743},
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/*h(78)=5 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1*/ {78, 5740},
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/*h(44)=6 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {44, 5745},
|
|
/*h(14)=7 EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1*/ {14, 5742},
|
|
/*h(45)=8 EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS() NELEM_FULL()*/ {45, 5745}
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};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
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key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
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hidx = ((12*key % 19) % 9);
|
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if(lu_table[hidx].key == key) {
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return lu_table[hidx].value;
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|
}
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else{
|
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return 0;
|
|
}
|
|
}
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|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfc_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6274},
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|
/*h(4)=1 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BITS() NELEM_FULLMEM()*/ {4, 6273},
|
|
/*h(38)=2 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6276},
|
|
/*h(20)=3 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BITS() NELEM_FULLMEM()*/ {20, 6275},
|
|
/*h(6)=4 EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6272},
|
|
/*h(36)=5 EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BITS() NELEM_FULLMEM()*/ {36, 6277}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfd_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[6] = {
|
|
/*h(22)=0 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256*/ {22, 6304},
|
|
/*h(4)=1 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BITS() NELEM_FULLMEM()*/ {4, 6303},
|
|
/*h(38)=2 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512*/ {38, 6306},
|
|
/*h(20)=3 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BITS() NELEM_FULLMEM()*/ {20, 6305},
|
|
/*h(6)=4 EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128*/ {6, 6302},
|
|
/*h(36)=5 EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BITS() NELEM_FULLMEM()*/ {36, 6307}
|
|
};
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(d);
|
|
hidx = ((5*key % 13) % 6);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
static xed_uint32_t xed3_phash_find_mapevex_map1_opcode0xfe_vv2(const xed_decoded_inst_t* d)
|
|
{
|
|
typedef struct {xed_uint32_t key; xed_uint32_t value;} lu_entry_t;
|
|
static const lu_entry_t lu_table[18] = {
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(73)=2 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {73, 5084},
|
|
/*h(10)=3 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0*/ {10, 5085},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(41)=6 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {41, 5088},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(72)=8 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS() NELEM_FULL()*/ {72, 5084},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(9)=10 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {9, 5086},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(40)=12 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS() NELEM_FULL()*/ {40, 5088},
|
|
/*h(74)=13 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0*/ {74, 5083},
|
|
/*empty slot1 */ {0,0},
|
|
/*empty slot1 */ {0,0},
|
|
/*h(8)=16 EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS() NELEM_FULL()*/ {8, 5086},
|
|
/*h(42)=17 EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0*/ {42, 5087}
|
|
};
|
|
xed_union64_t t, u;
|
|
xed_uint64_t key = 0;
|
|
xed_uint64_t hidx = 0;
|
|
key = xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(d);
|
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 18ULL, u.s.hi32);
|
|
if(lu_table[hidx].key == key) {
|
|
return lu_table[hidx].value;
|
|
}
|
|
else{
|
|
return 0;
|
|
}
|
|
}
|
|
#endif
|