_xeroxz
3 years ago
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0ddabe809e
commit
0d63ad288a
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#include "vmxlaunch.hpp"
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#include "idt.hpp"
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auto driver_unload(
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PDRIVER_OBJECT driver_object
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) -> void
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{
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// no unloading this hypervisor... reboot!
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__debugbreak();
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}
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auto driver_entry(
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PDRIVER_OBJECT driver_object,
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PUNICODE_STRING registry_path
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) -> NTSTATUS
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{
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vmxon::g_vmx_ctx =
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reinterpret_cast<hv::pvmx_ctx>(
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ExAllocatePool(NonPagedPool, sizeof hv::vmx_ctx));
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// setup vcpu structures (vmx on region and vmcs...)
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vmxon::create_vcpus(vmxon::g_vmx_ctx);
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// setup host address space...
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cr3 cr3_value;
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cr3_value.flags = __readcr3();
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cr3_value.address_of_page_directory =
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(MmGetPhysicalAddress(mm::pml4).QuadPart >> 12);
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memset(mm::pml4, NULL, sizeof mm::pml4);
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mm::pml4[PML4_SELF_REF].pfn = cr3_value.address_of_page_directory;
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mm::pml4[PML4_SELF_REF].present = true;
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mm::pml4[PML4_SELF_REF].rw = true;
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mm::pml4[PML4_SELF_REF].user_supervisor = false;
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PHYSICAL_ADDRESS current_pml4;
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current_pml4.QuadPart =
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(cr3{ __readcr3() }.address_of_page_directory << 12);
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const auto kernel_pml4 =
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reinterpret_cast<mm::ppml4e>(
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MmGetVirtualForPhysical(current_pml4));
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// vmxroot will have the same "address space" as the current one being executed in...
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memcpy(&mm::pml4[255], &kernel_pml4[255], sizeof(mm::pml4e) * 255);
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// setup mapping ptes to be present and writable...
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for (auto idx = 0u; idx < 254; ++idx)
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{
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reinterpret_cast<mm::ppte>(mm::pml4)[idx].present = true;
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reinterpret_cast<mm::ppte>(mm::pml4)[idx].rw = true;
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}
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// enable vmx operation on all cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxon::init_vmxon, NULL);
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// setup VMCS for all logical cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxlaunch::init_vmcs, cr3_value.flags);
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// vmxlaunch for all cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxlaunch::launch, NULL);
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driver_object->DriverUnload = &driver_unload;
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return STATUS_SUCCESS;
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}
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@ -1,34 +0,0 @@
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#include "vmxlaunch.hpp"
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auto driver_unload(
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PDRIVER_OBJECT driver_object
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) -> void
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{
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// test to see if invalid opcode happens...
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__vmx_off();
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}
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auto driver_entry(
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PDRIVER_OBJECT driver_object,
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PUNICODE_STRING registry_path
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) -> NTSTATUS
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{
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vmxon::g_vmx_ctx =
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reinterpret_cast<hv::pvmx_ctx>(
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ExAllocatePool(NonPagedPool, sizeof hv::vmx_ctx));
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// setup vcpu structures (vmx on region and vmcs...)
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vmxon::create_vcpus(vmxon::g_vmx_ctx);
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// enable vmx operation on all cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxon::init_vmxon, NULL);
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// setup VMCS for all logical cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxlaunch::init_vmcs, NULL);
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// vmxlaunch for all cores...
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KeIpiGenericCall((PKIPI_BROADCAST_WORKER)&vmxlaunch::launch, NULL);
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driver_object->DriverUnload = &driver_unload;
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return STATUS_SUCCESS;
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}
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#pragma once
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#include "hv_types.hpp"
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#pragma section(".gdt", read, write)
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#define GDT_CS_INDEX 0
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#define GDT_DS_INDEX 1
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#define GDT_TSS_INDEX 2
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namespace gdt
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{
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__declspec(allocate(".gdt"))
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inline segment_descriptor_64 table[3]; // TODO...
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auto init()->void;
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auto get_info(const segment_descriptor_register_64& gdt_value, segment_selector segment_selector)->hv::segment_info_ctx;
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auto get_access_rights(segment_descriptor_64* segment_descriptor)->vmx_segment_access_rights;
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}
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@ -1,20 +1,30 @@
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#include "idt.hpp"
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void seh_handler(hv::pidt_regs_t regs)
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{
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return;
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}
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namespace idt
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{
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auto create_entry(void* address) -> hv::idt_entry_t
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auto create_entry(hv::idt_addr_t idt_handler) -> hv::idt_entry_t
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{
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hv::idt_addr_t idt_addr{ (u64) address };
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hv::idt_entry_t result{};
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result.dpl = 0;
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result.storage_segment = 0;
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result.segment_selector = readcs();
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result.gate_type = SEGMENT_DESCRIPTOR_TYPE_INTERRUPT_GATE;
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result.present = 1;
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result.offset_high = idt_addr.offset_high;
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result.offset_middle = idt_addr.offset_middle;
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result.offset_low = idt_addr.offset_low;
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result.present = true;
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result.offset_high = idt_handler.offset_high;
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result.offset_middle = idt_handler.offset_middle;
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result.offset_low = idt_handler.offset_low;
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return result;
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}
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auto init() -> u64
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{
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idt::table[general_protection] = create_entry(hv::idt_addr_t{ __gp_handler });
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idt::table[page_fault] = create_entry(hv::idt_addr_t{ __pf_handler });
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idt::table[divide_error] = create_entry(hv::idt_addr_t{ __de_handler });
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return reinterpret_cast<u64>(idt::table);
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}
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}
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extern seh_handler : proc
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.code
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__pf_handler proc
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__de_handler proc
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__gp_handler proc
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push rax
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push rbx
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push rcx
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push rdx
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push rsi
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push rdi
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push rbp
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push r8
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push r9
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push r10
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push r11
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push r12
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push r13
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push r14
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push r15
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sub rsp, 0108h ; 16 xmm registers... and +8 bytes for alignment...
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movaps [rsp], xmm0
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movaps [rsp + 010h], xmm1
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movaps [rsp + 020h], xmm2
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movaps [rsp + 030h], xmm3
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movaps [rsp + 040h], xmm4
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movaps [rsp + 050h], xmm5
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movaps [rsp + 060h], xmm6
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movaps [rsp + 070h], xmm7
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movaps [rsp + 080h], xmm8
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movaps [rsp + 090h], xmm9
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movaps [rsp + 0A0h], xmm10
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movaps [rsp + 0B0h], xmm11
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movaps [rsp + 0C0h], xmm12
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movaps [rsp + 0D0h], xmm13
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movaps [rsp + 0E0h], xmm14
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movaps [rsp + 0F0h], xmm15
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mov rcx, rsp
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sub rsp, 20h
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call seh_handler
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add rsp, 20h
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movups xmm0, [rsp]
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movups xmm1, [rsp + 010h]
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movups xmm2, [rsp + 020h]
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movups xmm3, [rsp + 030h]
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movups xmm4, [rsp + 040h]
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movups xmm5, [rsp + 050h]
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movups xmm6, [rsp + 060h]
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movups xmm7, [rsp + 070h]
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movups xmm8, [rsp + 080h]
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movups xmm9, [rsp + 090h]
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movups xmm10, [rsp + 0A0h]
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movups xmm11, [rsp + 0B0h]
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movups xmm12, [rsp + 0C0h]
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movups xmm13, [rsp + 0D0h]
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movups xmm14, [rsp + 0E0h]
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movups xmm15, [rsp + 0F0h]
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add rsp, 0108h ; 16 xmm registers... and +8 bytes for alignment...
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pop r15
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop rbp
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pop rdi
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pop rsi
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pop rdx
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pop rcx
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pop rbx
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pop rax
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iretq
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__gp_handler endp
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__de_handler endp
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__pf_handler endp
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end
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@ -1,5 +1,6 @@
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#pragma once
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#include "hv_types.hpp"
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#include "invd.hpp"
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extern "C" auto vmxexit_handler() -> void;
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extern "C" auto exit_handler(hv::pguest_registers regs) -> void;
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